会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 56. 发明授权
    • Liquid crystal display device having a particular compensator
    • 具有特定补偿器的液晶显示装置
    • US5587821A
    • 1996-12-24
    • US363377
    • 1994-12-23
    • Hiroko NakanishiHiroshi Ohnishi
    • Hiroko NakanishiHiroshi Ohnishi
    • G02F1/137G02F1/133G02F1/1335G02F1/13363G02F1/1337C09K19/02
    • G02F1/133634
    • It is an object of the invention to improve the viewing angle properties of a liquid crystal display device by controlling the state of orientation of liquid crystal molecules. The liquid crystal display device is constructed with an liquid crystal display element disposed between a pair of polarizing plates, and with phase difference plates disposed between each polarizing plate and the liquid crystal display element. The phase difference plates are selected so that nx.gtoreq.nz>ny is satisfied and the Nz value is in the range of 0.ltoreq.Nz.ltoreq.0.5. The liquid crystal display element is constructed by placing a liquid crystal layer between substrate members prepared by forming transparent electrodes and orientation films in the pair of light transmitting plates, and the liquid crystal layer sandwiched between the transparent electrodes is used as picture elements. One picture element contains mixed liquid crystal molecules with different pretilt angles controlled by a light irradiation step after application and baking of the film material for the orientation films As a result, it is possible to obtain excellent display quality in both of the opposing viewing angle directions.
    • 本发明的目的是通过控制液晶分子的取向状态来改进液晶显示装置的视角特性。 液晶显示装置由配置在一对偏振片之间的液晶显示元件构成,并且配置在各偏光板与液晶显示元件之间的相位差板。 选择相位差板使得nx> n = nz> ny并且Nz值在0≤Nz≤0.5的范围内。 液晶显示元件是通过在通过在一对透光板中形成透明电极和取向膜而制备的衬底构件之间放置液晶层而构成的,并且夹在透明电极之间的液晶层用作像素。 一个图像元素包含具有不同预倾角的混合液晶分子,其通过在施加和烘焙用于取向膜的薄膜材料之后的光照射步骤控制。结果,可以在相对视角方向上获得优异的显示质量 。
    • 58. 发明授权
    • Nyquist filter for digital modulation
    • 奈奎斯特滤波器用于数字调制
    • US5487089A
    • 1996-01-23
    • US16222
    • 1993-02-11
    • Kouei MisaizuShoichiro HondaHiroshi Ohnishi
    • Kouei MisaizuShoichiro HondaHiroshi Ohnishi
    • H04L25/03H04K1/02
    • H04L25/03133
    • An input bit sequence is converted into n-bit parallel symbol signals each representing one symbol. A shift register stores an "m" number of the n-bit parallel symbol signals, shifting the n-bit parallel symbol signals one symbol by one symbol and outputting them. At least one selector is operative for sequentially selecting one of the k-th symbol signal and the (m+1)-k-th symbol signal outputted by the shift register in response to a clock signal, where k equals 1, 2, . . . , (m-1)/2. A sampling counter serves to count pairs of successive clock pulses of the clock signal. An Exclusive-OR circuit executes Exclusive-OR operation between the clock signal and an output signal of the sampling counter. At least one first read-only memory stores data representing portions of predetermined impulse response waveforms, and outputs the data in response to an address signal having higher and lower parts. A second read-only memory stores data representing portions of predetermined impulse response waveforms, and outputs the data in response to an address signal having higher and lower parts. A filter output signal is generated by combining the data output by the first read-only memory and the second read-only memory.
    • 输入比特序列被转换成每个表示一个符号的n位并行符号信号。 移位寄存器存储“m”个n位并行符号信号,将n位并行符号信号一个符号一个符号移位并输出。 至少一个选择器用于响应于时钟信号顺序地选择移位寄存器输出的第k个符号信号和(m + 1)-k个符号信号中的一个,其中k等于1,2。 。 。 ,(m-1)/ 2。 采样计数器用于计数时钟信号的连续时钟脉冲对。 异或电路在时钟信号和采样计数器的输出信号之间执行异或运算。 至少一个第一只读存储器存储表示预定脉冲响应波形的部分的数据,并响应于具有较高和较低部分的地址信号输出数据。 第二只读存储器存储表示预定脉冲响应波形的部分的数据,并且响应于具有较高和较低部分的地址信号输出数据。 通过组合由第一只读存储器和第二只读存储器输出的数据来生成滤波器输出信号。
    • 59. 发明授权
    • Frame synchronizing apparatus for quadrature modulation data
communication radio receiver
    • 正交调制数据通信无线电接收机的帧同步装置
    • US5463627A
    • 1995-10-31
    • US200592
    • 1994-02-23
    • Akihiko MatsuokaHiroshi OhnishiYoshinori KuniedaKouei MisaizuYuuri Yamamoto
    • Akihiko MatsuokaHiroshi OhnishiYoshinori KuniedaKouei MisaizuYuuri Yamamoto
    • H03L7/085H04J3/06H04L7/033H04L7/04H04L7/08
    • H04L7/042H03L7/085H04J3/06H04L7/0331H04L7/08
    • In a frame synchronizing apparatus for a receiver apparatus of a digital data radio communications system in which data are transmitted in frame periods with a fixed data sequence contained each frame, a data correlation circuit obtains successive sequences of values of vector difference between vector values constituting a demodulated digital baseband signal, and successively compares these sequences with a fixed vector difference sequence corresponding to the fixed data sequence, to derive a correlation signal substantially unaffected by any phase rotation in the baseband signal. A frame synchronizing circuit formed as a PLL for generating a frame synchronizing signal, includes a phase comparator which periodically indicates whether a detected phase difference between the correlation signal and frame synchronizing signal is effectively zero, positive or negative, and a counter holding a count value indicating a cumulative phase error between these signals. So long as the detected phase differences are successively effectively zero and the cumulative phase error is sufficiently small, the phase of the frame synchronizing signal is held unchanged, thereby achieving a high degree of phase stability.
    • 在数字数据无线电通信系统的接收机装置的帧同步装置中,数据在具有包含每一帧的固定数据序列的帧周期中被发送,数据相关电路获得构成矢量的矢量值之间的向量差的值的连续序列 解调的数字基带信号,并且将这些序列与对应于固定数据序列的固定向量差异序列连续地进行比较,以导出基本上不受基带信号中的任何相位旋转影响的相关信号。 形成为用于产生帧同步信号的PLL的帧同步电路包括周期性地指示相关信号和帧同步信号之间的检测到的相位差是否为零或正的负相位的相位比较器,以及保持计数值的计数器 表示这些信号之间的累积相位误差。 只要检测到的相位差连续有效地为零并且累积相位误差足够小,则帧同步信号的相位保持不变,从而实现高度的相位稳定性。