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    • 52. 发明授权
    • Method to enable user mode process to operate in a privileged execution mode
    • 允许用户模式进程在特权执行模式下运行的方法
    • US07669050B2
    • 2010-02-23
    • US10877910
    • 2004-06-24
    • Stephen L. BlinickYu-Cheng Hsu
    • Stephen L. BlinickYu-Cheng Hsu
    • H04L29/06
    • G06F9/468
    • A method to enable a user mode process to operate in a privileged execution mode is disclosed. Applicants' method provides an operating system comprising a privileged execution mode and a non-privileged execution mode, and a plurality of user mode strings operating in the non-privileged execution mode. The computing device receives a request from a first user mode string to operate in the privileged execution mode to perform one or more designated tasks. Applicants' method authorizes the first user mode string to operate in the privileged execution mode, and the first user mode string performs those one or more designated tasks using the privileged execution mode. Applicants' method continues to permit the first user mode string to operate in the privileged execution mode after completion of the one or more designated tasks.
    • 公开了一种使用户模式进程能够以特权执行模式运行的方法。 申请人的方法提供包括特权执行模式和非特权执行模式的操作系统以及以非特权执行模式操作的多个用户模式串。 计算设备接收来自第一用户模式串的请求,以在特权执行模式下操作以执行一个或多个指定的任务。 申请人的方法授权第一用户模式字符串在特权执行模式下运行,第一用户模式字符串使用特权执行模式执行那些一个或多个指定任务。 申请人的方法继续允许第一用户模式字符串在完成一个或多个指定任务之后以特权执行模式操作。
    • 53. 发明授权
    • Coordination of multiprocessor operations with shared resources
    • 多处理器操作与共享资源协调
    • US07650467B2
    • 2010-01-19
    • US12052569
    • 2008-03-20
    • Stephen LaRoux BlinickYu-Cheng HsuLucien MirabeauRicky Dean RankinCheng-Chung Song
    • Stephen LaRoux BlinickYu-Cheng HsuLucien MirabeauRicky Dean RankinCheng-Chung Song
    • G06F13/00
    • G06F12/0831
    • In managing multiprocessor operations, a first processor repetitively reads a cache line wherein the cache line is cached from a line of a shared memory of resources shared by both the first processor and a second processor. Coherency is maintained between the shared memory line and the cache line in accordance with a cache coherency protocol. In one aspect, the repetitive cache line reading occupies the first processor and inhibits the first processor from accessing the shared resources. In another aspect, upon completion of operations by the second processor involving the shared resources, the second processor writes data to the shared memory line to signal to the first processor that the shared resources may be accessed by the first processor. In response, the first processor changes the state of the cache line in accordance with the cache coherency protocol and reads the data written by the second processor. Other embodiments are described and claimed.
    • 在管理多处理器操作时,第一处理器重复地读取高速缓存行,其中高速缓存行从由第一处理器和第二处理器共享的资源的共享存储器的一行缓存。 根据高速缓存一致性协议,在共享存储器线和高速缓存线之间保持一致性。 在一个方面,重复的高速缓存行读取占用第一处理器并且禁止第一处理器访问共享资源。 在另一方面,在由涉及共享资源的第二处理器完成操作之后,第二处理器将数据写入共享存储器线,以向第一处理器通知第一处理器可以访问共享资源。 作为响应,第一处理器根据高速缓存一致性协议改变高速缓存行的状态,并读取由第二处理器写入的数据。 描述和要求保护其他实施例。
    • 56. 发明授权
    • Configuring cache memory from a storage controller
    • 从存储控制器配置缓存内存
    • US07321986B2
    • 2008-01-22
    • US10814061
    • 2004-03-31
    • Kevin J. AshDavid F. MannenbachYu-Cheng Hsu
    • Kevin J. AshDavid F. MannenbachYu-Cheng Hsu
    • G06F11/00
    • G06F12/0866G06F11/2089G06F2212/601
    • Disclosed are a storage controller, and a method of operating a storage controller, for interfacing between host systems and a storage devices system. The storage controller includes a first cluster including a first processor and a first cache, and a second cluster including a second processor and a second cache. The method comprises the step of directing data from the host systems through first and second data paths to the storage system. The first processor and cache are associated with the first data path, and the second processor and cache are associated with the second data path. Under one set of conditions, the controller enters a failover mode, wherein data directed to the first data path are routed to the second data path. Under another set of conditions, the controller deconfigures the first cache without entering the failover mode.
    • 公开了存储控制器和操作存储控制器的方法,用于在主机系统和存储设备系统之间进行接口。 存储控制器包括包括第一处理器和第一高速缓存的第一群集,以及包括第二处理器和第二高速缓存的第二群集。 该方法包括将来自主机系统的数据通过第一和第二数据路径引导到存储系统的步骤。 第一处理器和高速缓存与第一数据路径相关联,并且第二处理器和高速缓存与第二数据路径相关联。 在一组条件下,控制器进入故障转移模式,其中指向第一数据路径的数据被路由到第二数据路径。 在另一组条件下,控制器解除配置第一个缓存而不进入故障切换模式。
    • 57. 发明授权
    • Apparatus and method to rebuild an NVS image using cache data
    • 使用高速缓存数据重建NVS图像的装置和方法
    • US07243190B2
    • 2007-07-10
    • US10779206
    • 2004-02-13
    • Kevin J. AshDavid F. MannenbachYu-Cheng Hsu
    • Kevin J. AshDavid F. MannenbachYu-Cheng Hsu
    • G06F11/00
    • G06F11/2089G06F11/1441
    • A method to rebuild an NVS image is disclosed. The method provides information to a first cluster of an information storage and retrieval system, and writes that information to a non-volatile storage device disposed in a second cluster. Upon losing utility power to all or part of the information storage and retrieval system, the method provides back-up power to a processor and a data cache, and determines if the information written to the second non-volatile storage device is accessible. If the information written to the second non-volatile storage device is accessible, then the method copies the image of that second non-volatile storage device to an external storage device. If the information written to said second non-volatile storage device is not accessible, then the method creates a virtual NVS image using the information disposed in a local data cache, and copies that virtual NVS image to an external storage device.
    • 公开了重建NVS图像的方法。 该方法向信息存储和检索系统的第一集群提供信息,并将该信息写入设置在第二集群中的非易失性存储设备。 在向全部或部分信息存储和检索系统失去公用电力的情况下,该方法向处理器和数据高速缓存提供备用电力,并且确定写入第二非易失性存储设备的信息是否可访问。 如果写入第二非易失性存储设备的信息是可访问的,则该方法将该第二非易失性存储设备的映像复制到外部存储设备。 如果写入到第二非易失性存储设备的信息不可访问,则该方法使用设置在本地数据高速缓存中的信息创建虚拟NVS映像,并将该虚拟NVS映像复制到外部存储设备。
    • 58. 发明授权
    • Metadata access during error handling routines
    • 错误处理例程期间的元数据访问
    • US07099995B2
    • 2006-08-29
    • US10781200
    • 2004-02-17
    • James A. SpringerYu-Cheng HsuGilad SharabyAaron S. MaharAngelique R. Budaya
    • James A. SpringerYu-Cheng HsuGilad SharabyAaron S. MaharAngelique R. Budaya
    • G06F12/00
    • G06F11/1441G06F11/2069
    • A data storage control unit is coupled to one or more host devices and to one or more physical storage units. Data is stored in one of the storage units and, for data integrity, copied to another storage unit. An updated state of the copy process (metadata) is maintained and updated in metadata tracks in a memory of the storage controller and periodically destaged to corresponding metadata tracks of a storage unit. If the copy process is interrupted, such as by a power failure, an error handling routine commences. Track state fields associated with each in-memory metadata track are initialized to an ‘invalid’ state and background staging of metadata tracks from the storage unit to the memory. After a track is staged, the associated track state field is changed to a ‘valid’ state. If a request is received to access a track of copy state data and the track has been staged (as indicated by the state of the associated track state field), the track is accessed. If the requested track has not been staged, requester waits while the requested track is staged; then the requested track is accessed. Once the error handling routine is completed, normal I/O operations with customer data may resume. Preferably, completion of the error handling routine is independent of the completion of the staging of copy state data tracks.
    • 数据存储控制单元耦合到一个或多个主机设备和一个或多个物理存储单元。 数据存储在其中一个存储单元中,为了数据的完整性,数据被复制到另一个存储单元。 复制过程(元数据)的更新状态在存储控制器的存储器中的元数据轨道中被维护和更新,并且周期性地转移到存储单元的相应元数据轨道。 如果复制过程中断,例如电源故障,则会启动错误处理例程。 与每个存储器间元数据轨道相关联的跟踪状态字段被初始化为从存储单元到存储器的元数据轨迹的“无效”状态和背景分段。 在轨道分段后,相关的轨道状态字段将更改为“有效”状态。 如果接收到访问复制状态数据的轨道的请求,并且轨道已经被分段(如由相关联的轨道状态字段的状态所指示的),则该轨道被访问。 如果所请求的轨道尚未分段,则请求者在所请求的轨道分段时等待; 然后访问所请求的轨道。 一旦完成了错误处理程序,可以恢复与客户数据的正常I / O操作。 优选地,错误处理例程的完成与复制状态数据轨道的分段的完成无关。
    • 59. 发明申请
    • Managing multiprocessor operations
    • 管理多处理器操作
    • US20060117147A1
    • 2006-06-01
    • US11001476
    • 2004-11-30
    • Stephen BlinickYu-Cheng HsuLucien MirabeauRicky RankinCheng-Chung Song
    • Stephen BlinickYu-Cheng HsuLucien MirabeauRicky RankinCheng-Chung Song
    • G06F12/14
    • G06F12/0831
    • In managing multiprocessor operations, a first processor repetitively reads a cache line wherein the cache line is cached from a line of a shared memory of resources shared by both the first processor and a second processor. Coherency is maintained between the shared memory line and the cache line in accordance with a cache coherency protocol. In one aspect, the repetitive cache line reading occupies the first processor and inhibits the first processor from accessing the shared resources. In another aspect, upon completion of operations by the second processor involving the shared resources, the second processor writes data to the shared memory line to signal to the first processor that the shared resources may be accessed by the first processor. In response, the first processor changes the state of the cache line in accordance with the cache coherency protocol and reads the data written by the second processor. Other embodiments are described and claimed.
    • 在管理多处理器操作时,第一处理器重复地读取高速缓存行,其中高速缓存行从由第一处理器和第二处理器共享的资源的共享存储器的一行缓存。 根据高速缓存一致性协议,在共享存储器线和高速缓存线之间保持一致性。 在一个方面,重复的高速缓存行读取占用第一处理器并且禁止第一处理器访问共享资源。 在另一方面,在由涉及共享资源的第二处理器完成操作之后,第二处理器将数据写入共享存储器线,以向第一处理器通知第一处理器可以访问共享资源。 作为响应,第一处理器根据高速缓存一致性协议改变高速缓存行的状态,并读取由第二处理器写入的数据。 描述和要求保护其他实施例。