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51. 发明授权

US07956833B2 Display driver, electro-optical device, and electronic instrument 有权
标题翻译：显示驱动器，电光器件和电子仪器
公开(公告)号：US07956833B2
公开(公告)日：2011-06-07
申请号：US11808901
申请日：2007-06-13
申请人： Satoru Ito , Hisanobu Ishiyama , Motoaki Nishimura , Kazuhiro Maekawa , Haruo Kamijo , Hironori Kobayashi , Isamu Moriya
发明人： Satoru Ito , Hisanobu Ishiyama , Motoaki Nishimura , Kazuhiro Maekawa , Haruo Kamijo , Hironori Kobayashi , Isamu Moriya
IPC分类号： G09G3/36
CPC分类号： G09G3/3655 , G09G3/3688 , G09G3/3696 , G09G2310/0248 , G09G2330/023
摘要： A display driver includes a common electrode charge storage switch provided between a first capacitor element connection node to which one end of a first capacitor element can be connected and a common electrode voltage output node to which a voltage of a common electrode opposite to a pixel electrode of an electro-optical device through an electro-optical material is supplied, a source charge storage switch provided between a second capacitor element connection node to which one end of a second capacitor element can be connected and a source voltage output node to which a voltage of a source line of the electro-optical device is supplied, and a node short circuit switch provided between the common electrode voltage output node and the source voltage output node.
摘要翻译：显示驱动器包括公共电极电荷存储开关，其设置在可连接第一电容器元件的一端的第一电容器元件连接节点和与像素电极相对的公共电极的电压的公共电极电压输出节点之间提供通过电光材料的电光器件的源电荷存储开关，设置在可连接第二电容器元件的一端的第二电容器元件连接节点与源电压输出节点之间的电压存储开关，提供电光装置的源极线，以及设置在公共电极电压输出节点和源电压输出节点之间的节点短路开关。

52. 发明申请

US20070013685A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070013685A1
公开(公告)日：2007-01-18
申请号：US11270694
申请日：2005-11-10
申请人： Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa
发明人： Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa
IPC分类号： G09G5/00
CPC分类号： G09G3/2007 , G09G2310/027 , G09G2360/18
摘要： An integrated circuit device having a display memory, wherein a plurality of first power supply interconnects VSSL for supplying a first power supply voltage VSS to memory cells MC are formed in a metal interconnect layer in which a plurality of wordlines WL are formed; and wherein a plurality of second power supply interconnects VDDL for supplying a second power supply voltage VDD to the memory cells are formed in another metal interconnect layer in which a plurality of bitlines BL are formed, the second power supply voltage VDD being higher than the first power supply voltage VSS. A plurality of bitline protection interconnects SHD are formed in a layer above the bitlines BL, and each of the bitline protection interconnects SHD at least partially covers one of the bitlines BL in a plan view. A third power supply interconnect GL for supplying a third power supply voltage to circuits other than the display memory are formed in a layer above the bitline protection interconnects SHD, the third power supply voltage being higher than the second power supply voltage VDD.
摘要翻译：一种具有显示存储器的集成电路器件，其中在形成有多个字线WL的金属互连层中形成有用于向存储单元MC提供第一电源电压VSS的多个第一电源互连VSSL; 并且其中，在形成有多个位线BL的另一个金属互连层中形成有用于将第二电源电压VDD提供给存储单元的多个第二电源互连VDDL，第二电源电压VDD高于第一电源电压VDD 电源电压VSS。多个位线保护互连SHD形成在位线BL上方的层中，并且每个位线保护互连SHD在平面图中至少部分地覆盖位线BL之一。用于将第三电源电压提供给除了显示存储器之外的电路的第三电源互连GL形成在位线保护互连SHD上方的层中，第三电源电压高于第二电源电压VDD。

53. 发明申请

US20070013074A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070013074A1
公开(公告)日：2007-01-18
申请号：US11270586
申请日：2005-11-10
申请人： Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa
发明人： Satoru Kodaira , Noboru Itomi , Shuji Kawaguchi , Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa
IPC分类号： H01L23/52
CPC分类号： H01L23/552 , G11C5/063 , H01L24/49 , H01L2224/49175 , H01L2924/00014 , H01L2924/01019 , H01L2924/01037 , H01L2924/01066 , H01L2924/14 , H01L2924/19041 , H01L2924/3025 , H01L2224/45099
摘要： An integrated circuit device having a display memory, wherein a plurality of first power supply interconnects for supplying a first power supply voltage to a plurality of memory cells are provided in a metal interconnect layer in which a plurality of bitlines are formed; wherein a second power supply interconnect for supplying a second power supply voltage to the memory cells is provided in a metal interconnect layer in which a plurality of wordlines are formed, the second power supply voltage being higher than the first power supply voltage; wherein a plurality of bitline protection interconnects are formed in a layer above the bitlines, each of the bitline protection interconnects at least partially covering one of the bitlines in a plan view; and wherein a third power supply interconnect for supplying a third power supply voltage to circuits of the integrated circuit device other than the display memory is provided in a layer above the bitline protection interconnects, the third power supply voltage being higher than the second power supply voltage.
摘要翻译：一种具有显示存储器的集成电路器件，其中在形成多个位线的金属互连层中提供用于向多个存储单元提供第一电源电压的多个第一电源互连件; 其中在形成有多个字线的金属互连层中提供用于向所述存储单元提供第二电源电压的第二电源互连，所述第二电源电压高于所述第一电源电压; 其中多个位线保护互连形成在所述位线上方的层中，所述位线保护互连中的每一个在平面图中至少部分地覆盖所述位线之一; 并且其中，用于将第三电源电压提供给除了所述显示存储器之外的所述集成电路装置的电路的第三电源互连设置在所述位线保护互连线上方的层中，所述第三电源电压高于所述第二电源电压。

54. 发明申请

US20070002509A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070002509A1
公开(公告)日：2007-01-04
申请号：US11477720
申请日：2006-06-30
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Takayuki Saiki , Hiroyuki Takamiya
IPC分类号： H02H9/00
CPC分类号： G09G3/3688 , G02F1/13452 , G02F2202/28 , G09G3/3696 , G09G2300/0426 , G09G2310/027
摘要： An integrated circuit device includes a pad PDx and an electrostatic discharge protection element ESDx formed in a rectangular region and electrically connected with the pad PDx. The pad PDx is disposed in an upper layer of the electrostatic discharge protection element ESDx so that an arrangement direction of the pads is parallel to a long side direction of the region in which the electrostatic discharge protection element ESDx is formed, and the pad PDx overlaps part or the entirety of the electrostatic discharge protection element ESDx.
摘要翻译：集成电路器件包括形成在矩形区域中并与焊盘PDx电连接的焊盘PDx和静电放电保护元件ESDx。垫PDx设置在静电放电保护元件ESDx的上层中，使得焊盘的布置方向平行于形成有静电放电保护元件ESDx的区域的长边方向，并且焊盘PDx重叠部分或全部静电放电保护元件ESDx。

55. 发明申请

US20070001973A1 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US20070001973A1
公开(公告)日：2007-01-04
申请号：US11270632
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
IPC分类号： G09G3/36
CPC分类号： G09G3/3611 , G09G3/3688 , G09G3/3696 , G09G2360/18
摘要： An integrated circuit device including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include a logic circuit block LB, a grayscale voltage generation circuit block GB, data driver blocks DB1 to DB4, and a power supply circuit block PB. The data driver blocks DB1 to DB4 are disposed between the logic circuit block LB and the grayscale voltage generation circuit block GB, and the power supply circuit block PB.
摘要翻译：一种集成电路装置，包括沿着第一方向D 1布置的第一至第N电路块CB 1至CBN，当第一方向D 1是从集成电路器件的第一侧朝向与第一方向相反的第三侧的方向时所述第一侧为短边，当第二方向D 2为从所述集成电路器件的第二侧朝向与所述第二侧相反的第四侧的方向时，所述第二侧为长边。电路块CB 1至CBN包括逻辑电路块LB，灰度电压产生电路块GB，数据驱动器块DB 1至DB 4和电源电路块PB。数据驱动器块DB 1至DB 4设置在逻辑电路块LB和灰度级电压产生电路块GB之间，以及电源电路块PB。

56. 发明授权

US06407471B1 Linear motor 有权
标题翻译：直线电机
公开(公告)号：US06407471B1
公开(公告)日：2002-06-18
申请号：US09597552
申请日：2000-06-19
申请人： Yasuhiro Miyamoto , Masaki Hisatsune , Kazuhiro Maekawa , Takato Doi , Masahiko Tanabe
发明人： Yasuhiro Miyamoto , Masaki Hisatsune , Kazuhiro Maekawa , Takato Doi , Masahiko Tanabe
IPC分类号： H02K4100
CPC分类号： H02K41/03 , H02K1/14 , Y10T29/49009
摘要： The invention relates to a linear motor which is provided with a row of permanent magnets 6a, 6b, 6c, . . . for a field system, and an armature 2 facing the same via a magnetized space in an orthogonal direction thereto, wherein the armature core 3 has a winding accommodation groove 3a formed at both sides of armature iron plates produced by punching out oriented electromagnetic steel plate so as to become rectangular, and convex and concave engagement portions 3b and 3c, the armature iron plates are laminated to constitute one core block, and at the same time, the lengthwise direction, orthogonal to the permanent magnet row, in the respective core blocks is made the same as the rolling direction of electromagnetic steel plates. Thereby, since the magnetic flux of the armature winding 4 flows along the rolling direction of the core blocks, the magnetic flux density can be increased, and the peak thrust can be also increased.
摘要翻译：本发明涉及一种具有一排永磁体6a，6b，6c，...的线性电动机。。。并且电枢2经由磁化空间与其正交的方向对置，其中电枢铁心3具有形成在通过冲压取向电磁钢板制造的电枢铁板的两侧的绕组容纳槽3a，为了形成矩形和凸凹接合部分3b和3c，电枢铁板被层叠以构成一个芯块，同时在各个芯块中与永磁体列垂直的纵向是与电磁钢板的轧制方向相同。因此，由于电枢绕组4的磁通量沿芯块的轧制方向流动，所以可以提高磁通密度，并且也可以提高峰值推力。

57. 发明授权

US06351723B1 Failure diagnostic method and apparatus for equipment and recording medium in which program causing computer system to execute process in accordance with such method is stored 失效
标题翻译：存储使计算机系统按照这种方法执行处理的程序的设备和记录介质的故障诊断方法和装置
公开(公告)号：US06351723B1
公开(公告)日：2002-02-26
申请号：US09066334
申请日：1998-04-29
申请人： Kazuhiro Maekawa
发明人： Kazuhiro Maekawa
IPC分类号： G06F1130
CPC分类号： G05B23/0221
摘要： The present invention regards to a failure diagnostic method and apparatus for diagnosing a failure of equipment based on an operating state of the equipment. In the present invention, operating parameters which represent the operating state of the equipment are obtained in time series, a predetermined number of operating state parameters are selected from the obtained operating state parameters, a value of a deviation process capability is calculated from the predetermined number of operating state parameters every time the predetermined number of operating state parameters are selected, and the state regarding the failure of the equipment is determined based on the value of the deviation process capability.
摘要翻译：本发明涉及一种基于设备的运行状态来诊断设备故障的故障诊断方法和装置。在本发明中，以时间序列获得表示设备的运行状态的运行参数，从所获得的运转状态参数中选择规定数量的运转状态参数，根据预定数量计算偏差处理能力的值每当选择预定数量的操作状态参数时，确定操作状态参数，并且基于偏差处理能力的值确定关于设备故障的状态。

58. 发明申请

US20130312890A1 RUBBER LAMINATE, RUN-FLAT TIRE, AND PNEUMATIC TIRE 审中-公开
标题翻译：橡胶层压板，平板轮胎和气动轮胎
公开(公告)号：US20130312890A1
公开(公告)日：2013-11-28
申请号：US13984134
申请日：2012-02-08
申请人： Masashi Iwata , Norihisa Kano , Kazuhiro Maekawa , Jeeyoung Oh
发明人： Masashi Iwata , Norihisa Kano , Kazuhiro Maekawa , Jeeyoung Oh
IPC分类号： B60C17/00 , B32B25/04 , B32B7/04 , B60C13/00
CPC分类号： B60C17/00 , B32B7/04 , B32B25/042 , B60C5/14 , B60C13/00 , B60C13/001 , B60C13/04 , B60C17/0009 , B60C2005/145 , C08K3/04 , C08K5/44 , C08K5/47 , C08L7/00 , C08L9/00 , C08L23/22 , Y10T152/10495 , Y10T428/31931
摘要： Provided are: a rubber laminate having high adhesion between a rubber member including a non-diene rubber and a rubber member including a diene rubber; a run-flat tire obtained by using the rubber laminate, having high adhesion between a side-reinforcing rubber layer and an inner liner, with excellent run-flat durability; and a pneumatic tire including a color layer having high adhesion force to a side rubber while being excellent in stain resistance. The rubber laminate is obtained by laminating a rubber member A including a non-diene rubber and a rubber member B including a diene rubber on each other, the rubber member A and the rubber member B containing a vulcanization accelerator of the same type.
摘要翻译：提供：在包括非二烯橡胶的橡胶构件和包括二烯橡胶的橡胶构件之间具有高粘合性的橡胶层压体; 通过使用橡胶层压体，在侧面增强橡胶层和内衬层之间具有高粘合性而具有优异的平坦的耐久性而获得的防滑轮胎; 以及充气轮胎，其具有对侧橡胶具有高粘合力的着色层，同时耐污性优异。橡胶层压体通过将包含非二烯橡胶的橡胶构件A和包含二烯橡胶的橡胶构件B彼此层压，橡胶构件A和含有相同类型的硫化促进剂的橡胶构件B而获得。

59. 发明授权

US08547722B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US08547722B2
公开(公告)日：2013-10-01
申请号：US13137995
申请日：2011-09-23
申请人： Satoru Ito , Masahiko Moriguchi , Kazuhiro Maekawa , Noboru Itomi , Satoru Kodaira , Junichi Karasawa , Takashi Kumagai , Hisanobu Ishiyama , Takashi Fujise
发明人： Satoru Ito , Masahiko Moriguchi , Kazuhiro Maekawa , Noboru Itomi , Satoru Kodaira , Junichi Karasawa , Takashi Kumagai , Hisanobu Ishiyama , Takashi Fujise
IPC分类号： G11C5/06
CPC分类号： G09G3/3688 , G09G3/2011 , G09G2330/02 , G09G2330/04 , H01L2224/05553
摘要： An integrated circuit device includes first to Nth circuit blocks CB1 to CBN, a first interface region disposed along a fourth side and on the D2 side of the first to Nth circuit blocks CB1 to CBN, and a second interface region disposed along a second side and on the D4 side of the first to Nth circuit blocks CB1 to CBN. A local line LLG formed using a wiring layer lower than an Ith layer is provided between the adjacent circuit blocks as at least one of a signal line and a power supply line. Global lines GLG and GLD formed using the Ith or higher wiring layer are provided along the direction D1 over the circuit block disposed between the nonadjacent circuit blocks as at least one of a signal line and a power supply line.
摘要翻译：集成电路装置包括第一至第N电路块CB1至CBN，沿第一至第N电路块CB1至CBN的第四侧和第二侧设置的第一接口区域以及沿着第二侧设置的第二接口区域，在第一至第N电路块CB1至CBN的D4侧。使用低于第I层的布线层形成的局部线LLG设置在相邻的电路块之间，作为信号线和电源线中的至少一个。使用第I或更高布线层形成的全局线GLG和GLD沿着方向D1设置在布置在不相邻电路块之间的电路块上，作为信号线和电源线中的至少一个。

60. 发明授权

US07764278B2 Integrated circuit device and electronic instrument 有权
标题翻译：集成电路器件和电子仪器
公开(公告)号：US07764278B2
公开(公告)日：2010-07-27
申请号：US11270551
申请日：2005-11-10
申请人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
发明人： Takashi Kumagai , Hisanobu Ishiyama , Kazuhiro Maekawa , Satoru Ito , Takashi Fujise , Junichi Karasawa , Satoru Kodaira , Katsuhiko Maki
IPC分类号： G06F3/038 , G06F13/14 , G09G5/00 , G09G3/18 , G09G3/36
CPC分类号： G09G3/3688 , G09G2310/0267 , G09G2310/027
摘要： An integrated circuit device including first to Nth circuit blocks CB1 to CBN disposed along a first direction D1, when the first direction D1 is a direction from a first side of the integrated circuit device toward a third side which is opposite to the first side, the first side being a short side, and when a second direction D2 is a direction from a second side of the integrated circuit device toward a fourth side which is opposite to the second side, the second side being a long side. The circuit blocks CB1 to CBN include at least one memory block MB which stores image data, and at least one data driver block DB which drives data lines. The memory block MB and the data driver block DB are disposed adjacent to each other along the first direction D1.
摘要翻译：一种集成电路装置，包括沿着第一方向D1设置的第一至第N电路块CB1至CBN，当第一方向D1是从集成电路器件的第一侧朝向与第一侧相反的第三侧的方向时，第一侧为短边，当第二方向D2为从集成电路器件的第二侧向与第二侧相反的第四侧的方向时，第二侧为长边。电路块CB1至CBN包括存储图像数据的至少一个存储器块MB和驱动数据线的至少一个数据驱动器块DB。存储器块MB和数据驱动器块DB沿着第一方向D1彼此相邻地布置。

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