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51. 发明授权

US4350717A Controlling electroless plating bath 失效
标题翻译：控制化学镀浴
公开(公告)号：US4350717A
公开(公告)日：1982-09-21
申请号：US204084
申请日：1980-11-04
申请人： Ken Araki , Hiromitsu Sakai , Yutaka Sugiura
发明人： Ken Araki , Hiromitsu Sakai , Yutaka Sugiura
IPC分类号： C23C18/16 , C23C18/31 , C23C18/34 , C23C18/40 , C23C18/44 , G05D21/02 , C23C3/02 , C23C3/00
CPC分类号： C23C18/1617 , C23C18/1683 , G05D21/02
摘要： A method and an apparatus for controlling an electroless plating bath such as an electroless nickel plating bath capable of using the bath for an extended period of time without remake are disclosed. The method comprises the steps of:continuously or intermittently measuring the concentration of at least one consumable ingredient in the electroless plating bath, andautomatically adding to the plating bath a first replenishing composition essentially consisting of consumable ingredients after detecting that the measured value has reached a predetermined concentration; whilecontinuously or intermittently measuring the consumed amount of at least one consumable ingredient of the electroless plating bath to determine the degree of aging of the bath, andautomatically discharging the predetermined volume of the plating solution and automatically adding to the plating bath a second replenishing composition containing unconsumable ingredients in an amount essentially corresponding to a lost amount by the discharging after detecting that the consumed amount of the consumable ingredients has reached a predetermined value.
摘要翻译：公开了一种用于控制化学镀浴的方法和装置，例如能够长时间使用浴而不进行再制造的化学镀镍浴。该方法包括以下步骤：连续或间歇地测量化学镀浴中的至少一种可消耗成分的浓度，并且在检测到测量值达到一定程度后，自动向电镀槽中添加基本上由消耗成分组成的第一补充组合物预定浓度; 同时连续地或间歇地测量化学镀浴的至少一种消耗成分的消耗量，以确定浴的老化程度，并自动排出预定体积的镀液，并自动地向镀浴中添加第二补充组合物在检测到消耗成分的消耗量达到预定值之后，通过排出物含有基本上对应于损失量的不消耗成分。

52. 发明授权

US08867247B2 DC/AC power converter with DC side double frequency pulsation suppression caused by AC side faults 有权
标题翻译： DC / AC电源转换器，由AC侧故障引起的直流侧双频脉动抑制
公开(公告)号：US08867247B2
公开(公告)日：2014-10-21
申请号：US13420718
申请日：2012-03-15
申请人： Akira Bando , Yasuhiro Kiyofuji , Masaya Ichinose , Hiromitsu Sakai , Yasuhiro Imazu
发明人： Akira Bando , Yasuhiro Kiyofuji , Masaya Ichinose , Hiromitsu Sakai , Yasuhiro Imazu
IPC分类号： H02M7/5387 , H02M7/5395 , H02M1/14
CPC分类号： H02M7/5395 , H02M1/14
摘要： A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.
摘要翻译：对指令电流加上指令的负序电流，以抑制直流侧的双频脉动。从三个值（即，电源侧的正序电压矢量的检测值，负序电压矢量的检测值，以及指令的正序电流）得到指令的负序电流。因此，即使在交流电源故障的同时，即使在确保电流控制系统的稳定性的同时也抑制了在半导体功率转换器的DC侧产生的脉冲，并且其频率倍增了电源频率，因此允许稳定和连续运行

53. 发明授权

US08785227B2 Method of manufacturing semiconductor light emitting element including re-growth layer for reducing warpage 有权
标题翻译：包括用于减少翘曲的再生长层的半导体发光元件的制造方法
公开(公告)号：US08785227B2
公开(公告)日：2014-07-22
申请号：US13805515
申请日：2011-06-23
申请人： Hiromitsu Sakai
发明人： Hiromitsu Sakai
IPC分类号： H01L21/00
CPC分类号： H01L33/32 , H01L21/0237 , H01L21/0243 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/0262 , H01L33/007
摘要： Provided is a method of manufacturing a semiconductor light emitting element that is capable of making a light emitting wavelength distribution σ of a semiconductor light emitting layer that is obtained small. The method includes a process of laminating a re-growth layer of a compound semiconductor layer on the compound semiconductor substrate which is obtained by forming at least one compound semiconductor layer on a substrate and in which a warping amount H is within a range of 50 μm≦H≦250 μm. The method adopts a method of manufacturing a semiconductor light emitting element including an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer that are formed from a compound semiconductor. This method includes: a process of preparing a compound semiconductor substrate which is obtained by forming at least one compound semiconductor layer on a substrate and in which a warping amount H is within a range of 50 μm≦H≦250 μm; and a process of laminating a re-growth layer of the compound semiconductor layer on the compound semiconductor layer of the compound semiconductor substrate in a metalorganic chemical vapor deposition apparatus.
摘要翻译：提供了一种制造能够使发光波长分布的半导体发光元件的方法，的半导体发光层。该方法包括将化合物半导体层的再生长层层叠在化合物半导体基板上的方法，该方法是通过在基板上形成至少一个化合物半导体层而得到的，其中翘曲量H在50μm以下的范围内 ; H＆nlE;250μm。该方法采用由化合物半导体形成的包括n型半导体层，发光层和p型半导体层的半导体发光元件的制造方法。该方法包括：制备化合物半导体衬底的方法，该化合物半导体衬底通过在衬底上形成至少一个化合物半导体层而获得，并且其中翘曲量H在50μm和n1E; H＆lt; NlE;250μm的范围内; 以及将化合物半导体层的再生长层层叠在化合物半导体基板的化合物半导体层上的金属有机化学气相沉积装置中的工序。

54. 发明申请

US20130168691A1 METHOD OF MANUFACTURING SEMICONDUCTOR LIGHT EMITTING ELEMENT, SEMICONDUCTOR LIGHT EMITTING ELEMENT, ELECTRONIC DEVICE, AND MACHINE DEVICE 有权
标题翻译：制造半导体发光元件，半导体发光元件，电子设备和机器设备的方法
公开(公告)号：US20130168691A1
公开(公告)日：2013-07-04
申请号：US13805515
申请日：2011-06-23
申请人： Hiromitsu Sakai
发明人： Hiromitsu Sakai
IPC分类号： H01L33/32
CPC分类号： H01L33/32 , H01L21/0237 , H01L21/0243 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/0262 , H01L33/007
摘要： Provided is a method of manufacturing a semiconductor light emitting element that is capable of making a light emitting wavelength distribution σ of a semiconductor light emitting layer that is obtained small. The method includes a process of laminating a re-growth layer of a compound semiconductor layer on the compound semiconductor substrate which is obtained by forming at least one compound semiconductor layer on a substrate and in which a warping amount H is within a range of 50 μm≦H≦250 μm. The method adopts a method of manufacturing a semiconductor light emitting element including an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer that are formed from a compound semiconductor. This method includes: a process of preparing a compound semiconductor substrate which is obtained by forming at least one compound semiconductor layer on a substrate and in which a warping amount H is within a range of 50 μm≦H≦250 μm; and a process of laminating a re-growth layer of the compound semiconductor layer on the compound semiconductor layer of the compound semiconductor substrate in a metalorganic chemical vapor deposition apparatus.
摘要翻译：提供一种制造半导体发光元件的方法，该半导体发光元件能够使得获得的半导体发光层的发光波长分布sigma小。该方法包括将化合物半导体层的再生长层层压在化合物半导体基板上的方法，该方法是通过在基板上形成至少一个化合物半导体层而得到的，其中翘曲量H在50μm的范围内 @ H @ 250妈妈该方法采用由化合物半导体形成的包括n型半导体层，发光层和p型半导体层的半导体发光元件的制造方法。该方法包括：制备化合物半导体衬底的方法，该化合物半导体衬底通过在衬底上形成至少一种化合物半导体层而得到，并且其中翘曲量H在50μm@250μm的范围内; 以及将化合物半导体层的再生长层层叠在化合物半导体基板的化合物半导体层上的金属有机化学气相沉积装置中的工序。

55. 发明申请

US20120170333A1 Semiconductor Power Conversion Apparatus 有权
标题翻译：半导体电源转换装置
公开(公告)号：US20120170333A1
公开(公告)日：2012-07-05
申请号：US13420718
申请日：2012-03-15
申请人： Akira Bando , Yasuhiro Kiyofuji , Masaya Ichinose , Hiromitsu Sakai , Yasuhiro Imazu
发明人： Akira Bando , Yasuhiro Kiyofuji , Masaya Ichinose , Hiromitsu Sakai , Yasuhiro Imazu
IPC分类号： H02M7/537
CPC分类号： H02M7/5395 , H02M1/14
摘要： A commanded negative-sequence current is added to a commanded current so as to suppress double-frequency pulsation on the DC side. The commanded negative-sequence current is found from three values (i.e., the detected value of positive-sequence voltage vector on the power-supply side, the detected value of negative-sequence voltage vector, and a commanded positive-sequence current). Thus, the pulsations which occur on the DC side of a semiconductor power converter and which have a frequency double the power-supply frequency are suppressed even when the AC power supply is at fault while assuring stability of the current control system, thus permitting stable and continuous operation.
摘要翻译：对指令电流加上指令的负序电流，以抑制直流侧的双频脉动。从三个值（即，电源侧的正序电压矢量的检测值，负序电压矢量的检测值，以及指令的正序电流）得到指令的负序电流。因此，即使在交流电源故障的同时，即使在确保电流控制系统的稳定性的同时也抑制了在半导体功率转换器的DC侧产生的脉冲，并且其频率倍增了电源频率，因此允许稳定和连续运行

56. 发明申请

US20120113658A1 SEMICONDUCTOR LIGHT-EMITTING ELEMENT MANUFACTURING METHOD, LAMP, ELECTRONIC EQUIPMENT, AND MECHANICAL APPARATUS 有权
标题翻译：半导体发光元件制造方法，灯，电子设备和机械设备
公开(公告)号：US20120113658A1
公开(公告)日：2012-05-10
申请号：US13382749
申请日：2010-07-09
申请人： Hiromitsu Sakai
发明人： Hiromitsu Sakai
IPC分类号： F21S2/00 , H01L33/04
CPC分类号： H01L33/007 , H01L33/02
摘要： A semiconductor light-emitting element manufacturing method including: a first step in which a first n-type semiconductor layer is laminated onto a substrate in a first organometallic chemical vapor deposition apparatus; and a second step in which a regrowth layer, a second n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially laminated onto the aforementioned first n-type semiconductor layer in a second organometallic chemical vapor deposition apparatus.
摘要翻译：一种半导体发光元件制造方法，包括：第一步骤，其中在第一有机金属化学气相沉积设备中将第一n型半导体层层压到基板上; 在第二有机金属化学气相沉积装置中，在上述第一n型半导体层上依次层叠再生长层，第二n型半导体层，有源层和p型半导体层的第二工序。

57. 发明授权

US08097971B2 Wind turbine generator system 失效
标题翻译：风力发电系统
公开(公告)号：US08097971B2
公开(公告)日：2012-01-17
申请号：US12453312
申请日：2009-05-06
申请人： Masaya Ichinose , Motoo Futami , Hiromitsu Sakai
发明人： Masaya Ichinose , Motoo Futami , Hiromitsu Sakai
IPC分类号： H02J3/00 , H02P9/00
CPC分类号： F03D7/0284 , F03D9/255 , F05B2270/10711 , F05B2270/337 , H02P9/007 , H02P9/10 , H02P29/0241 , H02P29/032 , H02P2101/15 , Y02E10/72 , Y02P80/158
摘要： In a wind turbine generator system including an AC exciting converter a grid side converter, and a controller configured to control the AC-exciting converter and the grid side converter, the controller operates a short-circuiting circuit when decrease in the grid voltage and increase in the DC voltage are detected.
摘要翻译：在包括AC励磁转换器，电网侧转换器和被配置为控制AC励磁转换器和电网侧转换器的控制器的风力涡轮发电机系统中，控制器在电网电压降低时运行短路电路，并且增加检测直流电压。

58. 发明申请

US20110198567A1 SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND SEMICONDUCTOR LIGHT-EMITTING ELEMENT MANUFACTURING METHOD 有权
标题翻译：半导体发光元件和半导体发光元件制造方法
公开(公告)号：US20110198567A1
公开(公告)日：2011-08-18
申请号：US13124918
申请日：2009-10-16
申请人： Hironao Shinohara , Hiromitsu Sakai
发明人： Hironao Shinohara , Hiromitsu Sakai
IPC分类号： H01L33/06 , H01L33/24
CPC分类号： H01L33/22 , H01L33/025 , H01L33/42
摘要： The semiconductor light-emitting device (11) of the present invention includes a substrate (1); a laminate semiconductor layer (15) comprised of an n-type semiconductor layer (3) formed on the substrate (1), a light-emitting layer (4) laminated on the n-type semiconductor layer (3) and a p-type semiconductor layer (5) laminated on the light-emitting layer (4); a concavo-convex part (33) for improving a light extraction efficiency, which is formed on all or a part of a top surface (15a) of the laminate semiconductor layer (15); a high-concentration p-type semiconductor layer (8) having a higher dopant concentration than that of the p-type semiconductor layer (5), which is laminated on a convex part (33a) that constitutes the concavo-convex part (33) of the laminate semiconductor layer (15); and a translucent current diffusion layer (20) laminated on at least the high-concentration p-type semiconductor layer (8).
摘要翻译：本发明的半导体发光装置（11）包括：基板（1）; 由形成在基板（1）上的n型半导体层（3）和层叠在n型半导体层（3）上的发光层（4）构成的层叠半导体层（15）和p型层叠在发光层（4）上的半导体层（5）用于提高光提取效率的凹凸部（33），其形成在层叠半导体层（15）的顶表面（15a）的全部或一部分上; 层叠在构成凹凸部（33）的凸部（33a）上的掺杂剂浓度高于p型半导体层（5）的高浓度p型半导体层（8）的层叠半导体层（15）。和至少层叠在高浓度p型半导体层（8）上的半透明电流扩散层（20）。

59. 发明授权

US07964980B2 Wind turbine generator system 有权
公开(公告)号：US07964980B2
公开(公告)日：2011-06-21
申请号：US12940737
申请日：2010-11-05
申请人： Masaya Ichinose , Motoo Futami , Hiromitsu Sakai
发明人： Masaya Ichinose , Motoo Futami , Hiromitsu Sakai
IPC分类号： H02P9/44 , H02P9/47
CPC分类号： H02P9/007 , F03D7/026 , F03D9/255 , F05B2270/337 , H02P9/10 , H02P2101/15 , Y02E10/723 , Y10T307/735
摘要： To shorten a startup interval to reach a synchronizing condition, a phase difference and an amplitude difference between the grid voltage and the stator voltage of one phase of a winding are obtained. The difference in amplitude is decreased prior to or in parallel to synchronizing the stator voltage with the grid voltage. The calculated compensation phase compensation value is used as an initial value for synchronizing at the next synchronizing operation.

60. 发明授权

US07951617B2 Group III nitride semiconductor stacked structure and production method thereof 有权
标题翻译： III族氮化物半导体层叠结构及其制造方法
公开(公告)号：US07951617B2
公开(公告)日：2011-05-31
申请号：US11543950
申请日：2006-10-06
申请人： Hiromitsu Sakai
发明人： Hiromitsu Sakai
IPC分类号： H01L21/00
CPC分类号： H01L33/12 , H01L33/007 , H01L33/16
摘要： An object of the present invention is to provide a group III nitride semiconductor stacked structure having a high-quality A-plane group III nitride semiconductor layer on an R-plane sapphire substrate.The inventive group III nitride semiconductor stacked structure comprises a substrate composed of R-plane sapphire (α-Al2O3), a buffer layer composed of aluminum gallium nitride (AlxGa1-xN: 0≦X≦1) formed on said substrate and an underlying layer composed of an A-plane group III nitride semiconductor (AlxGayInzN1-aMa: 0≦X≦1, 0≦Y≦1, 0≦Z≦1, and X+Y+Z=1; wherein, M represents a group V element other than nitrogen (N), and 0≦a≦1) formed on said buffer layer, wherein the pit density of the surface of said underlying layer is 1×1010 cm−2 or less.
摘要翻译：本发明的目的是提供一种在R平面蓝宝石衬底上具有高质量A面III族氮化物半导体层的III族氮化物半导体层叠结构。本发明的III族氮化物半导体层叠结构包括由R平面蓝宝石（α-Al 2 O 3）构成的衬底，由形成在所述衬底上的氮化镓铝（Al x Ga 1-x N：O＆amp; N 1; X 1; N 1; E 1）构成的缓冲层，由A面III族氮化物半导体（AlxGayInzN1-aMa：0＆nlE; X＆lt; 1; 0＆amp; nlE; Y＆lt; 1; 0＆amp; nlE; Z＆nlE; 1和X + Y + Z = 1组成;其中，M表示V族元素除了形成在所述缓冲层上的氮（N）和0＆lt; nlE; a＆nlE; 1）之外，其中所述下层的表面的凹坑密度为1×10 10 cm -2以下。

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