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    • 58. 发明授权
    • Cache memory having sector function
    • 具有扇区功能的缓存存储器
    • US08583872B2
    • 2013-11-12
    • US12193888
    • 2008-08-19
    • Shuji YamamuraMikio HondouIwao YamazakiToshio Yoshida
    • Shuji YamamuraMikio HondouIwao YamazakiToshio Yoshida
    • G06F12/00G06F13/00G06F13/28
    • G06F12/127
    • A cache memory having a sector function, operating in accordance with a set associative system, and performing a cache operation to replace data in a cache block in the cache way corresponding to a replacement cache way determined upon an occurrence of a cache miss comprises: storing sector ID information in association with each of the cache ways in the cache block specified by a memory access request; determining, upon the occurrence of the cache miss, replacement way candidates, in accordance with sector ID information attached to the memory access request and the stored sector ID information; selecting and outputting a replacement way from the replacement way candidates; and updating the stored sector ID information in association with each of the cache ways in the cache block specified by the memory access request, to the sector ID information attached to the memory access request.
    • 具有根据设定的关联系统操作的扇区功能的高速缓存存储器,并且执行高速缓存操作以以与在发生高速缓存未命中时确定的替换高速缓存方式相对应的高速缓存方式来替换高速缓存块中的数据包括:存储 与由存储器访问请求指定的高速缓存块中的每个缓存路径相关联的扇区ID信息; 根据附加到存储器访问请求的扇区ID信息和存储的扇区ID信息,确定高速缓存未命中的替换方式候选; 从替代方式候选人中选择和输出替代方式; 以及将与由存储器访问请求指定的高速缓存块中的每个高速缓存路径相关联地存储的扇区ID信息更新到附加到存储器访问请求的扇区ID信息。
    • 59. 发明授权
    • Allocating rename register from separate register sets for each result data of multiple data processing instruction
    • 为多个数据处理指令的每个结果数据,从单独的寄存器集分配重命名寄存器
    • US08438366B2
    • 2013-05-07
    • US12805476
    • 2010-08-02
    • Yasunobu AkizukiToshio Yoshida
    • Yasunobu AkizukiToshio Yoshida
    • G06F9/345
    • G06F9/30036G06F9/30112G06F9/3012G06F9/3013G06F9/384G06F9/3857G06F9/3885G06F9/3891
    • Multiple data processing instructions instruct a computing device to process multiple data including first data and second data. When a multiple data processing instruction is decoded, two allocatable registers are selected. One is used to store the result of a processing operation performed on first data by one processing unit, and the other is used to store the result of a processing operation performed on second data by another processing unit. Those stored processing results are then transferred to result registers. Normal data processing instructions, on the other hand, instruct a processing operation on third data. When a normal data processing instruction is decoded, one allocatable register is selected and used to store the result of processing that a processing unit performs on the third data. The stored processing result is then transferred to a result register.
    • 多个数据处理指令指示计算设备处理包括第一数据和第二数据的多个数据。 当多重数据处理指令被解码时,选择两个可分配寄存器。 一个用于存储由一个处理单元对第一数据执行的处理操作的结果,另一个用于存储由另一处理单元对第二数据执行的处理操作的结果。 然后将那些存储的处理结果传送到结果寄存器。 另一方面,正常数据处理指令指示关于第三数据的处理操作。 当正常数据处理指令被解码时,选择一个可分配寄存器并用于存储处理单元对第三数据执行的处理结果。 然后将存储的处理结果传送到结果寄存器。