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51. 发明专利

JPS60220617A LEVEL SHIFTER 失效
公开(公告)号：JPS60220617A
公开(公告)日：1985-11-05
申请号：JP7892784
申请日：1984-04-17
申请人： MITSUBISHI ELECTRIC CORP
发明人： MAKINO HIROYUKI , TAKANO SATOSHI
IPC分类号： H03K5/02 , H03K19/0185 , H03K19/0952
摘要： PURPOSE:To obtain a level shifter which shifts an input potential level with one normally turn-off MESFET, two normally turn-on MESFETs, and one voltage drop element. CONSTITUTION:When a signal input is in the low level of an earth potential, the potential in a node 26 is -phiB because the input signal has the voltage dropped by a Schottky barrier phiB by a Schottky diode 21. At this time, a normally turn- off MESFET23 is made conductive, and the potential of an output node 28 is lowered to the negative level -phiB. When a high-level signal having a potential VH is inputted, the potential in the node 26 becomes VH-phiB because of similar voltage drop of phiB. At this time, the FET23 is made nonconductive, and the potential of the output node 28 goes to the high level. Thus, the level shifter which shifts the input potential level is obtained.

52. 发明专利

JPS56129367A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPS56129367A
公开(公告)日：1981-10-09
申请号：JP3289380
申请日：1980-03-14
申请人： MITSUBISHI ELECTRIC CORP
发明人： YOSHIHARA TSUTOMU , TAKANO SATOSHI
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108
摘要： PURPOSE:To prevent a mulfunction from being caused by incidence of radioactive rays by a method wherein an electric charge reservoiring region and bit line region having conductivities different from that of a substrate are surrounded on the peripheries by regions with density higher than the substrate and having the same conductivity as that of the substrate. CONSTITUTION:An N -region 6 as the electric charge reservoiring region of a memory cell and an N -region 7 as the bit line are surrounded on the peripheries by P -regions 12, 13 in higher density than a P type semiconductor substrate. Whereby electrons diffused from the substrate 1, out of electrons and holes pair created in the substrate 1 by radioactive rays of alpha-ray and the like, are recombined in the regions 12, 13 and not collected in the regions 6, 7. In addition, since a potential barrier against the electrons is formed on the interface of the substrate 1 and the regions 12, 13, the electrons smaller in energy out of the electrons diffused from the substrate 1 cannot pass through the potential barrier. Accordingly, the electrons are collected in the regions 6, 7 to cause the memory information to be inverted and the mulfunctions are prevented from being caused.

53. 发明专利

JPS5593266A ELECTRIC CHARGE TRANSFERRTYPE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5593266A
公开(公告)日：1980-07-15
申请号：JP148379
申请日：1979-01-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： FUJISHIMA KAZUYASU , YAMADA MICHIHIRO , TAKANO SATOSHI , TADA TETSUO
IPC分类号： H01L29/762 , H01L21/339 , H01L29/768
摘要： PURPOSE:To transfer sufficient electric charge with the assistance of two-phase CP by piling the upper layer of transfer gate electrode over the entire lower layer and forming a large coupling capacitance between the both layers. CONSTITUTION:The transfer gate electrode shall be of two-layers structure, and part 2a of the upper layer is overlapped on the lower layer occupying an area more than twice the size of 2b. The upper layer electrode 2 is earthed through a diffusion layer of large resistance value. For this reason, time constant based on a coupling capacitance and resistance between the upper layer 2 and the lower layer 1, is large. In addition, the upper layer gate electrode 2 suffers voltage fluctuation due to CP applied to the lower gate electrode 1. The subsequent effect is determined by the time constant. Electric charge transfer makes the use of this voltage fluctuation. The electric charge to be transferred is determined by the area of the lower electrode 1, while the upper layer electrode 2 acts on only the movement of electric charge but does not accumulate electric charge. Transfer of the electric charge is performed by adding two-phase clock voltage phi1, phi2 to the lower layer electrode 1. Under this constitution, peripheral circuit is simplified and sufficient transferred electric charge volume is obtained.

54. 发明专利

JPH03201462A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH03201462A
公开(公告)日：1991-09-03
申请号：JP34023589
申请日：1989-12-28
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO SATOSHI
IPC分类号： H01L21/82
摘要： PURPOSE:To improve an alignment mark in detection accuracy so as to enable a first layer as a laser fuse to be precisely irradiated with laser rays by a method wherein a groove is formed around a second layer on a substrate, and a third layer of high reflectivity serving as an alignment mark is formed on the groove and at least on a part of the second layer. CONSTITUTION:Only the surface of a substrate 8 where a groove 12 is provided is exposed, a resist 17 is formed on the whole face, and the groove 12 is formed on the exposed surface of the substrate 8 around a second layer 11 through etching using a resist 16 on the second layer 11 and a new resist 17 as a mask. Then, the resists 16 and 17 are removed, an insulating layer 13 is formed on the whole face of the substrate 8, a third layer 14 of aluminum is formed on the insulating layer 13 covering the groove 12 and the second layer 11. By this setup, the groove 12 is provided to the surface of the substrate 8 around the second layer 11, whereby the third layer 14 can be made large in level difference at its sloping part and in reflectivity change due to scanning with laser rays.

55. 发明专利

JPH0325946B2 失效
公开(公告)号：JPH0325946B2
公开(公告)日：1991-04-09
申请号：JP3200682
申请日：1982-02-26
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO SATOSHI
IPC分类号： H01L29/80 , G11C11/41 , H01L21/338 , H01L27/10 , H01L27/11 , H01L29/812

56. 发明专利

JPH0378240A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH0378240A
公开(公告)日：1991-04-03
申请号：JP21524589
申请日：1989-08-21
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO SATOSHI
IPC分类号： H01L21/66
摘要： PURPOSE:To correct the rotational deviations of a pad electrode and a probe needle by electrically connecting first, second and third pad electrodes on a chip and setting the circular extension directions of the second and third electrodes to reversely rotating direction to the contact position of the needle. CONSTITUTION:It is assumed that, when probe needles 6, 7, 8 are rotatably deviated to pad electrodes 3, 4a, 5a, the needle is, for example, rotated counterclockwise at the electrode 3 as a center. In this case, the needle 7 is disposed on the electrode 4a, but the needle 8 is removed from the electrode 5a. That is, since the needles 6, 7 are conducted, but the needles 6, 8 are not conducted. On the contrary, if it is rotatably deviated clockwise, the needles 6, 8 are conducted, but the needles 6, 7 are not conducted. The combination of conduction or nonconduction of the needles 6-8 is checked from this to know the direction of the rotational deviation of the needles 6-8. The combination signals are combined, its logic signal is input to a probe card rotating motor to be corrected.

57. 发明专利

JPS63142870A MANUFACTURE OF GALLIUM ARSENIDE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPS63142870A
公开(公告)日：1988-06-15
申请号：JP29072486
申请日：1986-12-05
申请人： MITSUBISHI ELECTRIC CORP
发明人： MATSUE SHUICHI , TAKANO SATOSHI , MAKINO HIROYUKI
IPC分类号： H01L21/28 , H01L21/338 , H01L29/80 , H01L29/812
摘要： PURPOSE:To manufacture device constitution simply by controlling the quantity of etching in the lateral direction and forming a gate electrode under an undercut state while each shaping respective active layer and each source and drain electrode on separate active layer in a self-alignment manner to the gate electrode. CONSTITUTION:A gate electrode 4 is shaped under an undercut state through isotropic sputter etching, using a resist 3 as a mask. the quantity of etching in the lateral direction, the quantity of undercut, of the gate electrode 4 can be adjusted easily by the etching strength of isotropic sputter etching at that time. Si in high concentration is implanted selectively to an N-layer 2 through an ion implantation method, employing the first resist 3 as a mask, each active N-layer 5, 5 as source and drain regions is formed selectively while said first resist 3 is used as the mask again, and ohmic metal layers 7, 8 and 9 are evaporated onto these regions and resist.

58. 发明专利

JPS6239075A GALLIUM ARSENIDE SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPS6239075A
公开(公告)日：1987-02-20
申请号：JP17900385
申请日：1985-08-14
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO SATOSHI , MAKINO HIROYUKI
IPC分类号： H01L29/812 , H01L21/338 , H01L29/80
摘要： PURPOSE:To reduce the source resistance and drain resistance of FET by reducing the interval between source and drain electrodes and a gate electrode by forming the gate electrode in self-alignment to the source and drain electrodes. CONSTITUTION:An ohmic metal 3 is spread over a low-concentration impurity region 4 formed on a GaAs substrate 1 and a gate electrode pattern is formed of a photoresist 7. The ohmic metal 3 is undercut for the resist pattern by anisotropic and isotropic etching. The gate metal is spread and the gate electrode 2 is formed in self-alignment to the source and drain electrode 3. The interval between the gate electrode 2 controlling the undercutting quantity of the source and drain electrodes 3 by isotropic etching. Accordingly, the enhancement of a source resistance and a drain resistance can be prevented by reducing the interval between the gate electrode and the source and drain electrodes.

59. 发明专利

JPS612305B2 JPS612305B2 - 失效
公开(公告)号：JPS612305B2
公开(公告)日：1986-01-23
申请号：JP16160781
申请日：1981-10-09
申请人： Mitsubishi Electric Corp
发明人： TAKANO SATOSHI , FUJISHIMA KAZUYASU
IPC分类号： G11C11/404 , H01L21/76 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H01L29/78
CPC分类号： H01L27/108

60. 发明专利

JPS5798186A SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPS5798186A
公开(公告)日：1982-06-18
申请号：JP17671680
申请日：1980-12-11
申请人： MITSUBISHI ELECTRIC CORP
发明人： TAKANO SATOSHI
IPC分类号： G11C11/413 , G06F12/16 , G11C5/00 , G11C29/00 , G11C29/56
摘要： PURPOSE:To prevent a soft error generated in a memory unit without increasing the power consumption remarkably, by controlling the supply voltage of the memory unit by a signal from a radiant ray detecting unit. CONSTITUTION:This device is provided with a radiant ray detecting unit 15 for detecting a radiant ray which is made incident to a memory unit 11, so that supply voltage Vcc of the memory unit 11 is controlled by a radiant ray detecting signal TSG from this detecting unit 15. For instance, the radiant ray detecting unit 15 whose response speed is high, for detecting a thermal neutron NTN which is made incident to the memory unit 11 is placed so as to surround a part or the whole of the memory unit 11. In this state, an electric power supply unit 14 is controlled by a trigger signal TSG from this detecting unit 15, and supply voltage Vcc is held temporarily at a higher value than usual, only in the period in which an electron generated as a result of the fact that the thermal neutron NTN has been made incident to a memory chip is decreased to the extent of generating no soft error.

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