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51. 发明授权

US5567644A Method of making a resistor 失效
标题翻译：制作电阻的方法
公开(公告)号：US5567644A
公开(公告)日：1996-10-22
申请号：US528124
申请日：1995-09-14
申请人： J. Brett Rolfson , Monte Manning
发明人： J. Brett Rolfson , Monte Manning
IPC分类号： H01L21/02 , H01L21/768 , H01L21/8244 , H01L27/11
CPC分类号： H01L28/20 , H01L21/76888 , H01L21/76895 , H01L27/11 , H01L27/1112 , Y10S257/903 , Y10S257/904 , Y10S438/98
摘要： Disclosed are methods of forming resistors and diodes from semiconductive material, and static random access memory (SRAM) cells incorporating resistors, and to integrated circuitry incorporating resistors and diodes. A node to which electrical connection is to be made is provided. An electrically insulative layer is provided outwardly of the node. An opening is provided in the electrically insulative layer over the node. The opening is filled with semiconductive material which depending on configuration serves as one or both of a vertically elongated diode and resistor.
摘要翻译：公开了从半导体材料形成电阻器和二极管的方法，以及结合电阻器的静态随机存取存储器（SRAM）单元以及并入电阻器和二极管的集成电路的方法。提供要进行电连接的节点。在节点外部设置一个电绝缘层。在节点上的电绝缘层中设置开口。开口填充有半导体材料，其取决于配置用作垂直细长的二极管和电阻器中的一个或两个。

52. 发明授权

US5495959A Method of making substractive rim phase shifting masks 失效
标题翻译：制造消减边缘相移掩模的方法
公开(公告)号：US5495959A
公开(公告)日：1996-03-05
申请号：US489777
申请日：1995-06-13
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： G03F1/29 , B44C1/22
CPC分类号： G03F1/29
摘要： An improved method for fabricating phase shifting masks suitable for semiconductor manufacture is provided. A photolithographic mask blank comprising a transparent substrate having an opaque layer of a standard thickness is provided. Using a photoresist mask, the opaque layer is patterned and etched with openings to form opaque light blockers. The substrate under the openings is then etched to a predetermined depth using the same photoresist mask or the opaque layer as a hard mask. A phase shift material, such as silicon dioxide, is then deposited over the opaque light blockers and into the openings to form rim phase shifters on the sidewalls of the light blockers and light transmission areas in the openings. The depth of the etch into the substrate and the thickness of the opaque layer determines the amount of the phase shift. These parameters are controlled to achieve a phase shift of 180.degree. or odd multiple thereof.
摘要翻译：提供了一种用于制造适合于半导体制造的相移掩模的改进方法。提供一种包括具有标准厚度的不透明层的透明基板的光刻掩模坯料。使用光致抗蚀剂掩模，将不透明层图案化并用开口蚀刻以形成不透明光阻挡剂。然后使用相同的光致抗蚀剂掩模或不透明层作为硬掩模将开口下方的基底蚀刻至预定深度。然后将相移材料（例如二氧化硅）沉积在不透明光阻挡件上并进入开口中，以在光阻挡件的侧壁和开口中的光透射区域上形成边缘移相器。蚀刻到衬底中的深度和不透明层的厚度决定了相移量。控制这些参数以实现180°或其奇数倍的相移。

53. 发明授权

US5372901A Removable bandpass filter for microlithographic aligners 失效
标题翻译：用于微光刻对准器的可移动带通滤光片
公开(公告)号：US5372901A
公开(公告)日：1994-12-13
申请号：US927210
申请日：1992-08-05
申请人： J. Brett Rolfson , David A. Cathey
发明人： J. Brett Rolfson , David A. Cathey
IPC分类号： G03F1/00 , G03F1/26 , G03F7/20 , G03F9/00
CPC分类号： G03F1/26 , G03F7/70575
摘要： A removable bandpass filter layer (22), which is preferably part of a pattern transfer tool (10), improves the resolution of a semiconductor wafer aligner that uses a relatively broad bandwidth radiation source. A narrower bandwidth filter layer provides more complete destructive interference of undesirable diffraction patterns when it is used with a phase-shift pattern transfer tool and removes radiation of longer wavelengths to improve resolution when it is used with a nonphase-shift pattern transfer tool. Using a removable bandpass filter layer, rather than permanently installing a narrow bandpass filter in the aligner, does not affect the speed of patterning layers that do not require the enhanced resolution. The same aligner can thus be used for either high resolution or high throughput without substantial modification to the aligner.
摘要翻译：优选为图案转印工具（10）的一部分的可拆卸带通滤光层（22）提高了使用相对宽的带宽辐射源的半导体晶片对准器的分辨率。较窄的带宽滤波器层当与相移图案转移工具一起使用时，提供更为完整的不希望的衍射图形的相消干涉，并且当与非相移图案转印工具一起使用时，可以去除较长波长的辐射以提高分辨率。使用可拆卸的带通滤光层，而不是在对准器中永久性安装窄带通滤光片，不会影响不需要增强分辨率的图案层的速度。因此，相同的对准器可以用于高分辨率或高通量而不对对准器进行实质修改。

54. 发明授权

US5358599A Process for etching a semiconductor device using an improved protective etching mask 失效
标题翻译：使用改进的保护蚀刻掩模蚀刻半导体器件的工艺
公开(公告)号：US5358599A
公开(公告)日：1994-10-25
申请号：US84394
申请日：1993-06-29
申请人： David A. Cathey , J. Brett Rolfson
发明人： David A. Cathey , J. Brett Rolfson
IPC分类号： H01L21/30 , H01L21/02 , H01L21/027 , H01L21/302 , H01L21/3065 , H01L21/308 , H01L21/311 , H01L21/3213 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/10 , H01L27/108 , H01L21/306 , B44C1/22
CPC分类号： H01L28/40 , H01L21/0274 , H01L21/3081 , H01L21/31144 , H01L21/32139 , Y10S438/948
摘要： The subject process relates to the etching of a semiconductor device having a re-entrant profile area which causes residual positive photoresist material to remain therewithin after formation of an etch mask of the positive photoresist material. A negative photoresist etch mask is formed on a major surface of the outer conductive film structural layer. The etch mask comprises a plurality of photoresist lines arranged in a predetermined pattern which defines a plurality of spaces therebetween, which in turn expose a plurality of areas of the major surface of the semiconductor device. Substantially all of the negative photosensitive material located within the re-entrant profile area is removed during the etch mask formation process. The exposed areas of the major surface of the outer structural layer can then be etched to form the requisite etch pattern with a chemical etchant system without regard to interference by unwanted residual photoresist material.
摘要翻译：本发明涉及一种半导体器件的蚀刻，该半导体器件具有在形成正型光致抗蚀剂材料的蚀刻掩模之后残留的正性光致抗蚀剂材料保留在其中的重新设计的轮廓区域。在外导电膜结构层的主表面上形成负光致抗蚀剂蚀刻掩模。蚀刻掩模包括以预定图案布置的多个光致抗蚀剂线，其限定了它们之间的多个间隔，其又暴露半导体器件的主表面的多个区域。在蚀刻掩模形成工艺期间，基本上所有位于重入轮廓区域内的负感光材料都被去除。然后可以用化学蚀刻剂系统蚀刻外部结构层的主表面的暴露区域以形成必要的蚀刻图案，而不考虑不想要的残留光致抗蚀剂材料的干扰。

55. 发明授权

US5329207A Field emission structures produced on macro-grain polysilicon substrates 失效
标题翻译：在大颗粒多晶硅基板上产生的场致发射结构
公开(公告)号：US5329207A
公开(公告)日：1994-07-12
申请号：US883629
申请日：1992-05-13
申请人： David A. Cathey , J. Brett Rolfson , Tyler A. Lowrey , Trung T. Doan
发明人： David A. Cathey , J. Brett Rolfson , Tyler A. Lowrey , Trung T. Doan
IPC分类号： H01J1/30 , H01J1/304 , H01J9/02 , H01J29/04 , H01J31/12
CPC分类号： H01J1/3042 , H01J9/025 , H01J2201/30407
摘要： A baseplate for a flat panel display comprising relatively thick semiconductor substrate, wherein the semiconductor substrate is a macro-grain polycrystalline substrate, which is amorphized by ion implantation or reformed by recrystallization, to obscure the grain boundaries, thereafter redundant circuitry may be fabricated thereon to further enhance product yield.
摘要翻译：一种用于平板显示器的底板，包括相对厚的半导体衬底，其中半导体衬底是通过离子注入而非晶化或通过重结晶重新形成的宏晶多晶衬底，以掩盖晶界，此后可制造冗余电路，进一步提高产品产量。

56. 发明申请

US20080057411A1 Methods for forming and cleaning photolithography reticles 有权
标题翻译：光刻掩模版的形成和清洁方法
公开(公告)号：US20080057411A1
公开(公告)日：2008-03-06
申请号：US11515089
申请日：2006-08-31
申请人： Craig M. Carpenter , James Baugh , Steve McDonald , Robert Rasmussen , J. Brett Rolfson , Azeddine Zerrade
发明人： Craig M. Carpenter , James Baugh , Steve McDonald , Robert Rasmussen , J. Brett Rolfson , Azeddine Zerrade
IPC分类号： A47G1/12 , G03C5/00 , G03F1/14 , G03F1/00
CPC分类号： G03F1/82 , G03F1/32 , G03F1/54 , G03F1/80
摘要： A method for removing impurities (e.g., atomic sulfur) from a reticle for use in photolithography is provided. In one embodiment, a reticle (or photomask) comprising a plate, a first layer over the plate, and a photoresist layer over the first layer is provided. The photoresist layer is removed with a first chemistry comprising a sulfur-containing compound. At least a portion of the first layer is removed with a second chemistry comprising a sulfur-containing etchant, thereby exposing portions of the plate. Removing the photoresist layer and/or at least a portion of the first layer leaves sulfur on at least portions of the reticle. In a cleaning step, the reticle is contacted with one or more excited species of oxygen to remove residual sulfur and other contaminants, such as carbon, sulfur and oxygen-containing species. Methods of embodiments can be used to clean, e.g., binary photomasks, attenuated phase shift masks (APSMs) and high transmission attenuated photomasks.
摘要翻译：提供从用于光刻的掩模版中除去杂质（例如原子硫）的方法。在一个实施例中，提供了包括板，板上的第一层和第一层上的光致抗蚀剂层的掩模版（或光掩模）。用包含含硫化合物的第一化学物质除去光致抗蚀剂层。用包含含硫蚀刻剂的第二化学物质除去第一层的至少一部分，从而暴露板的部分。去除光致抗蚀剂层和/或第一层的至少一部分在掩模版的至少部分上留下硫。在清洁步骤中，将掩模版与一种或多种激发的氧气接触以除去残留的硫和其它污染物，例如碳，硫和含氧物质。实施例的方法可用于清洁例如二值光掩模，衰减相移掩模（APSM）和高透射衰减光掩模。

57. 发明授权

US07226708B2 Multi-layer, attenuated phase-shifting mask 有权
标题翻译：多层衰减相移掩模
公开(公告)号：US07226708B2
公开(公告)日：2007-06-05
申请号：US11154265
申请日：2005-06-15
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： G03F1/00
CPC分类号： G03F1/32 , G03F1/29
摘要： The present invention provides an attenuated phase shift mask (“APSM”) that, in each embodiment, includes completely transmissive regions sized and shaped to define desired semiconductor device features, slightly attenuated regions at the edges of the completely transmissive regions corresponding to isolated device features, highly attenuated regions at the edges of completely transmissive regions corresponding to closely spaced or nested device features, and completely opaque areas where it is desirable to block transmission of all radiation through the APSM. The present invention further provides methods for fabricating the APSMs according to the present invention.
摘要翻译：本发明提供了衰减相移掩模（“APSM”），其在每个实施例中包括尺寸和形状以确定期望的半导体器件特征的完全透射区域，在完全透射区域的边缘处对应于隔离的器件特征的略微衰减的区域在完全透射区域的边缘处的高度衰减的区域对应于紧密间隔或嵌套的器件特征，以及完全不透明的区域，其中期望阻止通过APSM的所有辐射的透射。本发明还提供了制造根据本发明的APSM的方法。

58. 发明授权

US07147974B2 Methods for converting reticle configurations 失效
标题翻译：转换标线配置的方法
公开(公告)号：US07147974B2
公开(公告)日：2006-12-12
申请号：US10686342
申请日：2003-10-14
申请人： Randall W. Chance , J. Brett Rolfson , Azeddine Zerrade
发明人： Randall W. Chance , J. Brett Rolfson , Azeddine Zerrade
IPC分类号： G01F9/00
CPC分类号： G03F1/32 , C03C15/00 , G03F1/26 , G03F1/72
摘要： The invention includes methods of converting reticles from configurations suitable for utilization with later generation (shorter wavelength) stepper radiations to configurations suitable for utilization with earlier generation (longer wavelength) stepper radiations. The invention can be utilized for converting a reticle from a configuration suitable for 193 nanometer wavelength radiation to a configuration suitable for 248 nanometer wavelength radiation. In such aspect, a quartz-containing material of a substrate can be protected with a patterned layer consisting essentially of molybdenum and silicon while the quartz-containing material is subjected to a dry etch. The configuration suitable for 248 nanometer wavelength radiation can be constructed so that a phase of 248 nanometer wavelength radiation is shifted by about 180° upon passing through combined thicknesses of the patterned layer and the quartz-containing material, relative to 248 nanometer wavelength radiation which passes only through the quartz-containing material.
摘要翻译：本发明包括从适合于利用后代（较短波长）步进辐射的配置转换掩模版到适于利用早期生成（更长波长）步进辐射的配置的方法。本发明可用于将掩模版从适于193纳米波长辐射的配置转换成适合于248纳米波长辐射的配置。在这种方面，可以用基本上由钼和硅组成的图案层来保护衬底的含石英材料，同时对含石英的材料进行干蚀刻。可以构造适合于248纳米波长辐射的配置，使得248纳米波长辐射的相位相对于通过图案化层和含石英的材料的组合厚度相对于相对于通过的248纳米波长辐射而偏移大约180度仅通过含石英材料。

59. 发明授权

US06908715B2 Multi-layer, attenuated phase-shifting mask 有权
标题翻译：多层衰减相移掩模
公开(公告)号：US06908715B2
公开(公告)日：2005-06-21
申请号：US10629641
申请日：2003-07-29
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： G03F1/00 , G03F1/32 , G03F9/00
CPC分类号： G03F1/32 , G03F1/29
摘要： The present invention provides an attenuated phase shift mask (“APSM”) that, in each embodiment, includes completely transmissive regions sized and shaped to define desired semiconductor device features, slightly attenuated regions at the edges of the completely transmissive regions corresponding to isolated device features, highly attenuated regions at the edges of completely transmissive regions corresponding to closely spaced or nested device features, and completely opaque areas where it is desirable to block transmission of all radiation through the APSM. The present invention further provides methods for fabricating the APSMs according to the present invention.
摘要翻译：本发明提供了衰减相移掩模（“APSM”），其在每个实施例中包括尺寸和形状以确定期望的半导体器件特征的完全透射区域，在完全透射区域的边缘处对应于隔离的器件特征的略微衰减的区域在完全透射区域的边缘处的高度衰减的区域对应于紧密间隔或嵌套的器件特征，以及完全不透明的区域，其中期望阻止通过APSM的所有辐射的透射。本发明还提供了制造根据本发明的APSM的方法。

60. 发明授权

US06696224B2 Methods of masking and etching a semiconductor substrate, and ion implant lithography methods of processing a semiconductor substrate 失效
标题翻译：掩模和蚀刻半导体衬底的方法以及处理半导体衬底的离子注入光刻方法
公开(公告)号：US06696224B2
公开(公告)日：2004-02-24
申请号：US10293164
申请日：2002-11-12
申请人： J. Brett Rolfson
发明人： J. Brett Rolfson
IPC分类号： G03F726
CPC分类号： H01L21/31133 , H01L21/0273
摘要： A method of masking and etching a semiconductor substrate includes forming a layer to be etched over a semiconductor substrate. An imaging layer is formed over the layer to be etched. Selected regions of the imaging layer are removed to leave a pattern of openings extending only partially into the imaging layer. After the removing, the layer to be etched is etched using the imaging layer as an etch mask. In one implementation, an ion implant lithography method of processing a semiconductor includes forming a layer to be etched over a semiconductor substrate. An imaging layer of a selected thickness is formed over the layer to be etched. Selected regions of the imaging layer are ion implanted to change solvent solubility of implanted regions versus non-implanted regions of the imaging layer, with the selected regions not extending entirely through the imaging layer thickness. The ion implanted regions of the imaging layer are removed to leave a pattern of openings extending only partially into the imaging layer. After the removing, the layer to be etched is etched using the imaging layer as an etch mask.
摘要翻译：掩模和蚀刻半导体衬底的方法包括在半导体衬底上形成待蚀刻的层。在待蚀刻的层上形成成像层。去除成像层的选定区域以留下仅部分地延伸到成像层中的开口图案。在去除之后，使用成像层作为蚀刻掩模蚀刻待蚀刻的层。在一个实施方案中，处理半导体的离子注入光刻方法包括在半导体衬底上形成待蚀刻的层。在待蚀刻层上形成所选厚度的成像层。成像层的选定区域被离子注入以改变注入区域对成像层的非注入区域的溶剂溶解度，其中所选择的区域不完全延伸穿过成像层厚度。去除成像层的离子注入区域以留下仅部分地延伸到成像层中的开口图案。在去除之后，使用成像层作为蚀刻掩模蚀刻待蚀刻的层。

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