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    • 51. 发明申请
    • Step-up type DC-DC converter and method for controlling step-up type DC-DC converter
    • 升压型DC-DC转换器和控制升压型DC-DC转换器的方法
    • US20070132435A1
    • 2007-06-14
    • US11362513
    • 2006-02-27
    • Morihito HasegawaHidekiyo OzawaShoji TajiriToshihiko Kasai
    • Morihito HasegawaHidekiyo OzawaShoji TajiriToshihiko Kasai
    • G05F1/00
    • H02M1/36H02M3/156H02M2003/078H03K17/302H03K2217/0018
    • The invention provides a DC-DC converter capable of being started up in a state in which an input voltage is low and capable of being structured without increasing a circuit size. A back-gate voltage (Vsb) is outputted from a back-gate voltage generating circuit (VBGN), and is inputted to a back gate of a transistor (FET1). During a period during which an output voltage (Vout) is lower than a reference voltage (e0), an oscillation signal (OS1) is inputted to a gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at a grounded voltage. Therefore, the transistor (FET1) has a reference threshold voltage (Vto). On the other hand, during a period during which the output voltage (Vout) is higher than the reference voltage (e0), a pulse signal (PS) is inputted to the gate of the transistor (FET1), and the back-gate voltage (Vsb) is set at an output voltage of a charge pump portion (5). Therefore, the transistor (FET1) has a threshold voltage higher than the reference threshold voltage (Vto).
    • 本发明提供一种DC-DC转换器,其能够在输入电压低的状态下启动并且能够在不增加电路尺寸的情况下被构造。 背栅电压(Vsb)从背栅极电压产生电路(VBGN)输出,并被输入到晶体管(FET1)的背栅极。 在输出电压(Vout)低于基准电压(e 0)的期间,将振荡信号(OS1)输入到晶体管(FET1)的栅极,将栅极电压(Vsb )设置在接地电压。 因此,晶体管(FET1)具有参考阈值电压(Vto)。 另一方面,在输出电压(Vout)高于基准电压(e 0)的期间,将脉冲信号(PS)输入到晶体管(FET1)的栅极, 栅极电压(Vsb)设定在电荷泵部(5)的输出电压。 因此,晶体管(FET1)具有高于参考阈值电压(Vto)的阈值电压。
    • 54. 发明授权
    • DC-to-DC converter circuit having a power saving mode
    • 具有省电模式的DC-DC转换器电路
    • US06420858B1
    • 2002-07-16
    • US09466133
    • 1999-12-21
    • Seiya KitagawaToshiyuki MatsuyamaHidekiyo Ozawa
    • Seiya KitagawaToshiyuki MatsuyamaHidekiyo Ozawa
    • G05F140
    • H02M3/1588H02M2001/0032Y02B70/1466Y02B70/16
    • A DC-to-DC converter circuit having a power saving mode, and which achieves a high conversion efficiency without using a sense resistance. The DC-to-DC converter circuit includes a triangular wave generation circuit to generate a triangular wave signal and a differential amplifier to receive the triangular wave signal and to generate an output signal. A main switching element is provided to turn ON and OFF an input voltage, and a synchronous commutating switching element is provided to perform synchronous commutation of a load current. A detection device detects whether an output voltage of the main switching element is larger than an input voltage of the main switching element. A control device operates in a power saving mode to reduce a drive voltage of the main switching element in response to the detection device detecting that the output voltage of the main switching element is larger than the input voltage.
    • 具有省电模式的DC-DC转换器电路,并且在不使用检测电阻的情况下实现高转换效率。 DC-DC转换器电路包括三角波产生电路,用于产生三角波信号,差分放大器接收三角波信号并产生输出信号。 提供主开关元件以接通和断开输入电压,并且提供同步换向开关元件以执行负载电流的同步换向。 检测装置检测主开关元件的输出电压是否大于主开关元件的输入电压。 控制装置以省电模式工作,以响应于检测装置检测到主开关元件的输出电压大于输入电压而降低主开关元件的驱动电压。
    • 55. 发明授权
    • DC-to-DC converter capable of preventing overvoltage
    • DC-DC转换器,能够防止过电压
    • US6046896A
    • 2000-04-04
    • US694581
    • 1996-08-09
    • Mitsuo SaekiHidetoshi YanoHidekiyo Ozawa
    • Mitsuo SaekiHidetoshi YanoHidekiyo Ozawa
    • H02H7/12H02H7/16H02M3/158H02H3/20
    • H02H7/1213H02M3/1588H02H7/16Y02B70/1466
    • To avoid burning out a capacitor in a synchronous rectification type DC-to-DC converter due to overvoltages, the synchronous rectification type DC-to-DC converter includes a storage unit storing therein power derived from a power supply, switching elements connecting and disconnecting respective signal paths from power and ground, and a control unit controlling the connecting/disconnecting operations of the switching elements to maintain a voltage output from the storage unit at a predetermined value. The DC/DC converter also includes an overvoltage detecting unit monitoring a voltage derived from the power supply to thereby output an alarm signal when the voltage derived from the power supply exceeds a preselected voltage value, a shortcircuiting unit influencing the connecting conditions of the switching elements when the alarm signal from the overvoltage detecting unit is input therein, whereby the voltage derived from the power supply is shortcircuited, and an interrupting unit interrupting one of the signal paths by the power shortcircuited by the shortcircuiting unit.
    • 为了避免由于过电压而在同步整流型DC-DC转换器中烧毁电容器,同步整流型DC-DC转换器包括存储单元,其存储来自电源的功率,各自连接和断开的开关元件 来自电源和地的信号路径,以及控制单元,控制开关元件的连接/断开操作,以将从存储单元输出的电压保持在预定值。 DC / DC转换器还包括过电压检测单元,其监视从电源导出的电压,从而当从电源导出的电压超过预选电压值时输出报警信号;影响开关元件的连接条件的短路单元 当来自过电压检测单元的报警信号被输入时,由电源导出的电压短路,并且中断单元通过由短路单元短路的电力中断信号路径之一。
    • 60. 发明授权
    • DC-DC converter control circuit, DC-DC converter, power supply unit, and DC-DC converter control method
    • DC-DC转换器控制电路,DC-DC转换器,电源单元和DC-DC转换器控制方法
    • US07705483B2
    • 2010-04-27
    • US11526051
    • 2006-09-25
    • Hidekiyo OzawaMorihito Hasegawa
    • Hidekiyo OzawaMorihito Hasegawa
    • H02J3/00H02J1/00H02J1/04
    • H02M3/156H02M2001/008H02M2001/009Y10T307/281Y10T307/406
    • An object of the present invention is to provide a DC-DC converter control circuit capable of maintaining, even when any one of a plural number of DC-DC converters enters the abnormal state due to the occurrence of a failure, a voltage relationship between the output voltage of the faulty DC-DC converter and the output voltage of another DC-DC converter. An error amplifier ERA1G has an inverting input, a first non-inverting input, and a second non-inverting input. A first divided voltage VV1 provided from a first voltage divider circuit VD1 is fed into the inverting input; a reference voltage e1G from ground is fed into the first non-inverting input; and a second divided voltage VV2 provided from a second voltage divider circuit VD2 is fed into the second non-inverting input. The error amplifier ERA1G amplifies the error between the lower of the two voltage inputs fed into the two non-inverting inputs (i.e. the lower of the reference voltage e1G and the second divided voltage VV2), and the first divided voltage VV1 fed into the inverting input. The output terminal of the error amplifier ERA1G is connected to the input terminal of a PWM unit P1G.
    • 本发明的一个目的是提供一种DC-DC转换器控制电路,即使当多个DC-DC转换器中的任何一个由于发生故障而进入异常状态时,也能够维持 故障DC-DC转换器的输出电压和另一个DC-DC转换器的输出电压。 误差放大器ERA1G具有反相输入,第一同相输入和第二同相输入。 从第一分压电路VD1提供的第一分压VV1被馈送到反相输入端; 来自地的参考电压e1G被馈送到第一同相输入端; 并且从第二分压器电路VD2提供的第二分压VV2被馈送到第二同相输入端。 误差放大器ERA1G放大馈送到两个同相输入端的两个电压输入的较低端(即,参考电压e1G和第二分压VV2的较低者)之间的误差,并将第一分压VV1馈入反相 输入。 误差放大器ERA1G的输出端连接到PWM单元P1G的输入端。