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    • 55. 发明授权
    • Thin film transistor array substrate and method of fabricating the same
    • 薄膜晶体管阵列基板及其制造方法
    • US07217586B2
    • 2007-05-15
    • US10833185
    • 2004-04-28
    • Kyoung Mook LeeSeung Hee NamJae Young Oh
    • Kyoung Mook LeeSeung Hee NamJae Young Oh
    • H01L51/40
    • H01L27/124G02F1/1362G02F2001/136236H01L27/1288H01L29/66765
    • A thin film transistor array substrate includes a gate line formed on a substrate, a data line formed on the substrate intersecting with the gate line to define a pixel region, a thin film transistor formed at the intersection of the gate line and the data line, the thin film transistor including gate electrode formed on the substrate, a gate insulating layer formed on the gate electrode and the substrate, a semiconductor layer formed on the gate insulating layer, an ohmic contact layer on the semiconductor layer, and a source electrode and a drain electrode on the ohmic contact layer, and a transparent electrode material within the pixel region and connected to the drain electrode of the thin film transistor, wherein the gate insulating layer includes a gate insulating pattern underlying the data line and the transparent electrode material, and covering the gate line.
    • 薄膜晶体管阵列基板包括形成在基板上的栅极线,形成在与栅极线交叉以限定像素区域的基板上的数据线,形成在栅极线和数据线的交叉处的薄膜晶体管, 所述薄膜晶体管包括形成在所述基板上的栅极电极,形成在所述栅极电极和所述基板上的栅极绝缘层,形成在所述栅极绝缘层上的半导体层,所述半导体层上的欧姆接触层以及源电极和 漏极电极和像素区域内的透明电极材料,并连接到薄膜晶体管的漏电极,其中栅极绝缘层包括位于数据线下方的栅绝缘图案和透明电极材料,以及 覆盖门线。
    • 57. 发明授权
    • Thin film transistor substrate and method for fabricating the same
    • 薄膜晶体管基板及其制造方法
    • US08304776B2
    • 2012-11-06
    • US12877591
    • 2010-09-08
    • Seung Hee Nam
    • Seung Hee Nam
    • H01L29/04H01L29/10H01L31/00
    • H01L27/124H01L27/12
    • The present invention relates to a thin film transistor substrate and method for fabricating the same which can secure an alignment margin and reduce the number of mask steps. A thin transistor substrate according to the present invention includes a gate line and a data line crossing each other to define a pixel, a gate metal pattern under the data line, a thin film transistor having a gate electrode, a source electrode and a drain electrode in the pixel, and a pixel electrode connected to the drain electrode of the thin film transistor by a connection electrode, wherein the data line has a plurality of first slits to disconnect the gate metal pattern from the gate line.
    • 薄膜晶体管基板及其制造方法技术领域本发明涉及薄膜晶体管基板及其制造方法,其可以确保取向余量并减少掩模台阶数。 根据本发明的薄晶体管衬底包括栅极线和彼此交叉以限定像素的数据线,数据线下方的栅极金属图案,具有栅电极,源电极和漏电极的薄膜晶体管 以及通过连接电极连接到薄膜晶体管的漏电极的像素电极,其中数据线具有多个第一狭缝,以将栅极金属图案与栅极线断开。
    • 58. 发明授权
    • Liquid crystal display and fabrication method thereof
    • 液晶显示及其制造方法
    • US07528924B2
    • 2009-05-05
    • US11409055
    • 2006-04-24
    • Seung Hee Nam
    • Seung Hee Nam
    • G02F1/1368G02F1/1345
    • G02F1/1345
    • A liquid crystal display includes a first substrate part, a second substrate part, and a sealant for attaching the first substrate part and the second substrate part; a Vcom terminal in the first substrate part and exposed at an edge of a region where the sealant is formed; a common electrode provided in the second substrate part and exposed at an edge of the region where the sealant is formed; and a conductive member provided at an edge of the region where the sealant is formed, for electrically connecting the Vcom terminal with the common electrode.
    • 液晶显示器包括第一基板部分,第二基板部分和用于附接第一基板部分和第二基板部分的密封剂; 第一基板部分中的Vcom端子,并且在形成密封剂的区域的边缘处露出; 设置在第二基板部分中并在形成密封剂的区域的边缘处露出的公共电极; 以及设置在形成密封剂的区域的边缘处的导电构件,用于将Vcom端子与公共电极电连接。
    • 59. 发明授权
    • Array substrate for liquid crystal display and fabrication method thereof
    • 液晶显示器用阵列基板及其制造方法
    • US07471350B2
    • 2008-12-30
    • US10663774
    • 2003-09-17
    • Kyoung Mook LeeSeung Hee NamJae Young Oh
    • Kyoung Mook LeeSeung Hee NamJae Young Oh
    • G02F1/136G02F1/1343
    • G02F1/136286G02F1/136227G02F1/136277
    • Disclosed is an array substrate for a liquid crystal display, including: a substrate; a gate line and a thin film transistor having a gate electrode, a source electrode, a drain electrode and an active layer formed over the substrate; an interlayer insulating layer formed on the thin film transistor; a first gate redundancy line formed on the interlayer insulating layer, and connected electrically with one of the gate electrode and the gate line through a first gate contact hole and formed of the same material as the source and drain electrodes; a passivation layer provided on the first gate redundancy line and the interlayer insulating layer; and a pixel electrode electrically connected with the drain electrode through the drain contact hole formed in the passivation layer.
    • 公开了一种液晶显示器用阵列基板,包括:基板; 栅极线和薄膜晶体管,其具有形成在衬底上的栅电极,源电极,漏电极和有源层; 形成在薄膜晶体管上的层间绝缘层; 第一栅极冗余线,形成在所述层间绝缘层上,并且通过第一栅极接触孔与所述栅极电极和所述栅极线中的一个电连接并由与所述源极和漏极电极相同的材料形成; 设置在第一栅极冗余线和层间绝缘层上的钝化层; 以及通过形成在钝化层中的漏极接触孔与漏电极电连接的像素电极。