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    • 55. 发明授权
    • Image processing apparatus
    • 图像处理装置
    • US08988496B2
    • 2015-03-24
    • US12915875
    • 2010-10-29
    • Kazuhiro MaedaTakashi KanemaruHidenori Sakaniwa
    • Kazuhiro MaedaTakashi KanemaruHidenori Sakaniwa
    • H04N13/00H04N13/04
    • H04N13/361H04N13/359H04N13/376H04N13/398
    • There is provided an image processing apparatus in which images that can be comfortably viewed by a viewer with less eyestrain can be displayed on a display device. In the image processing apparatus of the present invention in which a three-dimensional image and a two-dimensional image can be simultaneously displayed on a multi-screen, if the three-dimensional image and the two-dimensional image are simultaneously displayed on a display device, the three-dimensional image is converted into two dimensions, and is output to be displayed on the same screen in the same dimensions. Alternatively, in the image processing apparatus in which a three-dimensional image and a two-dimensional image can be simultaneously displayed on a multi-screen, if the three-dimensional image and the two-dimensional image are simultaneously displayed on a display device, the two-dimensional image is converted into three dimensions, and is output to be displayed on the same screen in the same dimensions.
    • 提供了一种图像处理装置,其中可以在显示装置上显示能够由较少眼睛疲劳的观看者舒适地观看的图像。 在本发明的图像处理装置中,三维图像和二维图像可以同时显示在多屏幕上,如果三维图像和二维图像同时显示在显示器上 设备,将三维图像转换为两维,并输出以相同尺寸显示在同一屏幕上。 或者,在三维图像和二维图像可以同时显示在多屏幕上的图像处理装置中,如果三维图像和二维图像同时显示在显示装置上, 将二维图像转换为三维,并输出以相同尺寸显示在同一屏幕上。
    • 57. 发明授权
    • Amplifier circuit and display device including same
    • 放大器电路和显示装置包括它
    • US08384641B2
    • 2013-02-26
    • US12310028
    • 2007-03-27
    • Shinsaku ShimizuKazuhiro Maeda
    • Shinsaku ShimizuKazuhiro Maeda
    • G09G3/36
    • G09G3/3685G09G2310/027G09G2310/0297
    • In one embodiment of the present application, during an initial setting period, switches are rendered conductive, so that voltage on a signal line becomes equal to a source voltage, and input voltages of inverters become equal to a logic threshold voltage. During a writing period, other switches are rendered conductive, and the inverters serve as amplifiers. The last-stage inverter is made up of a P-type Tr14, and an N-type Tr15 having a lower current drive capability than the P-type Tr14. At the beginning of the writing period, the voltage on the signal line varies due to current flowing through the P-type Tr14, and therefore the rate of change of the voltage on the signal line does not change by reducing the current drive capability of the N-type Tr15. On the other hand, by reducing the current drive capability of the N-type Tr15, the output resistance of the inverter increases, so that an amplifier circuit has frequency characteristics with an increased phase margin, resulting in reduced power consumption of the amplifier circuit.
    • 在本申请的一个实施例中,在初始设定期间,使开关导通,使得信号线上的电压变得等于源电压,并且反相器的输入电压变为等于逻辑阈值电压。 在写入期间,其他开关变为导通状态,变换器用作放大器。 最后一级逆变器由P型Tr14和具有比P型Tr14低的电流驱动能力的N型Tr15组成。 在写入周期开始时,信号线上的电压由于电流流经P型Tr14而变化,因此信号线上的电压变化率不会因为降低电流的驱动能力而改变 N型Tr15。 另一方面,通过降低N型Tr15的电流驱动能力,逆变器的输出电阻增加,使得放大器电路具有增加的相位裕度的频率特性,导致放大器电路的功耗降低。
    • 59. 发明申请
    • NETWORK SYSTEM AND METHOD OF OPERATING THE SAME
    • 网络系统及其操作方法
    • US20120300773A1
    • 2012-11-29
    • US13449196
    • 2012-04-17
    • Kazuhiro MaedaShingo Sugawara
    • Kazuhiro MaedaShingo Sugawara
    • H04L12/28H04L12/56
    • H04L45/245H04L61/103Y02D50/30
    • A network system includes a plurality of lower switches, a plurality of upper switches, and a link group for interconnecting the plurality of lower switches to the plurality of upper switches in a multipoint-to-multipoint relationship. The link group includes a sub-link for interconnecting the plurality of lower switches to the plurality of upper switches in a point-to-point relationship as one logical link and a main link for interconnecting the plurality of lower switches to the plurality of upper switches in a point-to-multipoint relationship as one logical link. The plurality of lower switches are each set such that a broadcast frame with a broadcast address set as a destination is transmitted to the plurality of upper switches through the sub-link. The plurality of upper switches each receive the broadcast frame and resister a source address contained in the broadcast frame into an FDB of the plurality of upper switches.
    • 网络系统包括多个下开关,多个上开关和用于以多点对多点关系将多个下开关互连到多个上开关的链路组。 链路组包括用于将多个下层交换机以点对点关系互连为一个逻辑链路的子链路和用于将多个下部交换机互连到多个上部开关的主链路 作为一个逻辑链路的点对多点关系。 多个下位开关各自被设置为使得具有被设置为目的地的广播地址的广播帧通过子链路发送到多个上层交换机。 多个上部开关各自接收广播帧并将包含在广播帧中的源地址重新绑定到多个上部开关的FDB中。