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51. 发明专利

JPH04152564A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH04152564A
公开(公告)日：1992-05-26
申请号：JP27623690
申请日：1990-10-17
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： NANBA MITSUO , NAKAZATO KAZUO , NAKAMURA TORU , SHIMAMOTO HIROMI , WASHIO KATSUYOSHI , ISHIKAWA MICHIO , WAKIMOTO EIJI , TANIZAKI YASUNOBU
IPC分类号： H01L27/04 , H01L21/822
摘要： PURPOSE:To materialize single crystal Si high resistance and improve the depen dency on bias by forming the surface concentration and the junction depth of a resistance layer in specified condition area. CONSTITUTION:For a semiconductor device, which has p-type single crystal Si high resistance, an aperture area is provided in the desired position of the insulating film 2 provided at the surface of an n-type semiconductor substrate 1, and an electrode 3 is made. P-type junction 4 is a resistance layer. And the surface concentration Co [cm ] and the junction depth Xj [mum] are formed in the condition area surrounded by the relation formula (I), and sheet resistance rhos=2.5-100[kpi/squ.], temperature property = 0.50[%/DELTAT[ deg.C]] or less, and temperature at which temperature dependency coefficient is converted from negative to positive = 0[ deg.C] or less.

52. 发明专利

JPH04145657A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH04145657A
公开(公告)日：1992-05-19
申请号：JP26836090
申请日：1990-10-08
申请人： HITACHI LTD , HITACHI DEVICE ENG
发明人： SHIMAMOTO HIROMI , NAKAMURA TORU , NANBA MITSUO , WASHIO KATSUYOSHI
IPC分类号： H01L27/04 , H01L21/822 , H01L23/58
摘要： PURPOSE:To provide a resistance element having arbitrary temperature characteristic without limiting the value of a specific resistance and to facilitate temperature compensation of a resistance value in design of a circuit by connecting resistors each having different temperature dependence in parallel. CONSTITUTION:A resistor is formed of a substrate 1 provided in a P-type silicon substrate 1, an N-type diffused layer 5 as a reverse conductivity type impurity layer and a P-type polycrystalline silicon layer 4a having reverse temperature dependency of a resistance to that of the layer 5 as a parallel resistance circuit. That is, the resistors having different temperature dependences are connected in parallel to form a resistance having small temperature dependence. The resistors having different temperature dependences are connected in parallel in a using temperature range to be an object to obtain the resistors having arbitrary temperature dependence, thereby approaching the temperature dependence to zero. Thus, since the resistor having small temperature dependence, the resistor having arbitrary temperature dependence can be formed without limit the value of the specific resistance, the temperature compensation of the resistance value can be facilitated.

53. 发明专利

JPH04137534A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH04137534A
公开(公告)日：1992-05-12
申请号：JP25698290
申请日：1990-09-28
申请人： HITACHI LTD
发明人： ONOUCHI YUKIHIRO , NAKAMURA TORU , SHIBA TAKEO , TAMAOKI YOICHI , NANBA MITSUO , IKEDA SEIJI , WASHIO KATSUYOSHI
IPC分类号： H01L29/73 , H01L21/331 , H01L29/732
摘要： PURPOSE:To effectively prevent the increase of an emitter series resistance, by constituting a step-difference in an emitter aperture part as two stages. CONSTITUTION:A thick silicon oxide film 2 is thin in the vicinity of an emitter 4. Along said thin part and the surface of the side part, a silicon nitride film 3 is formed. Hence a step-difference of two stages are formed in a large aperture part formed in a polycrystalline silicon film 6 being a base leading-out electrode. A second step-difference determined by the thick silicon oxide film 2 is much larger than the step-difference of an emitter aperture part 10 being a first step-difference. As a result, when the size of an emitter becomes very small, and the emitter aperture part 10 having the first step-difference is filled with a polycrystalline silicon film 1, the outside aperture part having the second step-difference much larger than the first step-difference is not filled up. Thereby the increase of an emitter series resistance can be effectively prevented, so that the operating speed is improved and the cutoff frequency is increased.

54. 发明专利

JPH0360128A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0360128A
公开(公告)日：1991-03-15
申请号：JP19410889
申请日：1989-07-28
申请人： HITACHI LTD
发明人： NAKAZATO KAZUO , NANBA MITSUO , WASHIO KATSUYOSHI , SHIBA TAKEO , NAKAMURA TORU , ONOUCHI MICHIHIRO , HORIUCHI KATSUTADA , IKEDA SEIJI
IPC分类号： H01L29/73 , H01L21/331 , H01L27/082 , H01L29/732
摘要： PURPOSE:To obtain a structure, in which a collector current is augmented without increasing the amount of a stored charge, by a method wherein the boundary surface 1 between first and second regions, the boundary surface 2 between the second region and a third region and the boundary surface 3 between the third region and a fourth region respectively have almost a constant curvature and the boundary surfaces 1 to 3 are provided in such a way that the distance between the boundary surfaces 2 and 1 and the distance between the boundary surfaces 3 and 2 are almost equal to each other. CONSTITUTION:A high-concentration n layer 2 is formed on a low-concentration p substrate 1 and an epitaxial layer is grown. After this, a silicon oxide film 8 is formed and a high-concentration n layer 3 is formed by ion-implantation from over. A polycrystalline silicon layer 9 is formed and a high-concentration p layer 7 is formed by diffusing an impurity from the layer 9. After this, a silicon oxide film 10 and a polycrystalline silicon layer 11 are formed and a base layer 5 and an emitter layer 6 are formed by diffusing an impurity from the layer 11. The layer 5 and the layer 3 exist at almost an equal distance from the layer 6. In such a way, the characteristics of a transistor are improved by a structure where electrons injected from the emitter layer spread as wide as possible.

55. 发明专利

JPH01296660A SEMICONDUCTOR STORAGE DEVICE 失效
公开(公告)号：JPH01296660A
公开(公告)日：1989-11-30
申请号：JP12571888
申请日：1988-05-25
申请人： HITACHI LTD
发明人： SHIBA TAKEO , NAKAMURA TORU , NANBA MITSUO , NAKAZATO KAZUO , YAMAGUCHI KUNIHIKO , UCHIDA AKIHISA , NAKAJIMA SHINJI , KOIZUMI TORU
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8222 , H01L21/8229 , H01L27/06 , H01L27/10 , H01L27/102
摘要： PURPOSE:To reduce respectively the planar dimensions of the connection regions of poly Si base electrodes with single crystal Si high resistors and to contrive a reduction in the area of a memory cell by a method wherein the single crystal Si high resistors are formed in a semiconductor substrate processed into a protruding type and the connection between the high resistors and the poly Si base electrodes is performed on each sidewall of these high resistors. CONSTITUTION:Second conductivity type buried diffused layers 2 and second conductivity type epitaxially grown layers 3 are formed in a first conductivity type semiconductor substrate 1, polycrystalline Si films 7, which are used as base electrodes, are deposited and a first conductivity type impurity is implanted in these films 7 to perform a heat treatment. Moreover, high-concentration first conductivity type diffused regions 8 and 9 are formed in regions where each high resistor, a base diffused layer and each polycrystalline Si base electrode are connected to one another. Then, the base diffused layer 11, an emitter diffused layer 12 and a high-resistance first conductivity type diffused layer 10 of a transistor are respectively provided and the high resistors connected to the transistor and its base electrodes are formed. Thereby, the planar dimensions of the connection regions of the polycrystalline Si base electrodes with the high resistors are respectively reduced and a reduction in the area of a memory cell is contrived.

56. 发明专利

JPS6442172A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6442172A
公开(公告)日：1989-02-14
申请号：JP19805087
申请日：1987-08-10
申请人： HITACHI LTD
发明人： NANBA MITSUO , SHIBA TAKEO , TAKEDA EIJI
IPC分类号： H01L29/73 , H01L21/331 , H01L29/72 , H01L29/732
摘要： PURPOSE:To reduce the biasing effect of a collector current for assuring a large current by forming the opposing surface of collectors and emitters with a plurality of faces. CONSTITUTION:A semiconductor device comprises a burried layer pattern 21, an islet pattern 22 for a base and a collector, an insulating region 36 between the base and the emitter, an emitter islet 23, a base-extraction poly Si layer 24, and a collector-extraction poly Si layer pattern 37, including a collector- contact pattern 38 and a base-contact pattern 25. In such a manner, the opposing surfaces of the collector and the emitter are adapted to include a plurality of faces. Hereby, a large current can be assured corresponding to an increase of the opposing faces even if the biasing effect of a carrier is caused.

57. 发明专利

JPS649654A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS649654A
公开(公告)日：1989-01-12
申请号：JP16391787
申请日：1987-07-02
申请人： HITACHI LTD
发明人： SAGARA KAZUHIKO , SHIMOHIGASHI KATSUHIRO , NAKAMURA TORU , HONMA NORIYUKI , KIMURA KATSUTAKA , NANBA MITSUO , KONDO MASAO , NAKAZATO KAZUO
IPC分类号： H01L27/10 , H01L21/8229 , H01L21/8242 , H01L27/102 , H01L27/108
摘要： PURPOSE:To obtain a memory cell structure to be used for an alpha-ray resisting reinforced dynamic RAM by a method wherein a transistor is constituted by a transistor which can be operated in two directions, and a charge accumulation layer is provided on the surface of a semiconductor device. CONSTITUTION:The transistor 100 is a SICOS type bipolar transistor having the structure wherein a base electrode is picked out by a polycrystalline silicon film 12, and a charge accumulation layer 101, consisting of a polycrystalline silicon film 13, a silicon dioxide film 10 and an electrode 29, is provided directly above said transistor 100. Also, the emitter of the transistor 100 and the charge accumulation layer 101 are connected. As the charge accumulation layer 101 is formed directly above the transistor 100, elements can be formed in a highly integrated manner. Also, as the charge accumulation layer 101 is provided on the element surface, the information breakdown generated by the external noise of electrons, holes and the like caused by alpha-rays can be prevented.

58. 发明专利

JPS63293871A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63293871A
公开(公告)日：1988-11-30
申请号：JP12813787
申请日：1987-05-27
申请人： HITACHI LTD
发明人： NANBA MITSUO , KONDO MASAO , NAKAMURA TORU
IPC分类号： H01L27/04 , H01L21/822 , H01L27/06
摘要： PURPOSE:To reduce the fluctuation to temperature changes of the resistance value of the resistive element built in an integrated circuit, by changing the resistive element formed on a substrate via an insulating film to a thin layer, thereby obtaining a high sheet resistance value and a low resistivity. CONSTITUTION:After forming an insulating film 2 on a semiconductor substrate 1, a polysilicon layer 3 is deposited, and the surface of the layer 3 is oxidized to form a SiO2 film 4. Then, a polysilicon layer 6 is formed to 725Angstrom , and subsequently a SiO2 film 7 of 500Angstrom is formed by oxidation and simultaneously the layer 6 is reduced to 500Angstrom . Thereafter, both end parts of the layers 3, 4, 6, 7 are etched off, and then the insulating film is buried. Then, after forming a high dose region 5 for the contact part of the resistance, B is driven in, and an anneal is performed thereby to obtain a sheet resistance 6. Thereafter, an electrode 8 is formed.

59. 发明专利

JPS6132438A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS6132438A
公开(公告)日：1986-02-15
申请号：JP15286784
申请日：1984-07-25
申请人： Hitachi Ltd
发明人： SHIBA TAKEO , NANBA MITSUO
IPC分类号： G01R31/26 , H01L21/66
摘要： PURPOSE: To obtain the titled device for error correction which enables the accurate determination of S parameters of semiconductor devices, by a method wherein a sample for error correction is formed on a semiconductor substrate, and the error is corrected with respect to the measured value of a semiconductor device on the basis of the measured result.
CONSTITUTION: The same or the same-kind substrate as that of a semiconductor device to be measured in S parameter is loaded with the electrode of the same or similar shape and structure as or to the electrode provided to measure the electric characteristics of the above-mentioned semiconductor device, and this semiconductor device is so formed that the measured result can be used for error correction with respect to the measured result of the above-mentioned semiconductor device. For example, the terminals of a transistor 1 formed on an Si semiconductor substrate are led out by Al electrodes 2, 3, and 4. On the other hand, a resistor terminal correction sample 7 is replaced for the region of the transistor 1. An opened terminal correction sample, a short-circuit terminal correction sample, and a transmittance correction sample are formed each as shown by drawings.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：为了获得能够准确地确定半导体器件的S参数的标准误差校正装置，通过在半导体衬底上形成用于纠错的样本的方法，并且相对于半导体器件的测量值来校正误差基于测量结果的半导体器件。构成：与S参数中测量的半导体器件的基板相同或相同的基板装载与测量上述电极特性的电气特性相同或相似的形状和结构的电极，并且该半导体器件被形成为使得测量结果可以用于相对于上述半导体器件的测量结果的误差校正。例如，形成在Si半导体衬底上的晶体管1的端子由Al电极2,3和4引出。另一方面，电阻端子校正样品7被替换为晶体管1的区域。打开终端校正样本，短路终端校正样本和透射率校正样本，如图所示。

60. 发明专利

JPS543482A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS543482A
公开(公告)日：1979-01-11
申请号：JP6790277
申请日：1977-06-10
申请人： HITACHI LTD
发明人： NANBA MITSUO
IPC分类号： H01L21/76
摘要： PURPOSE:To secure a formation of the flat element with a minute element isolation as well as to reduce the parasitic capacity, by forming the insulator film only to the groove which is formed selectively to the test sample containing a high density buried layer and then forming the element within the island utilizing the insulator film with an insulator filled into the groove.

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