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51. 发明专利

JP2005318651A Ccd type solid-state image pickup device and camera using the same 审中-公开
标题翻译： CCD类型的固态图像拾取装置和相机使用相机
公开(公告)号：JP2005318651A
公开(公告)日：2005-11-10
申请号：JP2005162415
申请日：2005-06-02
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OZAKI TOSHIBUMI , NAKAI MASAAKI , TANAKA HARUHIKO , ONO HIDEYUKI , SATO AKIRA
IPC分类号： H01L27/148 , H04N5/335 , H04N5/341 , H04N5/357 , H04N5/369 , H04N5/3728 , H04N5/376
摘要： PROBLEM TO BE SOLVED: To provide a CCD type solid-state image pickup device which is easy to drive, improves convenience, is capable of reducing power consumption of a camera and reduces power consumption and noise.
SOLUTION: A CCD type solid-state image pickup device incorporates at least voltage generating circuits (11-17) for obtaining a plurality of or a single trigger pulse and two kinds of positive and negative power supplies from the outside to drive a vertical CCD, a horizontal CCD, a reset transistor and an output circuit using a predetermined pulse voltage and a DC voltage by inputting the trigger pulse.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供易于驱动，提高便利性的CCD型固体摄像装置，能够降低摄像机的功耗并降低功耗和噪声。解决方案：CCD型固态图像拾取装置至少包括用于获得多个或单个触发脉冲的电压产生电路（11-17）以及来自外部的两种正负电源以驱动垂直CCD，水平CCD，复位晶体管和使用预定脉冲电压的输出电路和通过输入触发脉冲的直流电压。版权所有（C）2006，JPO＆NCIPI

52. 发明专利

JP2002335456A SEMICONDUCTOR CIRCUIT 审中-公开
公开(公告)号：JP2002335456A
公开(公告)日：2002-11-22
申请号：JP2002118996
申请日：2002-04-22
申请人： HITACHI LTD
发明人： OZAKI TOSHIBUMI , NAKAI MASAAKI , TANAKA HARUHIKO , ONO HIDEYUKI , SATO AKIRA
IPC分类号： H01L27/148 , H01L27/14 , H04N5/335 , H04N5/372 , H04N5/376
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor circuit that employs transistors(TRs) with a low withstand voltage so as to generate a multi-value pulse such as a tri-state pulse generating circuit. SOLUTION: The semiconductor circuit includes a 1st circuit (comprising a coupling capacitor 41, a diode 42, and MOS TRs 43-46) outputting a 1st pulse, a 2nd circuit (comprising MOS TRs 37-40) outputting a 2nd pulse with an inverted polarity to that of the 1st pulse, an output line (a line of a node D) through which either of outputs from the 1st and 2nd circuits is outputted, a 1st switch (47) connected between the output section of the 1st circuit and the output line, and a 2nd switch (48) connected between the output section of the 2nd circuit and the output line. The source-drain voltage of the MOS TRs is selected to be a low voltage as a VDD or VSS and the semiconductor circuit can generate pulses with different polarities.

53. 发明专利

JPH11205686A SEMICONDUCTOR CIRCUIT 失效
公开(公告)号：JPH11205686A
公开(公告)日：1999-07-30
申请号：JP28448398
申请日：1998-10-06
申请人： HITACHI LTD
发明人： OZAKI TOSHIBUMI , NAKAI MASAAKI , TANAKA HARUHIKO , ONO HIDEYUKI , SATO AKIRA
IPC分类号： H01L27/148 , H01L21/339 , H01L29/762 , H04N5/335 , H04N5/341 , H04N5/369 , H04N5/3722 , H04N5/3725 , H04N5/3728 , H04N5/374
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor circuit to generate a multi-level pulse like a ternary pulse while using transistors of low breakdown strength. SOLUTION: This semiconductor circuit has a first circuit (part of a coupling capacitor 41, a diode 42 and MOS transistors 43-46) for outputting a first pulse, a second circuit (part of MOS transistors 37-40) for outputting a second pulse of a polarity opposite to that of the first pulse, an output line (line of anode D) for outputting any one of outputs of the first and second circuits, a first switch 47 connected between the output part of the first circuit and the output line, and a second switch 48 connected between the output part of the second circuit and the output line. Thus, pulses of different polarities can be generated while turning a voltage between the source and drain of the MOS transistor to a low value as VDD or VSS.

54. 发明专利

JP2532374B2 失效
公开(公告)号：JP2532374B2
公开(公告)日：1996-09-11
申请号：JP29290085
申请日：1985-12-27
申请人： HITACHI LTD
发明人： OZAKI TOSHIBUMI , OOBA SHINYA , NAKAI MASAAKI , ANDO HARUHISA , AKIMOTO HAJIME
IPC分类号： H01L27/146 , H01L27/14 , H04N5/325 , H04N5/335 , H04N5/355 , H04N5/359 , H04N5/374 , H04N5/378

55. 发明专利

JP2513177B2 失效
公开(公告)号：JP2513177B2
公开(公告)日：1996-07-03
申请号：JP2462785
申请日：1985-02-12
申请人： HITACHI LTD
发明人： OZAKI TOSHIBUMI , ANDO HARUHISA , NAKAI MASAAKI , OOBA SHINYA
IPC分类号： H01L27/14 , H01L27/146 , H01L27/148 , H04N3/14 , H04N5/335 , H04N5/341 , H04N5/359 , H04N5/3728 , H04N3/15

56. 发明专利

JPH0578946B2 失效
公开(公告)号：JPH0578946B2
公开(公告)日：1993-10-29
申请号：JP17492384
申请日：1984-08-24
申请人： HITACHI LTD
发明人： KOIKE NORIO , NAKAI MASAAKI , ITO KENJI , AKYAMA TOSHUKI , TAKEMOTO KAYAO , OOBA SHINYA
IPC分类号： H01L27/148 , H04N5/335 , H04N5/341 , H04N5/351 , H04N5/365 , H04N5/3728 , H01L21/339 , H01L29/796

57. 发明专利

JPH05145056A SOLID STATE IMAGE SENSOR 失效
公开(公告)号：JPH05145056A
公开(公告)日：1993-06-11
申请号：JP30306591
申请日：1991-11-19
申请人： HITACHI LTD
发明人： ONO HIDEYUKI , NAKAI MASAAKI , SATO AKIRA , OZAKI TOSHIBUMI , TANAKA HARUHIKO
IPC分类号： H01L27/148 , H01L31/10 , H04N5/335 , H04N5/341 , H04N5/359 , H04N5/361 , H04N5/369 , H04N5/3728 , H04N5/374
摘要： PURPOSE:To reduce a dark current of a photodiode while a smear and reading characteristics remain by adding a shallower and high impurity concentration N-type layer as an N-type layer provided to suppress the smear remains. CONSTITUTION:An N-type layer 9 to become a photodiode of a pixel unit is covered with a P-type layer 5 of a surface of a substrate. Thus, a dark current to be generated due to the fact that the layer 9 reaches the surface of the substrate can be eliminated. A high impurity concentration N-type layer 30 shallower than an N-type layer 3 is newly provided. Thus, since a signal charge reading channel as shown by an arrow 43 is formed as smear suppressing effect to be obtained by a thin impurity concentration and deep N-type layer 3 is maintained, reading of signal charge can be performed. The region of the layer 3 is a depleted region, and may be an extremely thin concentration P-type layer.

58. 发明专利

JPH05103272A CCD TYPE SOLID IMAGE PICKUP ELEMENT 失效
公开(公告)号：JPH05103272A
公开(公告)日：1993-04-23
申请号：JP25909991
申请日：1991-10-07
申请人： HITACHI LTD
发明人： OZAKI TOSHIBUMI , NAKAI MASAAKI , TANAKA HARUHIKO , ONO HIDEYUKI , SATO AKIRA
IPC分类号： H01L27/148 , H04N5/335 , H04N5/341 , H04N5/357 , H04N5/363 , H04N5/369 , H04N5/3722 , H04N5/3725 , H04N5/3728 , H04N5/374 , H04N5/376 , H04N5/378
摘要： PURPOSE:To easily operate a driving, to attain the low power consumption of a camera, and to attain a low noise by incorporating a voltage generating circuit which drives a vertical CCD, horizontal CCD, reset transistor, and output circuit. CONSTITUTION:At least voltage generating circuits 11-17 which drive the vertical CCD, horizontal CCD 3, reset transistor, and output circuit by a prescribed pulse voltage and current voltage from the input of plural or single trigger pulse, and two positive and negative power sources from an outside, are incorporated. That is, this element is equipped with a substrate voltage generating circuit 11, vertical CCD transfer pulse generating circuit 12, vertical CCD ternary pulse generating circuit 13, horizontal CCD transfer pulse generating circuit 14, reset pulse generating circuit 15, reset voltage generating circuit 16, and bias voltage generating circuit 17 of an output circuit load transistor. Therefore, an outside driver can be unnecessitated, the number of power sources which supply the power source to an outside DC/DC converter can be decreased, and the adjustment of the direct current voltage to be impressed on a substrate can be unnecessitated.

59. 发明专利

JPH0575089A SOLID STATE IMAGE PICKUP DEVICE 失效
公开(公告)号：JPH0575089A
公开(公告)日：1993-03-26
申请号：JP23607591
申请日：1991-09-17
申请人： HITACHI LTD
发明人： NAKAI MASAAKI , ONO HIDEYUKI , SATO AKIRA , TANAKA HARUHIKO , OZAKI TOSHIBUMI
IPC分类号： H01L27/148 , H04N5/335 , H04N5/341 , H04N5/353 , H04N5/359 , H04N5/361 , H04N5/369 , H04N5/3728 , H04N5/374
摘要： PURPOSE:To suppress two-dimensional white spot flaws by a method wherein a second impurity layer is completely buried in a semiconductor substrate and, further, extended to a region under a first reading means. CONSTITUTION:An N-type diffused layer 43 which is to be a photodiode is completely buried in a substrate 21 by an upper high impurity concentration P-type diffused layer 44 and, further, extended to a region under an N-type diffused layer 46 and a high impurity concentration diffused layer 45 heneath a vertical CCD register. It is to be noted that the depths of the N-type diffused layer 46 and the high impurity concentration P-type diffused layer 45 are reduced compared to those of a conventional device. Thus the region of the N-type diffused layer 43 which is to be a photodiode is expanded and smear charges can be suppressed efficiently. With this constitution, a dark current created in the surface layer of the substrate 21 can be completely suppressed and false signals caused by a dark current, i.e., two-dimensional white spot flaws, can be suppressed.

60. 发明专利

JPH04287581A SOLID-STATE IMAGE PICKUP ELEMENT 失效
公开(公告)号：JPH04287581A
公开(公告)日：1992-10-13
申请号：JP5219591
申请日：1991-03-18
申请人： HITACHI LTD
发明人： HIROSHIMA MINORU , SUZUKI TOSHIKI , ITAGAKI TATSUO , NAKAI MASAAKI , FURUHASHI SHOJI , TAKIGAWA OSAMU
IPC分类号： H04N5/217 , H04N5/335 , H04N5/357 , H04N5/369 , H04N5/3728
摘要： PURPOSE:To reduce production of a high temperature white spot by setting a depletion voltage up to a specific multiple number of a saturation signal quantity set by a solid-state image pickup element comprising plural photodiodes. CONSTITUTION:When a voltage is fed to a 1st layer transfer electrode 30B, an N-channel inversion layer is formed on the surface of a Pchannel diffusion layer 26 just below the electrode 30B to make an N-channel diffusion layer 23 being a component of a photodiode 20 and an N-channel diffusion layer 25 (charge transfer path) of a vertical shift register conductive. Then a 2nd layer transfer electrode 30A is formed in partly duplicate with the electrode 30B. The electrode 30A is an electrode to transfer the charge read from the diode 20 in a direction of the vertical register. Then a depletion voltage of the diode 20 is changed depending on ion implantation dose at forming of the diffusion layer 23, diffusion time after implantation, ion implantation dose at the forming of a high concentration P-channel diffusion layer 24, and heat treatment temperature of the electrodes 30A, 30B. Then high temperature spot number is reduced by setting the depletion voltage within a range up to a multiple of 1.4 of the saturation signal quantity of the solid-state image pickup element.

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