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51. 发明授权

US07485585B2 Method of forming a thin film, method of manufacturing a gate structure using the same and method of manufacturing a capacitor using the same 失效
标题翻译：薄膜的形成方法，使用该薄膜的栅极结构的制造方法以及使用该薄膜的电容器的制造方法
公开(公告)号：US07485585B2
公开(公告)日：2009-02-03
申请号：US11372117
申请日：2006-03-10
申请人： Young-Geun Park , Jae-Hyun Yeo , Eun-Ae Chung , Ki-Vin Im , Young-Sun Kim , Sung-Tae Kim , Cha-Young Yoo
发明人： Young-Geun Park , Jae-Hyun Yeo , Eun-Ae Chung , Ki-Vin Im , Young-Sun Kim , Sung-Tae Kim , Cha-Young Yoo
IPC分类号： H01L21/469 , H01L23/58
CPC分类号： H01L21/02205 , C23C16/405 , C23C16/45525 , C23C16/45553 , H01L21/02181 , H01L21/02271 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/31645 , H01L27/10852 , H01L28/40 , H01L29/517 , H01L29/78
摘要： In a method of forming a thin film and methods of manufacturing a gate structure and a capacitor, a hafnium precursor including one alkoxy group and three amino groups, and an oxidizing agent are provided on a substrate. The hafnium precursor is reacted with the oxidizing agent to form the thin film including hafnium oxide on the substrate. The hafnium precursor may be employed for forming a gate insulation layer of a transistor or a dielectric layer of a capacitor.
摘要翻译：在形成薄膜的方法和制造栅极结构和电容器的方法中，在基板上设置有包含一个烷氧基和三个氨基的铪前体和氧化剂。铪前体与氧化剂反应形成包含氧化铪的薄膜。铪前体可以用于形成电容器的晶体管或电介质层的栅极绝缘层。

52. 发明申请

US20050272272A1 Semiconductor device and method for manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050272272A1
公开(公告)日：2005-12-08
申请号：US11198541
申请日：2005-08-05
申请人： Jae-Hyun Yeo , Sung-Tae Kim , Young-Sun Kim , In-Sung Park , Seok-Jun Won , Yun-Jung Lee , Ki-Vin Im , Ki-Yeon Park
发明人： Jae-Hyun Yeo , Sung-Tae Kim , Young-Sun Kim , In-Sung Park , Seok-Jun Won , Yun-Jung Lee , Ki-Vin Im , Ki-Yeon Park
IPC分类号： H01L27/04 , H01L21/02 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/469 , H01L21/8242 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L21/02271 , H01L21/02178 , H01L21/02181 , H01L21/022 , H01L21/0228 , H01L21/02318 , H01L21/0234 , H01L21/3141 , H01L21/31604 , H01L21/31616 , H01L21/31637 , H01L21/31641 , H01L21/31645 , H01L21/31691 , H01L28/40
摘要： A semiconductor device and a method for forming the same. A dielectric layer is formed on a semiconductor substrate or on a lower electrode of a capacitor. Vacuum annealing is performed on the dielectric layer. Thus, impurities remaining in the dielectric layer can be effectively removed, and the dielectric layer can be densified. As a result, the electrical characteristics of the semiconductor device are improved. For example, the leakage current characteristics of the dielectric layer are improved and capacitance is increased.
摘要翻译：一种半导体器件及其形成方法。电介质层形成在半导体衬底上或电容器的下电极上。在电介质层上进行真空退火。因此，可以有效地除去残留在电介质层中的杂质，并且可以使电介质层致密化。结果，提高了半导体器件的电特性。例如，介电层的漏电流特性得到改善，电容增大。

53. 发明申请

US20050000426A1 Methods and apparatus for depositing a thin film on a substrate 审中-公开
标题翻译：在基板上沉积薄膜的方法和装置
公开(公告)号：US20050000426A1
公开(公告)日：2005-01-06
申请号：US10747803
申请日：2003-12-29
申请人： Ki-Vin Im , In-Sung Park , Sung-Tae Kim , Young-Sun Kim , Jae-Hyun Yeo , Yun-Jung Lee , Ki-Yeon Park
发明人： Ki-Vin Im , In-Sung Park , Sung-Tae Kim , Young-Sun Kim , Jae-Hyun Yeo , Yun-Jung Lee , Ki-Yeon Park
IPC分类号： H01L21/02 , C23C16/00 , C23C16/40 , C23C16/44 , C23C16/448 , C23C16/455
CPC分类号： C23C16/45544 , C23C16/40 , C23C16/4481
摘要： An apparatus for depositing a thin film includes a reaction chamber, a reaction gas provider to supply a reaction gas and/or inert gas to the reaction chamber, an oxidant provider to supply a first oxidant and a second oxidant to the reaction chamber, and an air drain to exhaust gas from the apparatus. The oxidant provider is operable to supply the second oxidant to the reaction chamber using the first oxidant as a transfer gas.
摘要翻译：用于沉积薄膜的装置包括反应室，向反应室供应反应气体和/或惰性气体的反应气体提供者，向反应室供应第一氧化剂和第二氧化剂的氧化剂供体，以及从设备排出废气。氧化剂供应商可操作以使用第一氧化剂作为转移气体将第二氧化剂供应到反应室。

54. 发明申请

US20060205198A1 Method of forming a thin film, method of manufacturing a gate structure using the same and method of manufacturing a capacitor using the same 失效
公开(公告)号：US20060205198A1
公开(公告)日：2006-09-14
申请号：US11372117
申请日：2006-03-10
申请人： Young-Geun Park , Jae-Hyun Yeo , Eun-Ae Chung , Ki-Vin Im , Young-Sun Kim , Sung-Tae Kim , Cha-Young Yoo
发明人： Young-Geun Park , Jae-Hyun Yeo , Eun-Ae Chung , Ki-Vin Im , Young-Sun Kim , Sung-Tae Kim , Cha-Young Yoo
IPC分类号： H01L21/8242 , H01L21/3205 , H01L21/4763
CPC分类号： H01L21/02205 , C23C16/405 , C23C16/45525 , C23C16/45553 , H01L21/02181 , H01L21/02271 , H01L21/0228 , H01L21/28194 , H01L21/3141 , H01L21/31645 , H01L27/10852 , H01L28/40 , H01L29/517 , H01L29/78
摘要： In a method of forming a thin film and methods of manufacturing a gate structure and a capacitor, a hafnium precursor including one alkoxy group and three amino groups, and an oxidizing agent are provided on a substrate. The hafnium precursor is reacted with the oxidizing agent to form the thin film including hafnium oxide on the substrate. The hafnium precursor may be employed for forming a gate insulation layer of a transistor or a dielectric layer of a capacitor.

55. 发明申请

US20120019484A1 LIGHT SCAN TYPE TOUCH PANEL 审中-公开
标题翻译：光扫类型触控面板
公开(公告)号：US20120019484A1
公开(公告)日：2012-01-26
申请号：US13048686
申请日：2011-03-15
申请人： Hyun-Chul Do , Im-Su Choi , Young-Sun Kim
发明人： Hyun-Chul Do , Im-Su Choi , Young-Sun Kim
IPC分类号： G06F3/042
CPC分类号： G06F3/0423
摘要： A light scan type touch panel includes: at least two light scanning units located outside of a display screen at one side; a plurality of light guide units located at other sides of the display screen; and a light receiving unit located at at least one end of each of the plurality of light guide units. Each of the light guide units includes: a light guiding member having a light incidence plane and a light emission plane; a diffusion sheet located at the light incidence plane; a plurality of reflection sheets located at planes of the light guiding member other than the light incidence plane and the light emission plane; and diffuse reflection inducing units located at one side of the light guiding member, facing one of the plurality of reflection sheets.
摘要翻译：光扫描型触摸面板包括：位于一侧的显示屏外部的至少两个光扫描单元; 位于显示屏的另一侧的多个导光单元; 以及位于所述多个导光单元中的每一个的至少一端的光接收单元。每个导光单元包括：具有光入射面和发光面的导光部件; 位于光入射面的扩散片; 位于所述导光部件的除了所述光入射面和所述发光面以外的平面的多个反射片; 以及位于导光构件的一侧的漫反射感应单元，面对多个反射片中的一个。

56. 发明申请

US20110175851A1 ELECTRONIC PEN FOR DETECTING TOUCH LOCATION, CONTROLLING METHOD OF THE SAME, AND DRIVING METHOD OF PLASMA DISPLAY APPARATUS 审中-公开
标题翻译：用于检测触摸位置的电子笔，其控制方法和等离子体显示装置的驱动方法
公开(公告)号：US20110175851A1
公开(公告)日：2011-07-21
申请号：US12850069
申请日：2010-08-04
申请人： Hyun-Chul Do , Im-Su Choi , Young-Sun Kim
发明人： Hyun-Chul Do , Im-Su Choi , Young-Sun Kim
IPC分类号： G09G3/28 , G06F3/042
CPC分类号： G06F3/0386
摘要： An electronic pen for detecting a touch location, a controlling method of the same and a driving method of a plasma display apparatus are disclosed. According to embodiments of the present invention, synchronization between the electronic pen and the plasma display apparatus may be performed. An electronic pen includes a sensor for receiving infrared emissions and for generating a plurality of sensing signals in response to the infrared emissions, a synchronization unit for determining a synchronization timing in accordance with timings of the plurality of sensing signals, and a coordinate detection unit for detecting an emission location of the infrared emissions in accordance with time differences between the synchronization timing and the timings of the plurality of sensing signals.
摘要翻译：公开了一种用于检测触摸位置的电子笔，其控制方法和等离子体显示装置的驱动方法。根据本发明的实施例，可以执行电子笔和等离子体显示装置之间的同步。电子笔包括用于接收红外发射并响应于红外发射而产生多个感测信号的传感器，用于根据多个感测信号的定时确定同步定时的同步单元，以及用于根据同步定时与多个感测信号的定时之间的时间差来检测红外发射的发射位置。

57. 发明授权

US07964908B2 Memory devices comprising nano region embedded dielectric layers 失效
标题翻译：包含纳米区域的介电层的存储器件
公开(公告)号：US07964908B2
公开(公告)日：2011-06-21
申请号：US12111239
申请日：2008-04-29
申请人： Sun-Jung Kim , Young-Sun Kim , Se-Hoon Oh , Eun-Ha Lee , Young-Su Chung
发明人： Sun-Jung Kim , Young-Sun Kim , Se-Hoon Oh , Eun-Ha Lee , Young-Su Chung
IPC分类号： H01L29/792
CPC分类号： H01L29/42332 , H01L21/28185 , H01L21/28194 , H01L21/28273 , H01L21/28282 , H01L29/42348 , H01L29/513 , H01L29/7881 , H01L29/792
摘要： In one aspect, a memory cell includes a plurality of dielectric layers located within a charge storage gate structure. At least one of the dielectric layers includes an dielectric material including oxygen, and nano regions including oxygen embedded in the dielectric material, where an oxygen concentration of the dielectric material is the greater than an oxygen concentration of the nano regions. In another aspect, at least one of the dielectric layers includes a dielectric material and nano regions embedded in the dielectric material, where an atomic composition of the dielectric material is the same as the atomic composition of the nano regions, and a density of the dielectric material is the greater than a density of the nano regions.
摘要翻译：在一个方面，存储单元包括位于电荷存储栅极结构内的多个电介质层。电介质层中的至少一个包括包含氧的介电材料和包含在介电材料中的氧的纳米区域，其中电介质材料的氧浓度大于纳米区域的氧浓度。另一方面，电介质层中的至少一个包括介电材料和嵌入电介质材料中的纳米区域，其中介电材料的原子组成与纳米区域的原子组成相同，并且电介质的密度材料大于纳米区域的密度。

58. 发明授权

US07858492B2 Method of filling a trench and method of forming an isolating layer structure using the same 有权
标题翻译：填充沟槽的方法和使用其形成隔离层结构的方法
公开(公告)号：US07858492B2
公开(公告)日：2010-12-28
申请号：US12339125
申请日：2008-12-19
申请人： Eunkee Hong , Kyung-Mun Byun , Jong-Wan Choi , Eun-Kyung Baek , Young-Sun Kim
发明人： Eunkee Hong , Kyung-Mun Byun , Jong-Wan Choi , Eun-Kyung Baek , Young-Sun Kim
IPC分类号： H01L21/76
CPC分类号： H01L21/76237 , H01L21/76232
摘要： A method of filling a trench in a substrate ensures that a void or seam is not left in the material occupying the trench. First, a preliminary insulating layer is formed so as to extend contiguously along the bottom and sides of the trench and along an upper surface of the substrate. Impurities are then implanted into a portion of the preliminary insulating layer adjacent the top of the first trench to form a first insulating layer having a doped region and an undoped region. The doped region is removed to form a first insulating layer pattern at the bottom and sides of the first trench, and which first insulating layer pattern defines a second trench. The second trench is then filled with insulating material.
摘要翻译：在衬底中填充沟槽的方法确保在占据沟槽的材料中不留下空隙或接缝。首先，形成预备绝缘层，以沿着沟槽的底部和侧面并且沿衬底的上表面连续延伸。然后将杂质注入到与第一沟槽的顶部相邻的初级绝缘层的一部分中，以形成具有掺杂区域和未掺杂区域的第一绝缘层。去除掺杂区域以在第一沟槽的底部和侧面形成第一绝缘层图案，并且该第一绝缘层图案限定第二沟槽。然后用绝缘材料填充第二沟槽。

59. 发明申请

US20100187595A1 NONVOLATILE MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME 失效
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20100187595A1
公开(公告)日：2010-07-29
申请号：US12694655
申请日：2010-01-27
申请人： Sung-Hae Lee , Byong-Sun Ju , Suk-Jin Chung , Young-Sun Kim
发明人： Sung-Hae Lee , Byong-Sun Ju , Suk-Jin Chung , Young-Sun Kim
IPC分类号： H01L29/788 , H01L21/8247
CPC分类号： H01L27/11521 , H01L21/28273 , H01L29/42324
摘要： Nonvolatile memory devices and related methods of manufacturing the same are provided. A nonvolatile memory device includes a tunneling layer on a substrate, a floating gate on the tunneling layer, an inter-gate dielectric layer structure on the floating gate, and a control gate on the inter-gate dielectric layer structure. The inter-gate dielectric layer structure includes a first silicon oxide layer, a high dielectric layer on the first silicon oxide layer, and a second silicon oxide layer on the high dielectric layer opposite to the first silicon oxide layer The high dielectric layer may include first and second high dielectric layers laminated on each other, and the first high dielectric layer may have a lower density of electron trap sites than the second high dielectric layer and may have a larger energy band gap or conduction band-offset than the second high dielectric layer.
摘要翻译：提供了非易失性存储器件及其制造方法。非易失性存储器件包括衬底上的隧道层，隧道层上的浮动栅极，浮置栅极上的栅极间电介质层结构以及栅极间电介质层结构上的控制栅极。栅极间电介质层结构包括第一氧化硅层，第一氧化硅层上的高电介质层和与第一氧化硅层相对的高电介质层上的第二氧化硅层。高电介质层可以包括第一氧化硅层和第二高介电层彼此层叠，并且第一高介电层可以具有比第二高介电层更低的电子陷阱位置密度，并且可以具有比第二高介电层更大的能带隙或导带偏移。

60. 外观设计

USD594465S1 Video image display for a portable phone 有权
标题翻译：用于便携式电话的视频图像显示
公开(公告)号：USD594465S1
公开(公告)日：2009-06-16
申请号：US29300726
申请日：2008-04-30
申请人： Nho-Kyung Hong , Tae-Young Kang , In-Won Jong , Young-Sun Kim
设计人： Nho-Kyung Hong , Tae-Young Kang , In-Won Jong , Young-Sun Kim

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