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    • 51. 发明申请
    • SWITCHING CIRCUIT FOR MILLIMETER WAVEBAND CONTROL CIRCUIT
    • 用于微波波形控制电路的切换电路
    • US20090146724A1
    • 2009-06-11
    • US12139046
    • 2008-06-13
    • Jae Kyoung MunDong Young KimJong Won LimHo Kyun AhnHae Cheon KimHyun Kyu Yu
    • Jae Kyoung MunDong Young KimJong Won LimHo Kyun AhnHae Cheon KimHyun Kyu Yu
    • H03K17/06
    • H03K17/063H01P1/15H03K17/693H03K2017/066
    • Provided is a switching circuit for a millimeter waveband control circuit. The switching circuit for a millimeter waveband control circuit includes a switching cell disposed on a signal port path to match an interested frequency and including at least one transistor coupled vertically to an input/output transmission line and a plurality of ground via holes disposed symmetrically in an upper portion and a lower portion of the input/output transmission line; capacitors for stabilizing a bias of the switching cell; and bias pads coupled in parallel to the capacitor to control the switching cell. Therefore, the switching circuit may be useful to improve its isolation by simplifying its design and layout through the use of symmetrical structure of optimized switching cells without the separate use of different switch elements, and also to reduce its manufacturing cost through the improved yield of the manufacturing process and the enhanced integration since it is possible to reduce a chip size of an integrated circuit in addition to its low insertion loss.
    • 提供了一种用于毫米波段控制电路的开关电路。 毫米波段控制电路的开关电路包括设置在信号端口路径上以匹配感兴趣频率并且包括垂直于输入/输出传输线耦合的至少一个晶体管的开关单元和对称地布置在其中的多个接地通孔 输入/输出传输线的上部和下部; 用于稳定开关电池的偏置的电容器; 以及与电容器并联耦合的偏置焊盘以控制开关单元。 因此,切换电路可能有助于通过简化其设计和布局来改善其隔离,通过使用优化的开关电池的对称结构,而不需要分开使用不同的开关元件,并且还可以通过提高产量来提高其制造成本 制造工艺和增强的集成,因为除了低插入损耗之外,可以减小集成电路的芯片尺寸。
    • 53. 发明申请
    • CAPACITIVE-DEGENERATION DOUBLE CROSS-COUPLED VOLTAGE-CONTROLLED OSCILLATOR
    • 电容式变压器双相交流电压控制振荡器
    • US20090134944A1
    • 2009-05-28
    • US12114705
    • 2008-05-02
    • Ja Yol LeeSang Heung LeeHae Cheon KimHyun Kyu Yu
    • Ja Yol LeeSang Heung LeeHae Cheon KimHyun Kyu Yu
    • H03B5/12
    • H03B5/1231H03B5/1212H03B5/1215H03B5/1221H03B5/1253
    • A capacitive-degeneration double cross-coupled voltage-controlled oscillator is provided. The capacitive-degeneration double cross-coupled voltage-controlled oscillator includes a main cross-coupled oscillating unit including an oscillation transistor pair cross-coupled to first and second output nodes of a resonating unit to perform an oscillation operation; and an auxiliary cross-coupled oscillating unit including a positive-feedback transistor pair cross-coupled to the first and second output nodes and the transistor pair of the main cross-coupled oscillating unit and a degeneration capacitance connected between emitters of the positive-feedback transistor pair so as to increase a negative resistance of the main cross-coupled oscillating unit. Accordingly, it is possible to increase a maximum attainable oscillation frequency and to decrease an input capacitance.
    • 提供电容变性双交叉耦合压控振荡器。 电容变性双交叉电压控制振荡器包括主交叉耦合振荡单元,其包括交叉耦合到谐振单元的第一和第二输出节点的振荡晶体管对,以执行振荡操作; 以及辅助交叉耦合振荡单元,其包括交叉耦合到第一和第二输出节点的正反馈晶体管对和主交叉耦合振荡单元的晶体管对,以及连接在正反馈晶体管的发射极之间的退化电容 以增加主交叉振荡单元的负电阻。 因此,可以增加最大可获得的振荡频率并降低输入电容。
    • 54. 发明授权
    • Layout method of power line for semiconductor integrated circuit and semiconductor integrated circuit manufactured by the layout method
    • 半导体集成电路电源线布局方法和半导体集成电路布局方法
    • US07456063B2
    • 2008-11-25
    • US11523212
    • 2006-09-19
    • Sang Jin ByunHyun Kyu Yu
    • Sang Jin ByunHyun Kyu Yu
    • H01L21/8242
    • H01L27/0207
    • Provided are a layout method of a power line for a semiconductor integrated circuit and a semiconductor integrated circuit manufactured by the layout method. The layout method includes the steps of: forming a decoupling capacitor on a substrate; laying out a first metal layer, connected to the decoupling capacitor through a contact, above a region where the decoupling capacitor is formed so as to cover the decoupling capacitor; and laying out a second metal layer above a region where the first metal layer is formed. Therefore, the metal layers and the decoupling capacitor are laid out in the same region so that a chip area can be prevented from being additionally consumed at the time of laying out the decoupling capacitor, and degradation which may occur due to connection line resistance from the power lines to the decoupling capacitors can be prevented.
    • 提供了一种用于半导体集成电路的电力线的布局方法和通过布局方法制造的半导体集成电路。 布局方法包括以下步骤:在衬底上形成去耦电容器; 在形成去耦电容器的区域上方布置第一金属层,其通过接触件连接到去耦电容器,以覆盖去耦电容器; 并在其上形成第一金属层的区域上方布置第二金属层。 因此,金属层和去耦电容器布置在相同的区域中,使得在布置去耦电容器时可以防止芯片面积额外消耗,并且可能由于连接线电阻而导致的劣化 可以防止到去耦电容器的电源线。
    • 55. 发明授权
    • Method of manufacturing semiconductor device having stacked gate
electrode structure
    • 制造具有层叠栅电极结构的半导体器件的方法
    • US5840609A
    • 1998-11-24
    • US951564
    • 1997-10-16
    • Yeong Cheol HyeonHyun Kyu Yu
    • Yeong Cheol HyeonHyun Kyu Yu
    • H01L21/28H01L21/3105H01L21/336H01L29/49H01L21/26
    • H01L29/6659H01L21/31051H01L29/4925H01L29/66545
    • A method for manufacturing a semiconductor device having a stacked gate electrode structure of self-aligned polysilicon-metal, which is capable of minimizing the variation in structural and electrical characteristics of the gate electrode, while utilizing the manufacturing process of forming a conventional silicone semiconductor memory device, is disclosed. According to the method for manufacturing a semiconductor device of the present invention, the conventional technique generally used in the manufacturing process of forming the silicon semiconductor device can be effectively utilized. Further, an excessive etch loss in the oxide layer can be restrained by using the oxide spacer of the self-aligned oxide layer in forming the metal layer at the gate electrode structure. Furthermore, it has an advantageous effect that the stable electrical characteristics of the resulting device can be obtained by using the polysilicon layer as a basic constituting material of the gate electrode thereof.
    • 一种用于制造具有自对准多晶硅 - 金属堆叠栅电极结构的半导体器件的方法,其能够最小化栅电极的结构和电特性的变化,同时利用形成常规硅氧烷半导体存储器的制造工艺 设备。 根据本发明的半导体器件的制造方法,可以有效地利用通常用于形成硅半导体器件的制造工艺中的常规技术。 此外,通过在栅极电极结构形成金属层时,通过使用自对准氧化物层的氧化物间隔物,可以抑制氧化物层中的过度的蚀刻损失。 此外,通过使用多晶硅层作为其栅电极的基本构成材料,可以获得所得到的器件的稳定电特性。
    • 56. 发明申请
    • FREQUENCY SYNTHESIZER
    • 频率合成器
    • US20120105116A1
    • 2012-05-03
    • US13344513
    • 2012-01-05
    • Byung Hun MINHyun Kyu Yu
    • Byung Hun MINHyun Kyu Yu
    • H03L7/08
    • H03L7/091H03L7/085H03L7/107H03L7/1075H03L7/183H03L2207/06H03L2207/50
    • There is provided a frequency synthesizer. The frequency synthesizer includes a frequency oscillator adjusting an output frequency according to a control bit; a programmable divider having a preset minimum division ratio, the programming divider dividing the output frequency of the frequency oscillator at a variable division ratio; a counter unit receiving an output signal of the programmable divider and a reference frequency to generate a count value by counting rising edges of the output signal of the programmable divider during one cycle of the reference frequency, and outputting a first hit signal when the count value is 1, and outputting a second hit signal when the count value is 2; and a phase detection unit outputting a control bit obtained by subtracting a fractional error of the output signal of the programmable divider from a fractional error at a locked phase obtained from the count value and the reference frequency.
    • 提供了一个频率合成器。 频率合成器包括:频率振荡器,其根据控制位调整输出频率; 具有预设的最小分频比的可编程分频器,所述编程分频器以可分分频比划分所述频率振荡器的输出频率; 接收可编程分频器的输出信号的计数器单元和参考频率,以在参考频率的一个周期期间对可编程分频器的输出信号的上升沿进行计数以产生计数值,并且当计数值 是1,并且当计数值为2时输出第二命中信号; 以及相位检测单元,输出通过从从计数值和参考频率获得的锁定相位的分数误差中减去可编程分频器的输出信号的分数误差而获得的控制位。
    • 57. 发明申请
    • SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTER
    • 连续逼近模拟数字转换器
    • US20110148684A1
    • 2011-06-23
    • US12970861
    • 2010-12-16
    • Hyun Kyu YuSeon Ho HanYoung Hwa KimSeong Hwan Cho
    • Hyun Kyu YuSeon Ho HanYoung Hwa KimSeong Hwan Cho
    • H03M1/38
    • H03M1/46H03M1/827
    • There is provided a successive approximation analog-to-digital converter including only minimal capacitors to perform an analog-to-digital conversion operation, thereby making it possible to have very strong process change resistance characteristics while having reduced capacitance and circuit area. The successive approximation analog-to-digital converter may include a reference current supplying unit that supplies a reference current; a signal storage unit that stores a reference signal generated by charging the reference current and an input signal input from the outside; a comparing unit that compares the reference signal and the input signal; and a controller that controls the reference current supplying unit while generating the digital output signal based on the comparison result of the comparing unit to change the supply amount of the reference current supplied to the signal storage unit in proportion to the binary code.
    • 提供了仅包括最小电容器以执行模数转换操作的逐次逼近模数转换器,从而使得可以具有非常强的工艺变化电阻特性,同时具有减小的电容和电路面积。 逐次逼近模数转换器可以包括提供参考电流的参考电流提供单元; 信号存储单元,存储通过对参考电流进行充电而产生的参考信号和从外部输入的输入信号; 比较单元,其比较所述参考信号和所述输入信号; 以及控制器,其基于所述比较单元的比较结果来控制所述参考电流供给单元,同时根据所述二进制码来改变提供给所述信号存储单元的参考电流的供给量。
    • 59. 发明授权
    • Capacitive-degeneration double cross-coupled voltage-controlled oscillator
    • 电容变性双交叉电压控制振荡器
    • US07852165B2
    • 2010-12-14
    • US12114705
    • 2008-05-02
    • Ja Yol LeeSang Heung LeeHae Cheon KimHyun Kyu Yu
    • Ja Yol LeeSang Heung LeeHae Cheon KimHyun Kyu Yu
    • H03B5/12
    • H03B5/1231H03B5/1212H03B5/1215H03B5/1221H03B5/1253
    • A capacitive-degeneration double cross-coupled voltage-controlled oscillator is provided. The capacitive-degeneration double cross-coupled voltage-controlled oscillator includes a main cross-coupled oscillating unit including an oscillation transistor pair cross-coupled to first and second output nodes of a resonating unit to perform an oscillation operation; and an auxiliary cross-coupled oscillating unit including a positive-feedback transistor pair cross-coupled to the first and second output nodes and the transistor pair of the main cross-coupled oscillating unit and a degeneration capacitance connected between emitters of the positive-feedback transistor pair so as to increase a negative resistance of the main cross-coupled oscillating unit. Accordingly, it is possible to increase a maximum attainable oscillation frequency and to decrease an input capacitance.
    • 提供电容变性双交叉耦合压控振荡器。 电容变性双交叉电压控制振荡器包括主交叉耦合振荡单元,其包括交叉耦合到谐振单元的第一和第二输出节点的振荡晶体管对,以执行振荡操作; 以及辅助交叉耦合振荡单元,其包括交叉耦合到第一和第二输出节点的正反馈晶体管对和主交叉耦合振荡单元的晶体管对,以及连接在正反馈晶体管的发射极之间的退化电容 以增加主交叉振荡单元的负电阻。 因此,可以增加最大可获得的振荡频率并降低输入电容。
    • 60. 发明申请
    • APPARATUS FOR LINEARIZATION OF DIGITALLY CONTROLLED OSCILLATOR
    • 数字控制振荡器线性化装置
    • US20100141315A1
    • 2010-06-10
    • US12629701
    • 2009-12-02
    • Jang Hong CHOIHyun Kyu Yu
    • Jang Hong CHOIHyun Kyu Yu
    • H03L7/00
    • H03L7/0991H03L7/093
    • There is provided an apparatus for the linearization of a digitally controlled oscillator. The apparatus includes a first filter outputting only a low frequency band signal of an input signal to the digitally controlled oscillator; a negative feedback loop causing the signal of an input port of the digitally controlled oscillator to pass through a frequency table and a frequency-to-digital code mapper in sequence and correcting an input of the digitally controlled oscillator by performing negative feedback to an input port of the first filter; and a frequency table generator storing a frequency value of an output signal of the digitally controlled oscillator in the frequency table.
    • 提供了一种用于数字控制振荡器的线性化的装置。 该装置包括仅将输入信号的低频信号输出到数控振荡器的第一滤波器; 使得数字控制振荡器的输入端口的信号顺序通过频率表和频数码复用器的负反馈环路,并通过对输入端口执行负反馈来校正数字控制振荡器的输入 的第一个过滤器; 以及频率表生成器,其存储频率表中数字控制振荡器的输出信号的频率值。