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51. 发明申请

US20080174373A1 Methods and Apparatus for Dynamic Frequency Scaling of Phase Locked Loops for Microprocessors 有权
标题翻译：用于微处理器的锁相环的动态频率缩放的方法和装置
公开(公告)号：US20080174373A1
公开(公告)日：2008-07-24
申请号：US11624995
申请日：2007-01-19
申请人： Liang Dai , Brandon Wayne Lewis , Jeffrey Todd Bridges , Weihua Chen
发明人： Liang Dai , Brandon Wayne Lewis , Jeffrey Todd Bridges , Weihua Chen
IPC分类号： H03L7/099 , H03L7/08
CPC分类号： H03L7/189 , H03L2207/06
摘要： A phase-locked loop employing a plurality of oscillator complexes is disclosed. The phase-locked loop includes a clock output and a plurality of oscillator complexes operable to generate output signals. The phase-locked loop further includes control logic which is configured to selectively couple an output signal of one of the plurality of oscillator complexes to the clock output.
摘要翻译：公开了一种采用多个振荡器复合器的锁相环。锁相环包括时钟输出和可操作以产生输出信号的多个振荡器复合。锁相环还包括控制逻辑，其被配置为选择性地将多个振荡器复合体之一的输出信号耦合到时钟输出。

52. 发明申请

US20090031155A1 Method and Apparatus for Adaptive Voltage Scaling Based on Instruction Usage 失效
标题翻译：基于指令使用的自适应电压调节方法与装置
公开(公告)号：US20090031155A1
公开(公告)日：2009-01-29
申请号：US11828782
申请日：2007-07-26
申请人： Richard Gerard Hofmann , Jeffrey Todd Bridges
发明人： Richard Gerard Hofmann , Jeffrey Todd Bridges
IPC分类号： G06F1/32 , G06F1/26
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： Different software applications may use a set of instructions having critical timing paths less than a worst case critical timing path of a processor complex. For such applications, a supply voltage may be reduced while still maintaining the clock frequency necessary to meet the application's performance requirements. In order to reduce the supply voltage, an adaptive voltage scaling method is used. A critical path is selected from a plurality of critical paths for analysis on emulation logic to determine an attribute of the selected critical path during on chip functional operations. The selected critical path is representative of the worst case critical path to be in operation during a program execution. During on-chip functional operations, a voltage is controlled in response to the attribute, wherein the voltage supplies power to a power domain associated with the plurality of critical paths. The reduction in voltage reduces power drain based on instruction set usage allowing battery life to be extended.
摘要翻译：不同的软件应用可以使用具有小于处理器复合体的最坏情况关键定时路径的关键定时路径的指令集。对于这样的应用，可以降低电源电压，同时仍然保持满足应用的性能要求所需的时钟频率。为了降低电源电压，使用自适应电压缩放方法。从多个关键路径中选择关键路径用于分析仿真逻辑以在片上功能操作期间确定所选择的关键路径的属性。所选择的关键路径代表在程序执行期间正在运行的最坏情况的关键路径。在片上功能操作期间，响应于属性来控制电压，其中电压向与多个关键路径相关联的电力域提供电力。基于指令集的使用，电压的降低可以减少功耗，从而延长电池寿命。

53. 发明授权

US07242600B2 Circuit and method for subdividing a CAMRAM bank by controlling a virtual ground 有权
标题翻译：通过控制虚拟地面对CAMRAM组进行细分的电路和方法
公开(公告)号：US07242600B2
公开(公告)日：2007-07-10
申请号：US11262062
申请日：2005-10-28
申请人： Michael ThaiThanh Phan , Chiaming Chai , Jeffrey Todd Bridges , Jeffrey Herbert Fischer
发明人： Michael ThaiThanh Phan , Chiaming Chai , Jeffrey Todd Bridges , Jeffrey Herbert Fischer
IPC分类号： G11C15/00
CPC分类号： G11C15/00 , G11C8/12 , G11C15/04
摘要： A CAM bank is functionally divided into two or more sub-banks, without replicating CAM driver circuits, by disabling all match line discharge circuits in the bank, and selectively enabling the discharge circuits in entries comprising sub-banks. At least one selectively actuated switching circuit is interposed between the virtual ground node of each discharging comparator in the discharge circuit of a sub-bank and circuit ground. When the switching circuit is in a non-conductive state, the virtual ground node is maintained at a voltage level sufficiently above circuit ground to preclude discharging a connected match line within the CAM access time. When the switching circuit is placed in a conductive state, the virtual ground node is pulled to circuit ground and the connected match line may be discharged by a miscompare. Control signals, which may be decoded from address bits, are distributed to the switching circuits to define the CAM sub-banks.
摘要翻译： CAM组在功能上划分为两个或更多个子行，不复制CAM驱动电路，禁止该组中的所有匹配线放电电路，并且选择性地使得放电电路在包含子行的条目中使能。至少一个选择性致动的切换电路插入在子组的放电电路中的每个放电比较器的虚拟接地节点和电路接地之间。当开关电路处于非导通状态时，虚拟接地节点保持在足够高于电路接地的电压电平，以防止在CAM访问时间内放电连接的匹配线。当开关电路处于导通状态时，虚拟接地节点被拉到电路接地，并且连接的匹配线可能被误比较地放电。可以从地址位解码的控制信号被分配给切换电路以定义CAM子库。

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