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51. 发明授权

US07535747B2 Phase change random access memory and related methods of operation 有权
标题翻译：相变随机存取存储器及相关操作方法
公开(公告)号：US07535747B2
公开(公告)日：2009-05-19
申请号：US11844512
申请日：2007-08-24
申请人： Kwang-jin Lee , Woo-yeong Cho
发明人： Kwang-jin Lee , Woo-yeong Cho
IPC分类号： G11C11/00
CPC分类号： G11C13/0064 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078
摘要： In a phase change random access memory (PRAM) device, data is programmed in selected memory cells using a plurality of program loops. In each program loop, division program operations for cell groups including the selected memory cells are performed in consecutive timeslots.
摘要翻译：在相变随机存取存储器（PRAM）装置中，使用多个程序循环将数据编程在所选存储单元中。在每个程序循环中，在连续的时隙中执行包括所选存储单元的单元组的分割程序操作。

52. 发明授权

US07190607B2 Phase-change memory element driver circuits using measurement to control current and methods of controlling drive current of phase-change memory elements using measurement 失效
标题翻译：使用测量来控制电流的相变存储元件驱动电路和使用测量来控制相变存储元件的驱动电流的方法
公开(公告)号：US07190607B2
公开(公告)日：2007-03-13
申请号：US11092456
申请日：2005-03-29
申请人： Woo-yeong Cho , Sang-beom Kang
发明人： Woo-yeong Cho , Sang-beom Kang
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0078 , G11C2213/79
摘要： Programming phase-change memory devices and driver circuits for programming phase-change memory devices are provided that control an amount of current supplied to a phase-change material of the phase-change memory device based on a measure of resistance of the phase-change material during programming of the phase-change memory device. Such control may be based on detected voltage or current. The amount of current supplied to the phase-change material may be increased until the measured voltage level changes with respect to a reference voltage value and the current maintained constant if the measured voltage level has changed with respect to the reference voltage value. The change of the measured voltage level with respect to the reference voltage may be the measured voltage level falling below the reference voltage value.
摘要翻译：提供用于编程相变存储器件的编程相变存储器件和驱动器电路，其基于相变材料的电阻的测量来控制提供给相变存储器件的相变材料的电流量在相变存储器件的编程期间。这种控制可以基于检测到的电压或电流。提供给相变材料的电流量可以增加，直到测量的电压电平相对于参考电压值改变，并且如果测量的电压电平相对于参考电压值发生变化，则电流保持恒定。相对于参考电压的测量电压电平的变化可以是测量的电压电平低于参考电压值。

53. 发明申请

US20070034908A1 Phase change random access memory device 有权
标题翻译：相变随机存取存储器件
公开(公告)号：US20070034908A1
公开(公告)日：2007-02-15
申请号：US11317292
申请日：2005-12-27
申请人： Woo-yeong Cho , Jong-soo Seo , Ik-chul Kim , Young-kug Moon
发明人： Woo-yeong Cho , Jong-soo Seo , Ik-chul Kim , Young-kug Moon
IPC分类号： H01L29/80
CPC分类号： G11C11/5678 , G11C13/0004 , G11C13/0023 , G11C13/0026 , H01L27/2409 , H01L27/2436
摘要： A phase-change random access memory device includes a global bit line connected to a write circuit and a read circuit; a plurality of local bit lines, each of which being connected to a plurality of phase-change memory cells; and a plurality of column select transistors selectively connecting the global bit line with each of the plurality of local bit lines. Each column select transistor has a resistance that depends on distance from the write circuit and the read circuit.
摘要翻译：相变随机存取存储器件包括连接到写电路和读电路的全局位线; 多个局部位线，每个位线连接到多个相变存储器单元; 以及选择性地将全局位线与多个局部位线中的每一个连接的多个列选择晶体管。每个列选择晶体管具有取决于与写入电路和读取电路的距离的电阻。

54. 发明申请

US20100019217A1 PHASE-CHANGE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：相变存储器件及其制造方法
公开(公告)号：US20100019217A1
公开(公告)日：2010-01-28
申请号：US12574783
申请日：2009-10-07
申请人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
发明人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
IPC分类号： H01L47/00 , H01L21/06
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1675 , Y10S977/754
摘要： A phase-change memory device includes a semiconductor substrate, a bit line and a word line arranged on the semiconductor substrate to intersect each other, and a phase-change material strip interposed between the bit line and the word line and extending lengthwise in a direction that is substantially parallel to at least a portion of the word line.
摘要翻译：相变存储器件包括半导体衬底，布置在半导体衬底上的位线和字线彼此相交的相变存储器件，以及插入位线和字线之间的相变材料带，并且沿相对方向其基本上平行于字线的至少一部分。

55. 发明授权

US07639522B2 Method of driving multi-level variable resistive memory device and multi-level variable resistive memory device 有权
标题翻译：驱动多级可变电阻式存储器件和多级可变电阻式存储器件的方法
公开(公告)号：US07639522B2
公开(公告)日：2009-12-29
申请号：US11855525
申请日：2007-09-14
申请人： Woo-yeong Cho , Du-eung Kim , Ki-sung Kim
发明人： Woo-yeong Cho , Du-eung Kim , Ki-sung Kim
IPC分类号： G11C11/00
CPC分类号： G11C11/56 , G11C11/5678 , G11C13/0004 , G11C13/0064 , G11C13/0069 , G11C2013/0078
摘要： Disclosed is a method of driving a multi-level variable resistive memory device. A method of driving a multi-level variable resistive memory device includes supplying a write current to a variable resistive memory cell so as to change resistance of the variable resistive memory cell, verifying whether or not changed resistance enters a predetermined resistance window, and supplying a write current having an increased or decreased amount from the write current supplied most recently on the basis of the verification result so as to change resistance of the variable resistive memory cell.
摘要翻译：公开了一种驱动多电平可变电阻存储器件的方法。一种驱动多电平可变电阻存储器件的方法包括向可变电阻存储单元提供写入电流，以便改变可变电阻存储单元的电阻，验证改变电阻是否进入预定电阻窗，基于验证结果从最近提供的写入电流中增加或减少量的写入电流，以便改变可变电阻存储单元的电阻。

56. 发明授权

US07633100B2 Phase change random access memory device 有权
标题翻译：相变随机存取存储器件
公开(公告)号：US07633100B2
公开(公告)日：2009-12-15
申请号：US11317292
申请日：2005-12-27
申请人： Woo-yeong Cho , Jong-soo Seo , Ik-chul Kim , Young-kug Moon
发明人： Woo-yeong Cho , Jong-soo Seo , Ik-chul Kim , Young-kug Moon
IPC分类号： H01L29/80
CPC分类号： G11C11/5678 , G11C13/0004 , G11C13/0023 , G11C13/0026 , H01L27/2409 , H01L27/2436
摘要： A phase-change random access memory device includes a global bit line connected to a write circuit and a read circuit; a plurality of local bit lines, each of which being connected to a plurality of phase-change memory cells; and a plurality of column select transistors selectively connecting the global bit line with each of the plurality of local bit lines. Each column select transistor has a resistance that depends on distance from the write circuit and the read circuit.
摘要翻译：相变随机存取存储器件包括连接到写电路和读电路的全局位线; 多个局部位线，每个位线连接到多个相变存储器单元; 以及选择性地将全局位线与多个局部位线中的每一个连接的多个列选择晶体管。每个列选择晶体管具有取决于与写入电路和读取电路的距离的电阻。

57. 发明授权

US07613037B2 Phase-change memory device and method of fabricating the same 有权
标题翻译：相变存储器件及其制造方法
公开(公告)号：US07613037B2
公开(公告)日：2009-11-03
申请号：US11529323
申请日：2006-09-29
申请人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
发明人： Du-eung Kim , Chang-soo Lee , Woo-yeong Cho , Byung-gil Choi
IPC分类号： G11C11/00
CPC分类号： G11C13/0004 , G11C2213/72 , H01L27/2409 , H01L27/2472 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/1675 , Y10S977/754
摘要： A phase-change memory device includes a semiconductor substrate, a bit line and a word line arranged on the semiconductor substrate to intersect each other, and a phase-change material strip interposed between the bit line and the word line and extending lengthwise in a direction that is substantially parallel to at least a portion of the word line.
摘要翻译：相变存储器件包括半导体衬底，布置在半导体衬底上的位线和字线彼此相交的相变存储器件，以及插入位线和字线之间的相变材料带，并且沿相对方向其基本上平行于字线的至少一部分。

58. 发明授权

US07405965B2 Phase change memory device 有权
标题翻译：相变存储器件
公开(公告)号：US07405965B2
公开(公告)日：2008-07-29
申请号：US11648558
申请日：2007-01-03
申请人： Byung-gil Choi , Du-eung Kim , Woo-yeong Cho
发明人： Byung-gil Choi , Du-eung Kim , Woo-yeong Cho
IPC分类号： G11C11/22
CPC分类号： G11C7/18 , G11C8/12 , G11C13/0004 , G11C2213/72 , G11C2213/79
摘要： A phase change memory device includes a semiconductor substrate which includes a plurality of phase change memory cells, a plurality of local bit lines extending over the semiconductor substrate, each of the plurality of local bit lines being coupled to the plurality of phase change memory cells, and a plurality of global bit lines extending over the plurality of local bit lines, each of the plurality of global bit lines being selectively coupled to the plurality of local bit lines. The plurality of global bit lines are located at two or more different wiring line levels over the semiconductor substrate.
摘要翻译：相变存储器件包括：半导体衬底，其包括多个相变存储器单元;多个局部位线，其延伸在所述半导体衬底上;所述多个局部位线中的每一个耦合到所述多个相变存储器单元; 以及在所述多个局部位线上延伸的多个全局位线，所述多个全局位线中的每一条选择性地耦合到所述多个局部位线。多个全局位线位于半导体衬底上的两个或更多个不同的布线层上。

59. 发明申请

US20070014150A1 Phase change random access memory (PRAM) device having variable drive voltages 有权
标题翻译：具有可变驱动电压的相变随机存取存储器（PRAM）装置
公开(公告)号：US20070014150A1
公开(公告)日：2007-01-18
申请号：US11319601
申请日：2005-12-29
申请人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang , Choong-keun Kwak
发明人： Woo-yeong Cho , Du-eung Kim , Sang-beom Kang , Choong-keun Kwak
IPC分类号： G11C11/00 , G11C8/00
CPC分类号： G11C13/0038 , G11C5/145 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/009
摘要： A phase change memory device of one aspect includes a memory array including a plurality of phase change memory cells, a write boosting circuit, and a write driver. The write boosting circuit boosts a first voltage and outputs a first control voltage in response to a control signal in a first operation mode, and boosts the first voltage and outputs a second control voltage in response to the control signal in a second operation mode and a third operation mode. The write driver is driven by the first control voltage in the first operation mode and writes data to a selected memory cell of the memory array.
摘要翻译：一个方面的相变存储器件包括包括多个相变存储单元，写升压电路和写驱动器的存储器阵列。写升压电路升压第一电压并响应于第一操作模式中的控制信号输出第一控制电压，并且在第二操作模式中响应于控制信号升高第一电压并输出第二控制电压，并且第三操作模式。写入驱动器由第一操作模式中的第一控制电压驱动，并将数据写入存储器阵列的所选存储单元。

60. 发明申请

US20060215480A1 Semiconductor memory device and core layout thereof 失效
标题翻译：半导体存储器件及其核心布局
公开(公告)号：US20060215480A1
公开(公告)日：2006-09-28
申请号：US11316878
申请日：2005-12-27
申请人： Hye-jin Kim , Choong-keun Kwak , Woo-yeong Cho , Sang-beom Kang
发明人： Hye-jin Kim , Choong-keun Kwak , Woo-yeong Cho , Sang-beom Kang
IPC分类号： G11C8/00
CPC分类号： G11C13/0028 , G11C13/0004
摘要： A semiconductor memory device of one aspect includes a memory cell block including n global word lines, and corresponding m sub word lines for each of the n global word lines, where n and m are natural numbers. The memory device further includes a plurality of word line driving circuits which respectively control a voltage of the sub word lines according to a logic level of each corresponding global word line and inputted address signals, and a plurality of control circuits which transmit the address signals to the word line driving circuits or interrupt transmission of the address signals according to the logic level of the global word line. Each of the word line driving circuits includes a first transistor which maintains the voltage of the respective sub word line at a first voltage and a second transistor which maintains the voltage of the sub word line at the first voltage or a second voltage.
摘要翻译：一个方面的半导体存储器件包括包括n个全局字线的存储单元块，以及n个全局字线中的每一个的对应m个子字线，其中n和m是自然数。存储装置还包括多个字线驱动电路，其分别根据每个对应的全局字线和输入的地址信号的逻辑电平分别控制子字线的电压，以及多个控制电路，其将地址信号发送到字线驱动电路或根据全局字线的逻辑电平中断地址信号的传输。每个字线驱动电路包括将相应子字线的电压维持在第一电压的第一晶体管和将子字线的电压维持在第一电压或第二电压的第二晶体管。

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