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    • 51. 发明申请
    • WORKPIECE DIVIDING METHOD
    • 工作分歧方法
    • US20110081768A1
    • 2011-04-07
    • US12885675
    • 2010-09-20
    • Masaru Nakamura
    • Masaru Nakamura
    • H01L21/78
    • H01L21/67092H01L21/78
    • In a workpiece dividing method, an expansion tape is stuck to an adhesive film side of a workpiece in a state where an adhesive film is stuck to the rear surface of a wafer. Respective positions of the predetermined dividing lines on the front surface of the wafer are detected. On the basis of information on the detected predetermined dividing lines, a laser beam passing through the wafer from the front surface of the wafer is focused on and directed to the front surface or inside of the adhesive film to form modified areas on the front surface of or in the inside of the adhesive film. On the basis of information on the detected predetermined dividing lines, a laser beam passing through the wafer from the front surface of the wafer is focused on and directed to the inside of the wafer to form modified areas in the inside of the wafer. The expansion tape is expanded to divide the workpiece along the predetermined dividing lines with the modified areas taken as start points.
    • 在工件分割方法中,在粘合膜粘附到晶片的后表面的状态下,将膨胀带粘贴到工件的粘合膜侧。 检测在晶片前表面上的预定划分线的相应位置。 基于检测到的预定分割线的信息,从晶片的前表面通过晶片的激光束聚焦在并指向粘合膜的前表面或内部,以在粘合膜的前表面上形成改质区域 或在粘合膜的内部。 基于检测到的预定分割线的信息,从晶片的前表面通过晶片的激光束被聚焦并导向晶片的内部,以在晶片内部形成改质区域。 膨胀带被扩展以沿着预定分割线划分工件,将修改后的区域作为起点。
    • 52. 发明授权
    • Wafer dividing method
    • 晶圆分割法
    • US07803696B2
    • 2010-09-28
    • US11705428
    • 2007-02-13
    • Masaru Nakamura
    • Masaru Nakamura
    • H01L21/00
    • H01L21/78B23K26/40B23K26/53B23K2101/40B23K2103/50B28D5/0011B28D5/0052H01L21/67092H01L21/6836H01L2221/68327
    • A method of dividing a wafer which is partitioned by a plurality of first dividing lines extending in a predetermined direction and a plurality of second dividing, lines formed in a direction perpendicular to the plurality of first dividing lines, along the first dividing lines and the second dividing lines, comprising the step of forming a first continuous deteriorated layer in the inside of the wafer along the first dividing lines by applying a laser beam along the first dividing lines; the step of forming a second deteriorated layer in the inside of the wafer along the second dividing lines except for the intersections with the first dividing lines by applying a laser beam along the second dividing lines except for the intersections with the first dividing lines; the step of dividing the wafer along the first dividing lines where the first deteriorated layer has been formed by exerting external force to the wafer along the first dividing lines; and the step of dividing the wafer along the second dividing lines where the second deteriorated layer has been formed by exerting external force to the wafer along the second dividing lines.
    • 一种分割由沿预定方向延伸的多个第一分割线分隔的晶片和沿与第一分割线垂直的方向形成的多个第二分割线的方法,沿着第一分割线和第二分割线 分割线,包括通过沿着第一分割线施加激光束沿着第一分割线在晶片内部形成第一连续劣化层的步骤; 除了与第一分割线的交点之外,通过沿除了与第一分割线的交点之外的第二分割线施加激光束,沿着第二分割线在晶片内部形成第二劣化层的步骤; 通过沿着第一分割线向晶片施加外力,沿着已经形成第一劣化层的第一分割线分割晶片的步骤; 以及通过沿着第二分割线向晶片施加外力,沿着已经形成第二劣化层的第二分割线分割晶片的步骤。
    • 54. 发明申请
    • STACKED DEVICE MANUFACTURING METHOD
    • 堆叠设备制造方法
    • US20100099221A1
    • 2010-04-22
    • US12576010
    • 2009-10-08
    • Masaru Nakamura
    • Masaru Nakamura
    • H01L21/50
    • H01L21/6836H01L25/0657H01L25/50H01L2221/68327H01L2221/68336H01L2225/06513H01L2225/06541H01L2924/0002H01L2924/00
    • A stacked device manufacturing method including a kerf forming step of forming a kerf on the front side of each of plural wafers along each street, the kerf having a depth corresponding to a predetermined finished thickness of each wafer, a first stacking step of stacking a first one of the wafers and a second one of the wafers in such a manner that the front side of the second wafer is opposed to the front side of the first wafer and that the electrodes of the second wafer are respectively bonded to the electrodes of the first wafer, a first back grinding step of grinding the back side of the second wafer to expose each kerf of the second wafer to the back side of the second wafer, a second stacking step of stacking a third one of the wafers to the second wafer in such a manner that the front side of the third wafer is opposed to the back side of the second wafer and that the electrodes of the third wafer are respectively bonded to the electrodes of the second wafer, and a second back grinding step of grinding the back side of the third wafer to expose each kerf of the third wafer to the back side of the third wafer.
    • 一种堆叠式装置制造方法,包括:沿着每条街道在多个晶片的前侧形成切口的切口形成步骤,所述切口具有与每个晶片的预定最终厚度对应的深度;第一堆叠步骤, 一个晶片和第二个晶片,使得第二晶片的前侧与第一晶片的前侧相对,并且第二晶片的电极分别接合到第一晶片的电极 晶片,第一后研磨步骤,其研磨第二晶片的背面以将第二晶片的每个切口暴露于第二晶片的背面;第二堆叠步骤,将第三个晶片堆叠到第二晶片; 使得第三晶片的前侧与第二晶片的背面相对并且第三晶片的电极分别接合到第二晶片的电极,并且第二背面 研磨步骤,研磨第三晶片的背面以将第三晶片的每个切口暴露于第三晶片的背面。
    • 55. 发明授权
    • Wafer processing method including formation of a deteriorated layer
    • 晶片加工方法,包括形成劣化层
    • US07682858B2
    • 2010-03-23
    • US11151526
    • 2005-06-14
    • Yusuke NagaiSatoshi KobayashiMasaru Nakamura
    • Yusuke NagaiSatoshi KobayashiMasaru Nakamura
    • H01L21/00
    • H01L21/304B23K26/40B23K26/53B23K2101/40B23K2103/50B28D5/0011H01L21/78H01L2221/6834
    • A wafer processing method for dividing a wafer having function elements in area sectioned by dividing lines formed on the front surface in a lattice pattern into individual chips along the dividing lines, comprising a deteriorated layer forming step for forming a deteriorated layer on the side of the back surface of a position at a distance corresponding to the final thickness of the chip from the front surface of the wafer by applying a laser beam capable of passing through the wafer along the dividing lines from the back surface of the wafer; a dividing step for dividing the wafer into individual chips along the dividing lines by applying external force to the wafer in which the deteriorated layer has been formed along the dividing lines; and a back surface grinding step for grinding the back surface of the wafer divided into individual chips to the final thickness of the chip.
    • 一种晶片处理方法,其特征在于,将沿着划分线将在前表面上形成的划分线的划分线的区域的功能元件分割为各个芯片,所述晶片处理方法包括在劣化层形成步骤中形成劣化层 通过施加能够从晶片的背面沿着划分线穿过晶片的激光束,从与晶片的前表面相对应的与芯片的最终厚度相对应的距离的位置的背面; 分割步骤,通过沿着分割线向已经形成有劣化层的晶片施加外力,沿着分割线将晶片分割成单个芯片; 以及后表面研磨步骤,用于将分成单个芯片的晶片的背面研磨至芯片的最终厚度。
    • 56. 发明授权
    • Method of dividing wafer
    • 分割晶片的方法
    • US07666760B2
    • 2010-02-23
    • US12272320
    • 2008-11-17
    • Masaru Nakamura
    • Masaru Nakamura
    • H01L21/00
    • H01L21/67132H01L21/78
    • A method of dividing a wafer includes: a denatured layer forming step of forming a denatured layer in the inside of the wafer along streets; a first feeding step in which the whole area of the wafer's back-side surface is suction held, and the wafer is mounted on a support base of a tape adhering unit, with the wafer's back-side surface on the upper side; a dicing tape adhering step of adhering a dicing tape to the wafer's back-side surface and an annular frame; a wafer reversing step of reversing the wafer and the annular frame face side back; a second feeding step of feeding said wafer and said annular frame to a tape expanding unit whole holding them by suction; a protective tape peeling step of peeling off a protective tape adhered to the wafer's face-side surface; and a wafer dividing step of expanding the dicing tape so as to divide the wafer along the streets along which the denatured layer has been formed.
    • 分割晶片的方法包括:变性层形成步骤,沿着街道在晶片内部形成变性层; 将晶片背面的整个区域吸引保持的第一供给工序,将晶片安装在带状粘接单元的支撑基板上,将晶片的背面设置在上侧; 将切割带粘附到晶片的背面表面的切割胶粘合步骤和环形框架; 将晶片和环形框架面侧反转的晶片倒转步骤; 第二馈送步骤,将所述晶片和所述环形框架馈送到整个通过抽吸保持它们的带扩展单元; 保护带剥离步骤,剥离粘附到晶片的表面侧的保护带; 以及晶片分割步骤,使切割带扩展,以沿着形成有变性层的街道划分晶片。
    • 57. 发明申请
    • Optical information recording/reproduction apparatus and recording condition adjusting method
    • 光信息记录/再现装置和记录条件调整方法
    • US20090303853A1
    • 2009-12-10
    • US12309032
    • 2007-06-27
    • Masaru Nakamura
    • Masaru Nakamura
    • G11B7/00
    • G11B20/10009G11B7/005G11B20/10037G11B20/10046G11B20/10055G11B20/10101G11B20/10111G11B20/1012G11B20/10212G11B20/10296G11B20/10425G11B20/14G11B2220/2537
    • An adaptive equalization circuit (105) operates for PR-equalization of the reproduced signal that is subjected to an A/D conversion by an A/D converter (103) and shaped by a waveform shaping circuit (104). An ideal-waveform generation circuit (110) generates an ideal waveform that corresponds to the reproduced signal that is binarized by a Viterbi-decoding circuit (108). A mark-length/space-length calculation circuit (112) calculates the actual mark length/space length relative to the mark length/space length to be formed, based on the equalization error that arises when the ideal waveform assumes a central reference level as calculated by an equalization-error calculation circuit (111) and the intervals of polarity inversions of binarized data detected by a 0-cross detection circuit (109). A system controller (114) adjusts the edge shift quantity of the recording waveform when forming a mark based on the calculated mark length/space length.
    • 自适应均衡电路(105)对通过A / D转换器(103)进行A / D转换的再生信号的PR均衡进行操作,并由波形整形电路(104)整形。 理想波形生成电路(110)产生与由维特比解码电路(108)二值化的再现信号对应的理想波形。 标记长度/空间长度计算电路(112)基于当理想波形呈现中心参考电平时出现的均衡误差来计算相对于要形成的标记长度/空格长度的实际标记长度/空格长度 通过均衡误差计算电路(111)计算,以及由0交叉检测电路(109)检测的二值化数据的极性反转的间隔。 系统控制器(114)根据所计算的标记长度/间隔长度,在形成标记时,调整记录波形的边沿位移量。