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51. 发明申请

WO2011028248A3 ELECTRONIC SELF-HEALING METHODS FOR RADIO-FREQUENCY RECEIVERS 审中-公开
标题翻译：无线电频率接收机的电子自治方法
公开(公告)号：WO2011028248A3
公开(公告)日：2011-08-11
申请号：PCT/US2010002322
申请日：2010-08-24
申请人： CALIFORNIA INST OF TECHN , BOHN FLORIAN , HAJIMIRI SEYED ALI , WANG HUA , WANG YU-JIU
发明人： BOHN FLORIAN , HAJIMIRI SEYED ALI , WANG HUA , WANG YU-JIU
IPC分类号： H03L7/00 , H04B7/08
CPC分类号： H04B1/40 , H04B17/0085
摘要： Systems and methods for providing self-healing integrated circuits. The method is characterized in that the behavior of a circuit or a device in response to an input signal is observed. One or more operational parameters or characteristics of the circuit or the device are derived. A corrective action to bring the operational parameters or characteristics of the circuit or device within a desired range is deduced, if needed. The corrective action can be the application of a correction signal or a modification of one or more parameters or characteristics of an element in the circuit. The calculated corrective action, if needed, is applied to bring the operational parameters or characteristics of the circuit or device within the desired range. Optionally, the operational parameters or characteristics of the circuit or the device after the correction is effectuated can be checked.
摘要翻译：提供自愈式集成电路的系统和方法。该方法的特征在于，观察到响应于输入信号的电路或设备的行为。导出电路或器件的一个或多个操作参数或特性。如果需要，可以推导出将电路或设备的操作参数或特性置于所需范围内的纠正措施。校正动作可以是在电路中应用校正信号或修改元件的一个或多个参数或特性。如果需要，应用计算的校正动作将电路或设备的操作参数或特性置于所需范围内。可选地，可以检查校正后的电路或设备的操作参数或特性。

52. 发明申请

WO2010096770A2 NOISE SUPPRESSION TECHNIQUES IN HIGH PRECISION LONG-TERM FREQUENCY/TIMING MEASUREMENTS 审中-公开
标题翻译：噪声抑制技术在高精度长期频率/时序测量
公开(公告)号：WO2010096770A2
公开(公告)日：2010-08-26
申请号：PCT/US2010/024933
申请日：2010-02-22
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , HAJIMIRI, Seyed, Ali , WANG, Hua , KOUSAI, Shouhei
发明人： HAJIMIRI, Seyed, Ali , WANG, Hua , KOUSAI, Shouhei
IPC分类号： G01R23/20 , G01R23/02
CPC分类号： G01R29/26 , G01R31/31709
摘要： A frequency/timing measurement apparatus includes a reference source having a reference source output terminal. At least one target source has a target source output terminal. The at least one target source is communicatively coupled to the reference source. A frequency timing measurement block has a first input terminal electrically coupled to the reference source output terminal. A second input terminal is electrically coupled to the target source output terminal and at least one output terminal. The frequency timing measurement block is configured to perform a noise shaping technique to reduce measurement error attributable to a phase noise that is correlated between the reference source and the target source, and to provide a reduced correlated noise measurement at the at least one output terminal. A method to reduce correlated noise is also described.
摘要翻译：频率/定时测量装置包括具有参考源输出端的参考源。至少一个目标源具有目标源输出端。至少一个目标源通信地耦合到参考源。频率定时测量块具有电耦合到参考源输出端的第一输入端。第二输入端子电耦合到目标源极输出端子和至少一个输出端子。频率定时测量块被配置为执行噪声整形技术以减少归因于在参考源和目标源之间相关的相位噪声的测量误差，并且在至少一个输出端子处提供减小的相关噪声测量。还描述了一种降低相关噪声的方法。

53. 发明申请

WO2009148664A3 FULLY INTEGRATED TEMPERATURE REGULATOR FOR BIOCHEMICAL APPLICATIONS 审中-公开
标题翻译：全面综合温度调节器用于生物化学应用
公开(公告)号：WO2009148664A3
公开(公告)日：2010-02-25
申请号：PCT/US2009036288
申请日：2009-03-06
申请人： CALIFORNIA INST OF TECHN , WANG HUA , HAJIMIRI SEYED ALI
发明人： WANG HUA , HAJIMIRI SEYED ALI
IPC分类号： H01L21/00 , H01L21/02 , H01L21/66
CPC分类号： G05D23/24 , G05D23/1906 , G05D23/22 , G05D23/27
摘要： The invention is an integrated temperature regulator that can be fabricated using conventional semiconductor processing technology. The integrated temperature regulator can include a reaction chamber, for example fabricated from PDMS, in which chemical or biochemical reactions of interest can be carried out. The temperature regular can also be used to regulate the temperature of some circuits, e.g. an effective-inductance-change based magnetic particle sensor, to achieve a stable operation performance, such as an improved sensitivity. The integrated temperature regulator includes as subcomponents a temperature sensing circuit that receives a thermal signal from the vicinity of the reaction chamber, a temperature reference circuit, and a temperature control circuit that controls a heater based at least in part on the difference between the sensed temperature and the reference temperature. The various subcomponents can be programmable.
摘要翻译：本发明是可以使用常规半导体处理技术制造的集成温度调节器。集成温度调节器可以包括例如由PDMS制造的反应室，其中可以进行感兴趣的化学或生物化学反应。温度常数也可用于调节某些电路的温度，例如基于有效电感变化的磁性粒子传感器，以实现稳定的操作性能，例如提高的灵敏度。集成温度调节器包括作为子部件的温度感测电路，其接收来自反应室附近的热信号，温度参考电路和温度控制电路，其至少部分地基于感测温度之间的差异来控制加热器和参考温度。各个子部件可以编程。

54. 发明申请

WO2009148664A2 FULLY INTEGRATED TEMPERATURE REGULATOR FOR BIOCHEMICAL APPLICATIONS 审中-公开
标题翻译：全面综合温度调节器用于生物化学应用
公开(公告)号：WO2009148664A2
公开(公告)日：2009-12-10
申请号：PCT/US2009/036288
申请日：2009-03-06
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , WANG, Hua , HAJIMIRI, Seyed, Ali
发明人： WANG, Hua , HAJIMIRI, Seyed, Ali
CPC分类号： G05D23/24 , G05D23/1906 , G05D23/22 , G05D23/27
摘要： The invention is an integrated temperature regulator that can be fabricated using conventional semiconductor processing technology. The integrated temperature regulator can include a reaction chamber, for example fabricated from PDMS, in which chemical or biochemical reactions of interest can be carried out. The temperature regular can also be used to regulate the temperature of some circuits, e.g. an effective-inductance-change based magnetic particle sensor, to achieve a stable operation performance, such as an improved sensitivity. The integrated temperature regulator includes as subcomponents a temperature sensing circuit that receives a thermal signal from the vicinity of the reaction chamber, a temperature reference circuit, and a temperature control circuit that controls a heater based at least in part on the difference between the sensed temperature and the reference temperature. The various subcomponents can be programmable.
摘要翻译：本发明是可以使用常规半导体处理技术制造的集成温度调节器。集成温度调节器可以包括例如由PDMS制造的反应室，其中可以进行感兴趣的化学或生物化学反应。温度常数也可用于调节某些电路的温度，例如基于有效电感变化的磁性粒子传感器，以实现稳定的操作性能，例如提高的灵敏度。集成温度调节器包括作为子部件的温度感测电路，其接收来自反应室附近的热信号，温度参考电路和温度控制电路，其至少部分地基于感测温度之间的差异来控制加热器和参考温度。各个子部件可以编程。

55. 发明申请

WO2009009652A3 SEGMENTED POWER AMPLIFIER 审中-公开
标题翻译：分段式功率放大器
公开(公告)号：WO2009009652A3
公开(公告)日：2009-05-22
申请号：PCT/US2008069623
申请日：2008-07-10
申请人： AXIOM MICRODEVICES INC , AOKI ICHIRO , KEE SCOTT D , HAJIMIRI SEYED-ALI , JOO ROBERTO APARICIO , MAGOON RAHUL , MCCLYMONT DONALD
发明人： AOKI ICHIRO , KEE SCOTT D , HAJIMIRI SEYED-ALI , JOO ROBERTO APARICIO , MAGOON RAHUL , MCCLYMONT DONALD
IPC分类号： H03F1/02 , H03F3/68 , H03F3/72
CPC分类号： H03F3/72 , H03F1/0277 , H03F3/245
摘要： A system for amplifying a signal is provided. The system includes a plurality of driver stages, each having an input, an output, and a disable control. An output stage having an input is coupled to the outputs of the plurality of driver stages. A plurality of disable control signals is provided to the driver stages so as to controllably enable and disable one or more of the driver stages.
摘要翻译：提供了一种用于放大信号的系统。该系统包括多个驱动器级，每个驱动器级具有输入，输出和禁用控制。具有输入的输出级耦合到多个驱动器级的输出。多个禁用控制信号被提供给驱动器级，以便可控制地启用和禁用一个或多个驱动器级。

56. 发明申请

WO2007038310A1 A mm-WAVE FULLY INTEGRATED PHASED ARRAY RECEIVER AND TRANSMITTER WITH ON CHIP ANTENNAS 审中-公开
标题翻译：一个毫米波的完全集成的相位阵列接收器和发射器与芯片天线
公开(公告)号：WO2007038310A1
公开(公告)日：2007-04-05
申请号：PCT/US2006/037050
申请日：2006-09-22
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , BABAKHANI, Aydin , GUAN, Xiang , HAJIMIRI, Seyed, Ali , KOMIJANI, Abbas , NATARAJAN, Arun
发明人： BABAKHANI, Aydin , GUAN, Xiang , HAJIMIRI, Seyed, Ali , KOMIJANI, Abbas , NATARAJAN, Arun
IPC分类号： G01S7/03
CPC分类号： H01Q9/065 , G01S7/032 , H01Q19/065
摘要： A phased array mm-wave device includes a substrate, a mm-wave transmitter integrated onto the substrate configured to transmit a mm-wave signal and/or a mm-wave receiver integrated onto the substrate and configured to receive a mm-wave signal. The mm-wave device also includes a phased array antenna system integrated onto the substrate and including two or more antenna elements. The phased array mm-wave device also includes one or more dielectric lenses. A distributed mm-wave distributed combining tree circuit includes at least two pairs of differential tranconductors with regenerative degeneration and accepts at least two differential input signals. Two mm-wave loopback methods measure the phased array antenna patterns and the performance of an integrated receiver transmitter system.
摘要翻译：相控阵mm波装置包括基板，集成在基板上的毫米波发射器，该波长发射器被配置成传输一毫米波信号和/或集成在基板上的毫米波接收器，并被配置为接收毫米波信号。毫米波器件还包括集成在衬底上并包括两个或多个天线元件的相控阵天线系统。相控阵mm波装置还包括一个或多个电介质透镜。分布式的毫米波分布式组合树电路包括具有再生退化的至少两对差分导体并且接受至少两个差分输入信号。两毫米波回环方法测量相控阵天线方向图和综合接收发射机系统的性能。

57. 发明申请

WO2005060655A3 DETERMINISTIC JITTER EQUALIZER 审中-公开
标题翻译：决定性智力平衡机
公开(公告)号：WO2005060655A3
公开(公告)日：2006-08-24
申请号：PCT/US2004042174
申请日：2004-12-14
申请人： CALIFORNIA INST OF TECHN , BUCKWALTER JAMES , HAJIMIRI SEYED ALI , ANALUI BEHNAM
发明人： BUCKWALTER JAMES , HAJIMIRI SEYED ALI , ANALUI BEHNAM
IPC分类号： H04B17/00 , H03H7/30 , H03H11/26 , H04B1/10 , H04L1/20 , H04L7/033 , H04L25/00
CPC分类号： H03H11/265 , H04L1/205 , H04L7/0337
摘要： An equalizer for serial data communications can be configured to compensate for the effects of deterministic jitter. The equalizer can be configured to compensate a received serial data stream for the effects of data-dependent jitter as well as duty cycle distortion jitter. The equalizer can be configured to determine the value of one or more previously received symbols and compare them to a recovered symbol. The equalizer can adjust a variable delay positioned in the serial data path to introduce a delay into the data path that is based in part on the received data stream. The equalizer can be configured to vary the delay when any of the one or more previously received symbols is different from the recovered symbol, and can be configured to maintain a constant delay if the one or more previously received symbols is the same as the recovered symbol.
摘要翻译：串行数据通信的均衡器可以配置为补偿确定性抖动的影响。均衡器可以配置为补偿接收的串行数据流，以获得与数据相关的抖动以及占空比失真抖动的影响。均衡器可以被配置为确定一个或多个先前接收的符号的值，并将其与恢复的符号进行比较。均衡器可以调整位于串行数据路径中的可变延迟，以将延迟引入到部分基于所接收的数据流的数据路径中。均衡器可以被配置为当一个或多个先前接收到的符号中的任一个与恢复的符号不同时，改变延迟，并且如果一个或多个先前接收到的符号与恢复的符号相同，则可以配置为保持恒定的延迟。

58. 发明申请

WO2005107074A3 INTEGRATED CIRCUIT WITH BREAKDOWN VOLTAGE MULTIPLIER 审中-公开
公开(公告)号：WO2005107074A3
公开(公告)日：2005-11-10
申请号：PCT/US2005/012758
申请日：2005-04-14
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , MANDEGARAN, Sam , HAJIMIRI, Seyed, Ali
发明人： MANDEGARAN, Sam , HAJIMIRI, Seyed, Ali
IPC分类号： H03K19/0175
摘要： An apparatus (130) and method for driving an output signal in a high speed integrated circuit. The apparatus and methods enable the output voltage swing from the driver (210) to exceed the breakdown voltage of any individual element in the output driver. A high speed driver can utilize one or more transistors (212, 214) in a stacked configuration, such that the breakdown voltage of the entire stacked configuration is based on the number of transistors in the stack. The driver is configured to distribute the output voltage substantially equally among each of the stacked transistors, such that the driver is able to source an output voltage swing that is greater than the breakdown voltage of any individual transistor in the driver.

59. 发明申请

WO2004102787A3 DISTRIBUTED OSCILLATOR ARCHITECTURES 审中-公开
公开(公告)号：WO2004102787A3
公开(公告)日：2004-11-25
申请号：PCT/US2004/014211
申请日：2004-05-07
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , HAJIMIRI, Seyed-Ali , WU, Hui
发明人： HAJIMIRI, Seyed-Ali , WU, Hui
IPC分类号： H03B5/18
摘要： A voltage controlled oscillator is provided. The voltage controlled oscillator includes a traveling-wave amplifier having two inputs and two outputs, such as would be formed by a first transmission line having a first input and a first output and a second transmission line having a second input and a second output. The first output of the traveling-wave amplifier is connected to the first input. A delay is connected between the second output and the second input, so as to provide a voltage controlled oscillator that requires minimal power to operate.

60. 发明申请

WO2003091871A2 SYSTEM AND METHOD FOR CLOCKLESS DATA RECOVERY 审中-公开
标题翻译：用于无数据恢复的系统和方法
公开(公告)号：WO2003091871A2
公开(公告)日：2003-11-06
申请号：PCT/US2003/012932
申请日：2003-04-25
申请人： CALIFORNIA INSTITUTE OF TECHNOLOGY , HAJIMIRI,Seyed-Ali , ANALUI, Behnam
发明人： HAJIMIRI,Seyed-Ali , ANALUI, Behnam
IPC分类号： G06F7/00
CPC分类号： H04L7/02 , H04L7/0337
摘要： A system for clockless synchronous data recovery is provided. The system includes an input rate demultiplexer receiving a serial data stream of bits of data transmitted at a bit rate and generating two or more parallel data streams from the serial data stream. One or more delays coupled to the input rate demultiplexer each receives one of the generated parallel serial data streams and delays bits of data and feeds them back to the input rate demultiplexer.
摘要翻译：提供了一种用于无时钟同步数据恢复的系统。该系统包括输入速率解复用器，其接收以比特率发送的数据位的串行数据流，并从串行数据流生成两个或更多个并行数据流。耦合到输入速率解复用器的一个或多个延迟器每个接收所产生的并行串行数据流中的一个并延迟数据位并将其馈送回输入速率解复用器。

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