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    • 60. 发明授权
    • Thin film transistor array panel and manufacturing method thereof
    • 薄膜晶体管阵列面板及其制造方法
    • US07863607B2
    • 2011-01-04
    • US11980871
    • 2007-10-30
    • Je-Hun LeeDo-Hyun KimChang-Oh Jeong
    • Je-Hun LeeDo-Hyun KimChang-Oh Jeong
    • H01L29/786
    • H01L29/7869H01L27/1225
    • The disclosed thin film transistor array panel includes an insulating substrate, a channel layer including an oxide formed on the insulating substrate. A gate insulating is layer formed on the channel layer and a gate electrode is formed on the gate insulating layer. An interlayer insulating layer is formed on the gate electrode and a data line formed on the interlayer insulating layer and includes a source electrode, wherein the data line is made of a first conductive layer and a second conductive layer. A drain electrode formed on the interlayer insulating layer, and includes the first conductive layer and the second conductive layer. A pixel electrode extends from the first conductive layer of the drain electrode and a passivation layer formed on the data line and the drain electrode. A spacer formed on the passivation layer.
    • 所公开的薄膜晶体管阵列面板包括绝缘基板,包括形成在绝缘基板上的氧化物的沟道层。 栅极绝缘层是在沟道层上形成的层,栅电极形成在栅极绝缘层上。 在栅电极上形成层间绝缘层,形成在层间绝缘层上的数据线,包括源电极,其中数据线由第一导电层和第二导电层构成。 一种形成在层间绝缘层上的漏极,包括第一导电层和第二导电层。 像素电极从漏电极的第一导电层和形成在数据线和漏电极上的钝化层延伸。 形成在钝化层上的间隔物。