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41. 发明申请

US20080185636A1 SEMICONDUCTOR STRUCTURE INCLUDING DOPED SILICON CARBON LINER LAYER AND METHOD FOR FABRICATION THEREOF 有权
标题翻译：包括掺杂硅碳板层的半导体结构及其制造方法
公开(公告)号：US20080185636A1
公开(公告)日：2008-08-07
申请号：US11672109
申请日：2007-02-07
申请人： Zhijiong Luo , Yaocheng Liu
发明人： Zhijiong Luo , Yaocheng Liu
IPC分类号： H01L21/336 , H01L29/78
CPC分类号： H01L29/66545 , H01L29/1083 , H01L29/165 , H01L29/665 , H01L29/6659 , H01L29/66636 , H01L29/7834
摘要： A semiconductor structure and related method for fabrication thereof includes a liner layer interposed between: (1) a pedestal shaped channel region within a semiconductor substrate; and (2) a source region and a drain region within a semiconductor material layer located upon the liner layer and further laterally separated from the pedestal shaped channel region within the semiconductor substrate. The liner layer comprises an active doped silicon carbon material. The semiconductor material layer may comprises a semiconductor material other than a silicon carbon semiconductor material. The semiconductor material layer may alternatively comprise a silicon carbon semiconductor material having an opposite dopant polarity and lower carbon content in comparison with the liner layer. Due to presence of the silicon carbon material, the liner layer inhibits dopant diffusion therefrom into the pedestal shaped channel region. Electrical performance of a field effect device that uses the pedestal shaped channel region is thus enhanced.
摘要翻译：半导体结构及其相关制造方法包括：衬垫层，介于：（1）半导体衬底内的基座形沟道区; 以及（2）位于衬里层上的半导体材料层内的源极区域和漏极区域，并且与半导体衬底内的基座形状沟道区域进一步横向分离。衬里层包括有源掺杂硅碳材料。半导体材料层可以包括除了硅碳半导体材料之外的半导体材料。可选地，半导体材料层可以包含与衬里层相比具有相反掺杂剂极性和较低碳含量的硅碳半导体材料。由于存在硅碳材料，衬垫层阻止掺杂剂从其中扩散到基座形沟道区域中。因此，增强了使用基座形状的通道区域的场效应装置的电气性能。

42. 发明申请

US20080026516A1 RAISED STI STRUCTURE AND SUPERDAMASCENE TECHNIQUE FOR NMOSFET PERFORMANCE ENHANCEMENT WITH EMBEDDED SILICON CARBON 失效
公开(公告)号：US20080026516A1
公开(公告)日：2008-01-31
申请号：US11459730
申请日：2006-07-25
申请人： Ashima B. Chakravarti , Dureseti Chidambarrao , Judson R. Holt , Yaocheng Liu , Kern Rim
发明人： Ashima B. Chakravarti , Dureseti Chidambarrao , Judson R. Holt , Yaocheng Liu , Kern Rim
IPC分类号： H01L21/8234
CPC分类号： H01L21/823864 , H01L21/76224 , H01L21/823807 , H01L21/823814 , H01L21/823878 , H01L29/165 , H01L29/66628 , H01L29/7843 , H01L29/7848
摘要： An embedded silicon carbon (Si:C) having a substitutional carbon content in excess of one percent in order to effectively increase electron mobility by application of tension to a channel region of an NFET is achieved by overfilling a gap or trench formed by transistor gate structures with Si:C and polishing an etching the Si:C to or below a surface of a raised gate structure in a super-Damascene process, leaving Si:C only in selected regions above the transistor source and drain, even though processes capable of depositing Si:C with sufficiently high substitutional carbon content are inherently non-selective.

43. 发明申请

US20070238267A1 Epitaxy of Silicon-Carbon Substitutional Solid Solutions by Ultra-Fast Annealing of Amorphous Material 审中-公开
标题翻译：通过非晶材料的超快退火，硅 - 碳替代固溶体的外延
公开(公告)号：US20070238267A1
公开(公告)日：2007-10-11
申请号：US11308463
申请日：2006-03-28
申请人： Yaocheng Liu , Oleg Gluschenkov , Anita Madan , Kern Rim , Judson Holt
发明人： Yaocheng Liu , Oleg Gluschenkov , Anita Madan , Kern Rim , Judson Holt
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/02667 , H01L21/02524 , H01L21/2022 , H01L21/2026 , H01L21/268 , H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L29/6656 , H01L29/78 , H01L29/7848
摘要： Expitaxial substitutional solid solutions of silicon carbon can be obtained by an ultrafast anneal of an amorphous carbon-containing silicon material. The anneal is performed at a temperature above the recrystallization point, but below the melting point of the material and preferably lasts for less than 100 milliseconds in this temperature regime. The anneal is preferably a flash anneal or laser anneal. This approach is able to produce epitaxial silicon and carbon-containing materials with a substantial portion of the carbon atoms at substitutional lattice positions. The approach is especially useful in CMOS processes and other electronic device manufacture where the presence of epitaxial Si1−yCy, y
摘要翻译：可以通过非晶态含碳硅材料的超快速退火获得硅碳的外延取代固溶体。退火在高于再结晶点的温度下进行，但低于材料的熔点，并且在该温度范围内优选持续小于100毫秒。退火优选是闪光退火或激光退火。这种方法能够产生具有相当大部分碳原子在取代晶格位置的外延硅和含碳材料。该方法在CMOS工艺和其它电子器件制造中特别有用，其中外延Si 1-y C y y y的存在y <0.1对于应变工程或带隙工程是理想的。

44. 发明授权

US07279758B1 N-channel MOSFETs comprising dual stressors, and methods for forming the same 有权
标题翻译：包含双重应力的N沟道MOSFET及其形成方法
公开(公告)号：US07279758B1
公开(公告)日：2007-10-09
申请号：US11420047
申请日：2006-05-24
申请人： Jinghong H. Li , Yaocheng Liu , Zhijiong Luo , Anita Madan , Nivo Rovedo
发明人： Jinghong H. Li , Yaocheng Liu , Zhijiong Luo , Anita Madan , Nivo Rovedo
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/823814 , H01L21/26506 , H01L21/324 , H01L21/823807 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/66636 , H01L29/7833 , H01L29/7848 , Y10S257/90
摘要： The present invention relates to a semiconductor device including at least one n-channel field effect transistor (n-FET). Specifically, the n-FET includes first and second patterned stressor layers that both contain a carbon-substituted and tensilely stressed single crystal semiconductor. The first patterned stressor layer has a first carbon concentration and is located in source and drain (S/D) extension regions of the n-FET at a first depth. The second patterned stressor layer has a second, higher carbon concentration and is located in S/D regions of the n-FET at a second, deeper depth. Such an n-FET with the first and second patterned stressor layers of different carbon concentration and different depths provide improved stress profile for enhancing electron mobility in the channel region of the n-FET.
摘要翻译：本发明涉及包括至少一个n沟道场效应晶体管（n-FET）的半导体器件。具体地说，n-FET包括均包含碳取代和拉伸应力单晶半导体的第一和第二图案应力层。第一图案应力层具有第一碳浓度并且位于第一深度处的n-FET的源极和漏极（S / D）延伸区域中。第二图案应力层具有第二较高的碳浓度，并且位于第二较深深度处的n-FET的S / D区中。这种具有不同碳浓度和不同深度的第一和第二图案应力层的n-FET提供了改善的应力分布，用于增强n-FET的沟道区域中的电子迁移率。

45. 发明授权

US06835488B2 Fuel cell with patterned electrolyte/electrode interface 失效
标题翻译：具有图案电解质/电极界面的燃料电池
公开(公告)号：US06835488B2
公开(公告)日：2004-12-28
申请号：US09850411
申请日：2001-05-08
申请人： Jun Sasahara , Suk Won Cha , Amy Chang-Chien , Tadahiro Kubota , Nariaki Kuriyama , Sang-Joon J. Lee , Yaocheng Liu , Ryan O'Hayre , Friedrich B. Prinz , Yuji Saito
发明人： Jun Sasahara , Suk Won Cha , Amy Chang-Chien , Tadahiro Kubota , Nariaki Kuriyama , Sang-Joon J. Lee , Yaocheng Liu , Ryan O'Hayre , Friedrich B. Prinz , Yuji Saito
IPC分类号： H01M214
CPC分类号： H01M4/86 , H01M4/0485 , H01M8/0254 , H01M8/0289 , H01M8/1007 , H01M2008/1293
摘要： A fuel cell contains an electrolyte sheet sandwiched between two electrodes. One or both electrode/electrolyte interfaces includes mesoscopic three-dimensional features in a prescribed pattern. The features increase the surface area-to-volume ratio of the device and can be used as integral channels for directing the flow of reactant gases to the reaction surface area, eliminating the need for channels in sealing plates surrounding the electrodes. The electrolyte can be made by micromachining techniques that allow very precise feature definition. Both selective removal and mold-filling techniques can be used. The fuel cell provides significantly enhanced volumetric power density when compared with conventional fuel cells.
摘要翻译：燃料电池包含夹在两个电极之间的电解质片。一个或两个电极/电解质界面包括规定图案的介观三维特征。这些特征增加了装置的表面积 - 体积比，并且可以用作用于将反应物气体流引导到反应表面区域的整体通道，从而不需要围绕电极的密封板中的通道。电解质可以通过允许非常精确的特征定义的微加工技术制成。可以使用选择性去除和模具填充技术。与常规燃料电池相比，燃料电池提供显着提高的体积功率密度。

46. 发明授权

US08642434B2 Structure and method for mobility enhanced MOSFETS with unalloyed silicide 有权
标题翻译：具有非合金化硅化物的移动性增强MOSFET的结构和方法
公开(公告)号：US08642434B2
公开(公告)日：2014-02-04
申请号：US13397865
申请日：2012-02-16
申请人： Yaocheng Liu , Dureseti Chidambarrao , Oleg Gluschenkov , Judson R. Holt , Renee T. Mo , Kern Rim
发明人： Yaocheng Liu , Dureseti Chidambarrao , Oleg Gluschenkov , Judson R. Holt , Renee T. Mo , Kern Rim
IPC分类号： H01L21/336 , H01L21/8238
CPC分类号： H01L21/823864 , H01L21/76886 , H01L21/823807 , H01L21/823814 , H01L21/84 , H01L27/1203 , H01L27/3279 , H01L29/165 , H01L29/665 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/7848
摘要： While embedded silicon germanium alloy and silicon carbon alloy provide many useful applications, especially for enhancing the mobility of MOSFETs through stress engineering, formation of alloyed silicide on these surfaces degrades device performance. The present invention provides structures and methods for providing unalloyed silicide on such silicon alloy surfaces placed on semiconductor substrates. This enables the formation of low resistance contacts for both mobility enhanced PFETs with embedded SiGe and mobility enhanced NFETs with embedded Si:C on the same semiconductor substrate. Furthermore, this invention provides methods for thick epitaxial silicon alloy, especially thick epitaxial Si:C alloy, above the level of the gate dielectric to increase the stress on the channel on the transistor devices.
摘要翻译：虽然嵌入式硅锗合金和硅碳合金提供了许多有用的应用，特别是为了通过应力工程增强MOSFET的迁移率，在这些表面上形成合金化硅化物降低了器件性能。本发明提供了在放置在半导体衬底上的这种硅合金表面上提供非合金硅化物的结构和方法。这使得能够在具有嵌入式SiGe的迁移率增强的PFET和在同一半导体衬底上具有嵌入的Si：C的迁移率增强的NFET形成低电阻触点。此外，本发明提供了在栅极电介质的电平之上的厚外延硅合金，特别是厚的外延Si：C合金的方法，以增加晶体管器件上的沟道上的应力。

47. 发明申请

US20120146092A1 STRUCTURE AND METHOD FOR MOBILITY ENHANCED MOSFETS WITH UNALLOYED SILICIDE 有权
标题翻译：具有硅酸盐的移动增强MOSFET的结构和方法
公开(公告)号：US20120146092A1
公开(公告)日：2012-06-14
申请号：US13397860
申请日：2012-02-16
申请人： Yaocheng Liu , Dureseti Chidambarrao , Oleg Gluschenkov , Judson R. Holt , Renee T. Mo , Kern Rim
发明人： Yaocheng Liu , Dureseti Chidambarrao , Oleg Gluschenkov , Judson R. Holt , Renee T. Mo , Kern Rim
IPC分类号： H01L27/092
CPC分类号： H01L21/823864 , H01L21/76886 , H01L21/823807 , H01L21/823814 , H01L21/84 , H01L27/1203 , H01L27/3279 , H01L29/165 , H01L29/665 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/7848
摘要： While embedded silicon germanium alloy and silicon carbon alloy provide many useful applications, especially for enhancing the mobility of MOSFETs through stress engineering, formation of alloyed silicide on these surfaces degrades device performance. The present invention provides structures and methods for providing unalloyed silicide on such silicon alloy surfaces placed on semiconductor substrates. This enables the formation of low resistance contacts for both mobility enhanced PFETs with embedded SiGe and mobility enhanced NFETs with embedded Si:C on the same semiconductor substrate. Furthermore, this invention provides methods for thick epitaxial silicon alloy, especially thick epitaxial Si:C alloy, above the level of the gate dielectric to increase the stress on the channel on the transistor devices.
摘要翻译：虽然嵌入式硅锗合金和硅碳合金提供了许多有用的应用，特别是为了通过应力工程增强MOSFET的迁移率，在这些表面上形成合金化硅化物降低了器件性能。本发明提供了在放置在半导体衬底上的这种硅合金表面上提供非合金硅化物的结构和方法。这使得能够在具有嵌入式SiGe的迁移率增强的PFET和在同一半导体衬底上具有嵌入的Si：C的迁移率增强的NFET形成低电阻触点。此外，本发明提供了在栅极电介质的电平之上的厚外延硅合金，特别是厚的外延Si：C合金的方法，以增加晶体管器件上的沟道上的应力。

48. 发明授权

US07709910B2 Semiconductor structure for low parasitic gate capacitance 有权
标题翻译：用于低寄生栅极电容的半导体结构
公开(公告)号：US07709910B2
公开(公告)日：2010-05-04
申请号：US11738666
申请日：2007-04-23
申请人： William K. Henson , Paul Chung-Muh Chang , Dureseti Chidambarrao , Ricardo A. Donaton , Yaocheng Liu , Shreesh Narasimha , Amanda L. Tessier
发明人： William K. Henson , Paul Chung-Muh Chang , Dureseti Chidambarrao , Ricardo A. Donaton , Yaocheng Liu , Shreesh Narasimha , Amanda L. Tessier
IPC分类号： H01L29/78
CPC分类号： H01L21/823807 , H01L21/28097 , H01L21/76814 , H01L21/7682 , H01L21/76832 , H01L21/76844 , H01L21/823864 , H01L29/4975 , H01L29/517 , H01L29/66545 , H01L29/7843
摘要： A semiconductor structure provides lower parasitic capacitance between the gate electrode and contact vias while providing substantially the same level of stress applied by a nitride liner as conventional MOSFETs by reducing the height of the gate electrode and maintaining substantially the same height for the gate spacer. The nitride liner contacts only the outer sidewalls of the gate spacer, while not contacting inner sidewalls, or only a small area of the inner sidewalls of the gate spacer, therefore applying substantially the same level of stress to the channel of the MOSFET as conventional MOSFETs. The volume surrounded by the gate spacer and located above the gate electrode is either filled with a low-k dielectric material or occupied by a cavity having a dielectric constant of substantially 1.0. The reduced height of the gate electrode and the low-k dielectric gate filler or the cavity reduces the parasitic capacitance.
摘要翻译：半导体结构在栅电极和接触通孔之间提供较低的寄生电容，同时通过降低栅极电极的高度并保持与栅极间隔件基本上相同的高度，提供与常规MOSFET相同的氮化物衬垫施加的基本相同的应力水平。氮化物衬垫仅接触栅极间隔物的外侧壁，而不接触内侧壁，或者仅接触栅极隔离物的内侧壁的小面积，因此与常规MOSFET相比施加与MOSFET的通道基本相同的应力水平。由栅极间隔物围绕并位于栅极电极上方的体积填充有低k电介质材料或由具有基本上1.0的介电常数的空腔占据。栅电极和低k电介质栅极填充物或空腔的降低的高度减小了寄生电容。

49. 发明授权

US07696000B2 Low defect Si:C layer with retrograde carbon profile 有权
标题翻译：低缺陷Si：C层具有逆行碳分布
公开(公告)号：US07696000B2
公开(公告)日：2010-04-13
申请号：US11565793
申请日：2006-12-01
申请人： Yaocheng Liu , Subramanian S. Iyer , Jinghong Li
发明人： Yaocheng Liu , Subramanian S. Iyer , Jinghong Li
IPC分类号： H01L21/00
CPC分类号： H01L29/1054 , H01L21/2022 , H01L21/26506 , H01L29/32 , H01L29/7848 , H01L29/78618 , H01L29/78654 , H01L29/78696
摘要： Formation of carbon-substituted single crystal silicon layer is prone to generation of large number of defects especially at high carbon concentration. The present invention provides structures and methods for providing low defect carbon-substituted single crystal silicon layer even for high concentration of carbon in the silicon. According to the present invention, the active retrograde profile in the carbon implantation reduces the defect density in the carbon-substituted single crystal silicon layer obtained after a solid phase epitaxy. This enables the formation of semiconductor structures with compressive stress and low defect density. When applied to semiconductor transistors, the present invention enables N-type field effect transistors with enhanced electron mobility through the tensile stress that is present into the channel.
摘要翻译：碳取代的单晶硅层的形成容易产生大量的缺陷，特别是在高碳浓度下。本发明提供即使对于硅中的高浓度碳来提供低缺陷碳取代的单晶硅层的结构和方法。根据本发明，碳注入中的主动逆行曲线减少了在固相外延后获得的碳取代单晶硅层中的缺陷密度。这使得能够形成具有压缩应力和低缺陷密度的半导体结构。当应用于半导体晶体管时，本发明能够通过存在于沟道中的拉伸应力使具有增强的电子迁移率的N型场效应晶体管成为可能。

50. 发明授权

US07667263B2 Semiconductor structure including doped silicon carbon liner layer and method for fabrication thereof 有权
标题翻译：包括掺杂硅碳衬层的半导体结构及其制造方法
公开(公告)号：US07667263B2
公开(公告)日：2010-02-23
申请号：US11672109
申请日：2007-02-07
申请人： Zhijiong Luo , Yaocheng Liu
发明人： Zhijiong Luo , Yaocheng Liu
IPC分类号： H01L21/336
CPC分类号： H01L29/66545 , H01L29/1083 , H01L29/165 , H01L29/665 , H01L29/6659 , H01L29/66636 , H01L29/7834
摘要： A semiconductor structure and related method for fabrication thereof includes a liner layer interposed between: (1) a pedestal shaped channel region within a semiconductor substrate; and (2) a source region and a drain region within a semiconductor material layer located upon the liner layer and further laterally separated from the pedestal shaped channel region within the semiconductor substrate. The liner layer comprises an active doped silicon carbon material. The semiconductor material layer may comprises a semiconductor material other than a silicon carbon semiconductor material. The semiconductor material layer may alternatively comprise a silicon carbon semiconductor material having an opposite dopant polarity and lower carbon content in comparison with the liner layer. Due to presence of the silicon carbon material, the liner layer inhibits dopant diffusion therefrom into the pedestal shaped channel region. Electrical performance of a field effect device that uses the pedestal shaped channel region is thus enhanced.
摘要翻译：半导体结构及其相关制造方法包括：衬垫层，介于：（1）半导体衬底内的基座形沟道区; 以及（2）位于衬里层上的半导体材料层内的源极区域和漏极区域，并且与半导体衬底内的基座形状沟道区域进一步横向分离。衬里层包括有源掺杂硅碳材料。半导体材料层可以包括除了硅碳半导体材料之外的半导体材料。可选地，半导体材料层可以包含与衬里层相比具有相反掺杂剂极性和较低碳含量的硅碳半导体材料。由于存在硅碳材料，衬垫层阻止掺杂剂从其中扩散到基座形沟道区域中。因此，增强了使用基座形状的通道区域的场效应装置的电气性能。

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