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41. 发明授权

US08912890B2 Surveillance devices with multiple capacitors 有权
标题翻译：具有多个电容器的监控设备
公开(公告)号：US08912890B2
公开(公告)日：2014-12-16
申请号：US13632745
申请日：2012-10-01
申请人： Patrick Smith , Criswell Choi , James Montague Cleeves , Vivek Subramanian , Arvind Kamath , Steven Molesa
发明人： Patrick Smith , Criswell Choi , James Montague Cleeves , Vivek Subramanian , Arvind Kamath , Steven Molesa
IPC分类号： H04Q5/22
CPC分类号： H01G4/40 , H01G4/38
摘要： The disclosure relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.
摘要翻译：本公开涉及具有并联或串联连接的电容器的监视和/或识别装置以及制造和使用这些装置的方法。具有并联连接电容器的器件，其中一个电容器用相对较厚的电容器电介质制造，另一个电容器由相对薄的电容器电介质制成，实现了高精度电容和低击穿电压，以便相对容易的监视标签去激活。具有串联连接的电容器的装置增加了小电容器的横向尺寸。这使得使用可能具有相对有限的分辨能力的技术来制造电容器更容易。

42. 发明授权

US08264027B2 Printed non-volatile memory 有权
标题翻译：打印的非易失性存储器
公开(公告)号：US08264027B2
公开(公告)日：2012-09-11
申请号：US12723542
申请日：2010-03-12
申请人： Arvind Kamath , Patrick Smith , James Montague Cleeves
发明人： Arvind Kamath , Patrick Smith , James Montague Cleeves
IPC分类号： H01L29/788
CPC分类号： H01L21/28518 , H01L21/288 , H01L21/76801 , H01L21/76895 , H01L27/115 , H01L27/11558 , H01L27/1292 , H01L29/66757 , H01L29/66825 , H01L29/7881
摘要： A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.
摘要翻译：公开了一种非易失性存储器单元，其具有在相同水平位置处并且间隔开预定距离的第一和第二半导体岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道介电层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。在一个有利的实施例中，可以使用“全印刷”工艺技术来制造非易失性存储单元。

43. 发明授权

US07956425B1 Graded gate field 有权
标题翻译：分级门字段
公开(公告)号：US07956425B1
公开(公告)日：2011-06-07
申请号：US12698973
申请日：2010-02-02
申请人： James Montague Cleeves
发明人： James Montague Cleeves
IPC分类号： H01L21/02
CPC分类号： H01L29/78621 , H01L29/66757
摘要： Thin film transistors (TFT) and methods for making same. The TFTs generally comprise: (a) a semiconductor layer comprising source and drain terminals and a channel region therebetween; (b) a gate electrode comprising a gate and a gate dielectric layer between the gate and the channel region; (c) a first dielectric layer adjacent to the gate electrode and in contact with the source and drain terminals, the first dielectric layer comprising a material which comprises a dopant therein; and (d) an electrically functional source/drain extensions in the channel region, adjacent to the source and drain terminals, comprising a material which comprises the same dopant as the first dielectric layer.
摘要翻译：薄膜晶体管（TFT）及其制造方法。 TFT通常包括：（a）包括源极和漏极端子以及它们之间的沟道区域的半导体层; （b）栅电极，在栅极和沟道区之间包括栅极和栅介质层; （c）与栅电极相邻并与源极和漏极端子接触的第一电介质层，第一介电层包括在其中包含掺杂剂的材料; 和（d）沟道区域中的与源极和漏极端子相邻的电功率源极/漏极延伸部分，包括与第一介电层相同的掺杂剂的材料。

44. 发明申请

US20080048240A1 Printed Non-Volatile Memory 有权
标题翻译：印刷非易失性存储器
公开(公告)号：US20080048240A1
公开(公告)日：2008-02-28
申请号：US11842884
申请日：2007-08-21
申请人： Arvind Kamath , Patrick Smith , James Montague Cleeves
发明人： Arvind Kamath , Patrick Smith , James Montague Cleeves
IPC分类号： H01L29/788 , H01L21/336
CPC分类号： H01L21/28518 , H01L21/288 , H01L21/76801 , H01L21/76895 , H01L27/115 , H01L27/11558 , H01L27/1292 , H01L29/66757 , H01L29/66825 , H01L29/7881
摘要： A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.
摘要翻译：公开了一种非易失性存储器单元，其具有在相同水平位置处并且间隔开预定距离的第一和第二半导体岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道介电层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。在一个有利的实施例中，可以使用“全印刷”工艺技术来制造非易失性存储单元。

45. 发明授权

US06786998B1 Wafer temperature control apparatus and method 失效
标题翻译：晶圆温度控制装置及方法
公开(公告)号：US06786998B1
公开(公告)日：2004-09-07
申请号：US08581347
申请日：1995-12-29
申请人： James Montague Cleeves
发明人： James Montague Cleeves
IPC分类号： C23F102
CPC分类号： H01L21/68721 , H01J2237/2001 , H01L21/67069 , H01L21/67109 , H01L21/67126
摘要： An assembly for holding a substrate is provided. The substrate has a first surface, a second surface, opposite the first surface and an outer peripheral portion. The assembly includes a holding body having a support surface for supporting the substrate. The holding body has an aperture for passing therethrough a gas having a thermal conductivity. Additionally, the assembly includes a heat transferring seal having a first surface for frictionally engaging the second surface of the substrate. The heat transferring seal has a second surface, opposite the first surface, for frictionally engaging the support surface of the holding body. The heat transferring seal also has an inner peripheral portion defining an opening for receiving the gas. The heat transferring seal has a thermal conductivity closely matched with the first thermal conductivity of the gas for providing substantially uniform heat transfer across the substrate.
摘要翻译：提供了一种用于保持基板的组件。基板具有与第一表面相对的第一表面，第二表面和外周边部分。组件包括具有用于支撑衬底的支撑表面的保持体。保持体具有用于使具有导热性的气体通过的孔。另外，组件包括具有用于摩擦地接合衬底的第二表面的第一表面的传热密封件。传热密封件具有与第一表面相对的第二表面，用于与保持体的支撑表面摩擦接合。传热密封件还具有限定用于接收气体的开口的内周部分。传热密封件具有与气体的第一热导率密切匹配的导热性，以提供穿过基底的基本上均匀的热传递。

46. 发明授权

US09165238B2 Methods for manufacturing RFID tags and structures formed therefrom 有权
标题翻译：用于制造由其形成的RFID标签和结构的方法
公开(公告)号：US09165238B2
公开(公告)日：2015-10-20
申请号：US12689703
申请日：2010-01-19
申请人： James Montague Cleeves , J. Devin MacKenzie , Arvind Kamath
发明人： James Montague Cleeves , J. Devin MacKenzie , Arvind Kamath
IPC分类号： H01L21/3205 , G06K19/077 , H01F17/00
CPC分类号： H01L27/1255 , G06K19/073 , G06K19/07749 , H01F17/0006 , H01L23/13 , H01L23/142 , H01L23/66 , H01L27/127 , H01L27/1292 , H01L28/60 , H01L29/66143 , H01L29/66742 , H01L29/78696 , H01L29/872 , H01L2223/6611 , H01L2223/6677 , H01L2924/0002 , H01L2924/00
摘要： Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g., improved electrical characteristics) as compared to tags containing organic electronic devices.
摘要翻译：射频识别（RFID）标签及其制造方法。 RFID设备通常包括（1）金属天线和/或电感器; （2）其上的介电层，用于支撑和绝缘来自金属天线和/或电感器的集成电路; （3）介电层上的多个二极管和多个晶体管，二极管具有至少一个与晶体管共同的层; 和（4）与金属天线和/或电感器以及至少一些二极管电连通的多个电容器，所述多个电容器具有与所述多个二极管共同的至少一个层和/或与所述多个二极管的触点二极管和晶体管。该方法优选将液态含硅油墨沉积物集成到用于制造RFID电路的成本有效的集成制造工艺中。此外，与含有机电子器件的标签相比，本RFID标签通常提供更高的性能（例如，改进的电气特性）。

47. 发明授权

US08891264B1 Series circuits and devices 有权
标题翻译：串联电路和器件
公开(公告)号：US08891264B1
公开(公告)日：2014-11-18
申请号：US11940161
申请日：2007-11-14
申请人： James Montague Cleeves , Patrick Smith
发明人： James Montague Cleeves , Patrick Smith
IPC分类号： H02H7/125 , H02H7/127
CPC分类号： G06K19/0701 , H01L27/0266 , Y02P80/30
摘要： Embodiments of the present invention relate to a rectifier circuit and methods of making the same for use in wireless devices (e.g., RFID tags). The present invention is drawn to a rectifier circuit comprising first and second diode-wired transistors in series, each having a gate oxide layers of the same target thickness. The first diode-wired transistor receives an alternating current and the second diode-wired transistor provides a rectifier output. The first and second diode-wired transistors are configured to divide between them a first voltage differential across the rectifier circuit. The gate oxides are exposed to a peak stress that is similar to a stress on the gate oxide of logic transistors made using the same process. The present invention is further drawn to a method of making a rectifier circuit, comprising printing a plurality of transistor bodies on a substrate, forming a gate oxide on each of the transistor bodies and a gate on each gate oxide, doping exposed portions of the transistor body to form first and second source/drain terminals therein, and forming interconnects electrically connecting the first source/drain terminals to the gate over the corresponding transistor body.
摘要翻译：本发明的实施例涉及一种整流电路及其制造方法，用于无线设备（例如RFID标签）。本发明涉及一种包括串联的第一和第二二极管接线晶体管的整流电路，每个具有相同目标厚度的栅氧化层。第一二极管接线晶体管接收交流电流，第二二极管接线晶体管提供整流器输出。第一和第二二极管接线晶体管被配置为在它们之间划分整流器电路两端的第一电压差。栅极氧化物暴露于与使用相同工艺制造的逻辑晶体管的栅极氧化物上的应力相似的峰值应力。本发明进一步涉及一种制造整流器电路的方法，包括在衬底上印刷多个晶体管本体，在每个晶体管本体上形成栅极氧化物，并在每个栅极氧化物上形成栅极，掺杂晶体管的暴露部分从而在其中形成第一和第二源极/漏极端子，以及形成将第一源极/漏极端子电连接到相应晶体管本体上的栅极的互连。

48. 发明授权

US08413619B2 Variable compression ratio systems for opposed-piston and other internal combustion engines, and related methods of manufacture and use 有权
公开(公告)号：US08413619B2
公开(公告)日：2013-04-09
申请号：US13269541
申请日：2011-10-07
申请人： James Montague Cleeves
发明人： James Montague Cleeves
IPC分类号： F02B75/04 , F02B25/08
CPC分类号： F02D15/02 , F01B1/10 , F01B7/02 , F01B7/14 , F01L1/3442 , F01L2001/3443 , F01L2001/34469 , F01L2820/041 , F02B75/042 , F02B75/282 , F02D15/00
摘要： Various embodiments of methods and systems for varying the compression ratio in opposed-piston engines are disclosed herein. In one embodiment, an opposed-piston engine can include a first phaser operably coupled to a first crankshaft and a second phaser operably coupled to a corresponding second crankshaft. The phase angle between the crankshafts can be changed to reduce or increase the compression ratio in the corresponding combustion chamber to optimize or at least improve engine performance under a given set of operating conditions.

49. 发明申请

US20130069785A1 High Reliability Surveillance and/or Identification Tag/Devices and Methods of Making and Using the Same 有权
公开(公告)号：US20130069785A1
公开(公告)日：2013-03-21
申请号：US13590006
申请日：2012-08-20
申请人： Vivek SUBRAMANIAN , Patrick Smith , Vikram Pavate , Arvind Kamath , Criswell Choi , Aditi Chandra , James Montague Cleeves
发明人： Vivek SUBRAMANIAN , Patrick Smith , Vikram Pavate , Arvind Kamath , Criswell Choi , Aditi Chandra , James Montague Cleeves
IPC分类号： G08B13/24 , G06K19/067
CPC分类号： G08B13/2431 , G06K19/067 , G06K19/07749 , G08B13/242 , G08B13/2437
摘要： The present invention relates to methods of making capacitors for use in surveillance/identification tags or devices, and methods of using such surveillance/identification devices. The capacitors manufactured according to the methods of the present invention and used in the surveillance/identification devices described herein comprise printed conductive and dielectric layers. The methods and devices of the present invention improve the manufacturing tolerances associated with conventional metal-plastic-metal capacitor, as well as the deactivation reliability of the capacitor used in a surveillance/identification tag or device.

50. 发明申请

US20120307569A1 Printed Non-Volatile Memory 有权
标题翻译：印刷非易失性存储器
公开(公告)号：US20120307569A1
公开(公告)日：2012-12-06
申请号：US13585673
申请日：2012-08-14
申请人： Arvind KAMATH , Patrick Smith , James Montague Cleeves
发明人： Arvind KAMATH , Patrick Smith , James Montague Cleeves
IPC分类号： H01L29/788 , G11C16/10 , G11C16/04 , H01L21/336
CPC分类号： H01L21/28518 , H01L21/288 , H01L21/76801 , H01L21/76895 , H01L27/115 , H01L27/11558 , H01L27/1292 , H01L29/66757 , H01L29/66825 , H01L29/7881
摘要： A nonvolatile memory cell is disclosed, having first and second semiconductor islands at the same horizontal level and spaced a predetermined distance apart, the first semiconductor island providing a control gate and the second semiconductor island providing source and drain terminals; a gate dielectric layer on at least part of the first semiconductor island; a tunneling dielectric layer on at least part of the second semiconductor island; a floating gate on at least part of the gate dielectric layer and the tunneling dielectric layer; and a metal layer in electrical contact with the control gate and the source and drain terminals. In one advantageous embodiment, the nonvolatile memory cell may be manufactured using an “all-printed” process technology.
摘要翻译：公开了一种非易失性存储器单元，其具有在相同水平位置处并且间隔开预定距离的第一和第二半导体岛，所述第一半岛具有提供控制栅极和所述第二半岛岛提供源极和漏极端子; 在所述第一半导体岛的至少一部分上的栅介质层; 在所述第二半导体岛的至少一部分上的隧道介电层; 至少部分栅极电介质层和隧道电介质层上的浮栅; 以及与控制栅极以及源极和漏极端子电接触的金属层。在一个有利的实施例中，非易失性存储单元可以使用全印刷工艺技术来制造。

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