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41. 发明授权

US07630434B2 High-speed decoder for a multi-pair gigabit transceiver 有权
公开(公告)号：US07630434B2
公开(公告)日：2009-12-08
申请号：US11257810
申请日：2005-10-25
申请人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
发明人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
IPC分类号： H03H7/30
CPC分类号： H04L7/0062 , G01R31/3004 , G01R31/3008 , G01R31/3016 , G01R31/31715 , G01R31/318502 , G01R31/318552 , G01R31/318594 , H03M13/256 , H03M13/41 , H03M13/6331 , H04B3/23 , H04B3/32 , H04L1/005 , H04L1/0052 , H04L1/0054 , H04L1/0059 , H04L1/242 , H04L7/0334 , H04L25/03038 , H04L25/03057 , H04L25/03146 , H04L25/03267 , H04L25/067 , H04L25/14 , H04L25/4917 , H04L25/497 , H04L2025/03363 , H04L2025/03369 , H04L2025/03477 , H04L2025/0349 , H04L2025/03496 , H04L2025/03503 , H04L2025/03617 , H04L2025/03745
摘要： A method and a system for providing an input signal from a multiple decision feedback equalizer to a decoder based on a tail value and a subset of coefficient values received from a decision-feedback equalizer. A set of pre-computed values based on the subset of coefficient values is generated. Each of the pre-computed values is combined with the tail value to generate a tentative sample. One of the tentative samples is selected as the input signal to the decoder. In one aspect of the system, tentative samples are saturated and then stored in a set of registers before being outputted to a multiplexer which selects one of the tentative samples as the input signal to the decoder. This operation of storing the tentative samples in the registers before providing the tentative samples to the multiplexer facilitates high-speed operation by breaking up a critical path of computations into substantially balanced first and second portions, the first portion including computations in the decision-feedback equalizer and the multiple decision feedback equalizer, the second portion including computations in the decoder.

42. 发明授权

US07529778B1 System and method for providing access to consistent point-in-time file versions 有权
标题翻译：提供访问一致的时间点文件版本的系统和方法
公开(公告)号：US07529778B1
公开(公告)日：2009-05-05
申请号：US10021392
申请日：2001-12-12
申请人： Brian K. Dewey , David Kruse , Shishir Pardikar , Sanjay Anand
发明人： Brian K. Dewey , David Kruse , Shishir Pardikar , Sanjay Anand
IPC分类号： G06F17/30
CPC分类号： G06F17/30067 , G06F11/1451 , G06F11/1469 , Y10S707/99953 , Y10S707/99954
摘要： A system and method that automatically and transparently enable access to prior file or folder versions for a selected file or folder. When a file or folder is selected for version location, such as via a user interface, prior versions are automatically located and time data (e.g., determined from timestamps) identifying each of the prior versions is displayed. The user can then select a prior version for restoration and thereby recover from changed file data. The present invention can be implemented using remote file servers, or with local file system volumes. Prior to displaying the versions for selection, attributes of the prior versions may be requested, whereby only versions that actually exist can be displayed, and/or only versions with possibly different data are displayed, reducing unnecessary selection for restoration.
摘要翻译：一种系统和方法，可以自动和透明地启用对所选文件或文件夹的先前文件或文件夹版本的访问。当文件或文件夹被选择用于版本位置时，诸如通过用户界面，先前版本被自动定位，并且显示标识每个先前版本的时间数据（例如，从时间戳确定）。然后，用户可以选择先前版本进行恢复，从而从改变的文件数据中恢复。本发明可以使用远程文件服务器或本地文件系统卷来实现。在显示用于选择的版本之前，可以请求先前版本的属性，由此仅显示实际存在的版本，和/或仅显示具有可能不同数据的版本，减少不必要的恢复选择。

43. 发明申请

US20090057596A1 Pendulum valve having independently and rapidly controllable theta-and z-axis motion 有权
标题翻译：摆阀具有独立快速的θ轴和z轴运动
公开(公告)号：US20090057596A1
公开(公告)日：2009-03-05
申请号：US11895897
申请日：2007-08-27
申请人： Nate Coleman , John Slaney , Sean Mallory , Per Cederstav , David Kruse , William Ballard , Robert Woods
发明人： Nate Coleman , John Slaney , Sean Mallory , Per Cederstav , David Kruse , William Ballard , Robert Woods
IPC分类号： F16K3/00
CPC分类号： F16K31/535 , F16K3/10 , F16K31/043
摘要： A Pendulum Valve having Independently and Rapidly Controllable Theta- and Z-axis Motion. The valve actuator used in the present invention provides the benefit of wide open unrestricted flow of a pendulum valve coupled with the high-resolution and wide dynamic range flow throttling of a ball or butterfly valve. The actuator mechanism will include motor drives and associated control system so that the drives are closely coupled to give highly controlled motion. The drive assembly introduces a concentric shaft arrangement that, when coupled with the highly controllable motor drives, exploits a cam-follower arrangement to make the relative rotation between the two concentric shafts result in highly controlled theta and z-axis motion. Finally, the plate to seal spacing afforded is greater than previously possible with prior valve actuator mechanisms, thereby substantially reducing flow turbulence through the valve as the valve plate eclipses the valve ports.
摘要翻译：具有独立快速控制的摆动阀和Z轴运动。本发明中使用的阀致动器提供摆动阀的广泛的无限制流动的优点，以及球或蝶阀的高分辨率和宽动态范围流量节流。致动器机构将包括马达驱动器和相关联的控制系统，使得驱动器紧密耦合以提供高度受控的运动。驱动组件引入同心轴装置，当与高度可控的电动机驱动器联接时，其利用凸轮从动装置使两个同心轴之间的相对旋转导致高度受控的θ轴和z轴运动。最后，所提供的板密封间隔大大超过先前阀门致动器机构以前的可能性，从而当阀板越过阀口时基本上减小通过阀的流动湍流。

44. 发明申请

US20070195875A1 MULTI-PAIR GIGABIT ETHERNET TRANSCEIVER HAVING DECISION FEEDBACK EQUALIZER 有权
标题翻译：具有决策反馈均衡器的多副手机以太网收发器
公开(公告)号：US20070195875A1
公开(公告)日：2007-08-23
申请号：US11688669
申请日：2007-03-20
申请人： Oscar Agazzi , John Creigh , Mehdi Hatamian , David Kruse , Arthur Abnous , Henry Samueli
发明人： Oscar Agazzi , John Creigh , Mehdi Hatamian , David Kruse , Arthur Abnous , Henry Samueli
IPC分类号： H03H7/30 , H03D1/00
CPC分类号： H04L7/0062 , G01R31/3004 , G01R31/3008 , G01R31/3016 , G01R31/31715 , G01R31/318502 , G01R31/318552 , G01R31/318594 , H04B3/23 , H04B3/235 , H04B3/32 , H04L1/0021 , H04L1/0047 , H04L1/0053 , H04L1/0054 , H04L1/0059 , H04L1/006 , H04L1/242 , H04L7/0334 , H04L25/03038 , H04L25/03057 , H04L25/03146 , H04L25/03197 , H04L25/03203 , H04L25/03235 , H04L25/03267 , H04L25/03987 , H04L25/067 , H04L25/14 , H04L25/4917 , H04L25/497 , H04L2001/0096 , H04L2025/03363 , H04L2025/03369 , H04L2025/03477 , H04L2025/0349 , H04L2025/03496 , H04L2025/03503 , H04L2025/03617 , H04L2025/03745
摘要： Various systems and methods providing high speed decoding, enhanced power reduction and clock domain partitioning for a multi-pair gigabit Ethernet transceiver are disclosed. ISI compensation is partitioned into two stages; a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter in a demodulator, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel in a Viterbi decoder. High speed decoding is accomplished by reducing the DFE depth by providing an input signal from a multiple decision feedback equalizer to the Viterbi based on a tail value and a subset of coefficient values received from a unit depth decision-feedback equalizer. Power reduction is accomplished by adaptively truncating active taps in the NEXT, FEXT and echo cancellation filters, or by disabling decoder circuitry portions, as channel response characteristics allow. A receive clock signal is generated such that it is synchronous in frequency with analog sampling clock signals and has a particular phase offset with respect to one of the sampling clock signals. This phase offset is adjusted such that system performance degradation due to coupling of switching noise from the digital sections to the analog sections is substantially minimized.
摘要翻译：公开了为多对千兆位以太网收发器提供高速解码，增强的功率降低和时钟域划分的各种系统和方法。 ISI补偿分为两个阶段; 第一级补偿由解调器中的发射机的部分响应脉冲整形滤波器的特性引起的ISI分量，第二级补偿由维特比解码器中的多对传输信道的特性引起的ISI分量。基于从单位深度判决反馈均衡器接收的尾值和系数值的子集，通过从多个判决反馈均衡器向维特比提供输入信号来减小DFE深度来实现高速解码。通过自适应地截断NEXT，FEXT和回声消除滤波器中的有源抽头，或通过禁用解码器电路部分，如通道响应特性允许，实现功率降低。生成接收时钟信号，使得其与模拟采样时钟信号在频率上同步，并且相对于采样时钟信号之一具有特定的相位偏移。调整该相位偏移，使得由于来自数字部分到模拟部分的开关噪声的耦合而导致的系统性能降低被大大减小。

45. 发明申请

US20060148592A1 Golf balls marked with biblical scripture 审中-公开
标题翻译：标有圣经经文的高尔夫球
公开(公告)号：US20060148592A1
公开(公告)日：2006-07-06
申请号：US11028034
申请日：2005-01-03
申请人： David Kruse
发明人： David Kruse
IPC分类号： A63B37/14
CPC分类号： A63B37/0004 , A63B37/0022 , A63B45/02 , G09F23/00 , G09F23/0066
摘要： A golf ball is provided that includes, in an exemplary embodiment, a surface and indicia disposed on the surface. The indicia is in the form of biblical scripture.
摘要翻译：提供一种高尔夫球，在示例性实施例中包括设置在表面上的表面和标记。标记是圣经经文的形式。

46. 发明授权

US06814096B2 Pressure controller and method 有权
标题翻译：压力控制器和方法
公开(公告)号：US06814096B2
公开(公告)日：2004-11-09
申请号：US09738194
申请日：2000-12-15
申请人： Emmanuel Vyers , William Ballard , David Kruse , Sean Mallory , Per Cederstav
发明人： Emmanuel Vyers , William Ballard , David Kruse , Sean Mallory , Per Cederstav
IPC分类号： G05D1620
CPC分类号： G05D16/202 , Y10T137/0396 , Y10T137/7761 , Y10T137/8225 , Y10T137/86614
摘要： A closed loop pressure controller system that sets, measures and controls the process pressure within a semiconductor process is shown. The system is commonly composed of a pressure sensor to collect the pressure information, a controller box that hosts the control electronics, and a valve to physically affect the conductivity of the inlet or outlet gas line and accordingly the process pressure. The present invention differs from the prior art by using closed-loop motor control of the valve, rather than the method of the prior art, where the valve position is controlled by a stepper motor actuator driven in an open loop fashion. It is demonstrated that the utility of such prior art open-loop configurations is limited by the fact that the achievable precision of the valve position is hindered by static friction in the valve system, and the non-linear character of the torque versus shaft-angle of the motor (among other error components). The method of the present invention more accurately positions the valve, and accordingly enhances the overall precision and allowable loop-gain of the pressure control system by providing the valve drive with feedback as to the actual angular position of the valve in extremely high resolution.
摘要翻译：示出了设置，测量和控制半导体工艺中的工艺压力的闭环压力控制器系统。该系统通常由用于收集压力信息的压力传感器，托管控制电子装置的控制器盒以及物理地影响入口或出口气体管线的导电性以及因此的过程压力的阀组成。本发明与现有技术不同之处在于使用阀的闭环电动机控制，而不是现有技术的方法，其中阀位由以开环方式驱动的步进电机致动器控制。现有技术证明，这种现有技术的开环结构的实用性受限于阀门位置的可实现精度受到阀门系统中的静摩擦的影响，扭矩与轴角度的非线性特性的电机（以及其他误差部件）。本发明的方法更精确地定位阀门，并且因此通过以极高的分辨率向阀驱动器提供关于阀的实际角位置的反馈来提高压力控制系统的总体精度和允许的环路增益。

47. 发明授权

US06707848B2 Demodulator for a multi-pair gigabit transceiver 有权
标题翻译：用于多对千兆位收发器的解调器
公开(公告)号：US06707848B2
公开(公告)日：2004-03-16
申请号：US09726642
申请日：2000-11-30
申请人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
发明人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
IPC分类号： H03K5159
CPC分类号： H04L7/0062 , G01R31/3004 , G01R31/3008 , G01R31/3016 , G01R31/31715 , G01R31/318502 , G01R31/318552 , G01R31/318594 , H04B3/23 , H04B3/32 , H04L1/0047 , H04L1/0054 , H04L1/006 , H04L1/242 , H04L7/0334 , H04L25/03038 , H04L25/03057 , H04L25/03146 , H04L25/03267 , H04L25/03885 , H04L25/067 , H04L25/14 , H04L25/4917 , H04L25/497 , H04L2025/03363 , H04L2025/03369 , H04L2025/03477 , H04L2025/0349 , H04L2025/03496 , H04L2025/03503 , H04L2025/03617 , H04L2025/03745
摘要： A feedforward equalizer for equalizing a sequence of signal samples received by a receiver from a remote transmitter. The feedforward equalizer has a gain and is included in the receiver which includes a timing recovery module for setting a sampling phase and, a decoder. The feedforward equalizer comprises a non-adaptive filter and a gain stage. The non-adaptive filter receives the signal samples and produces a filtered signal. The gain stage adjusts the gain of the feedforward equalizer by adjusting the amplitude of the filtered signal. The amplitude of the filtered signal is adjusted so that it fits in the operational range of the decoder. The feedforward equalizer does not affect the sampling phase setting of the timing recovery module of the receiver.
摘要翻译：前馈均衡器，用于均衡来自远程发射机的接收机接收的信号样本序列。前馈均衡器具有增益并且包括在接收机中，该接收机包括用于设置采样相位的定时恢复模块和解码器。前馈均衡器包括非自适应滤波器和增益级。非自适应滤波器接收信号样本并产生滤波信号。增益级通过调整滤波信号的幅度来调节前馈均衡器的增益。调整滤波后的信号的幅度使其适合于解码器的操作范围。前馈均衡器不影响接收机的定时恢复模块的采样相位设置。

48. 发明授权

US06253345B1 System and method for trellis decoding in a multi-pair transceiver system 有权
标题翻译：用于多对收发器系统中网格解码的系统和方法
公开(公告)号：US06253345B1
公开(公告)日：2001-06-26
申请号：US09370370
申请日：1999-08-09
申请人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
发明人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
IPC分类号： H03M1303
CPC分类号： H04L7/0062 , G01R31/3004 , G01R31/3008 , G01R31/3016 , G01R31/31715 , G01R31/318502 , G01R31/318552 , G01R31/318594 , H04B3/23 , H04B3/32 , H04L1/0054 , H04L1/0059 , H04L1/242 , H04L7/0334 , H04L25/03038 , H04L25/03057 , H04L25/03146 , H04L25/03267 , H04L25/067 , H04L25/14 , H04L25/4917 , H04L25/497 , H04L2025/03363 , H04L2025/03369 , H04L2025/03477 , H04L2025/0349 , H04L2025/03496 , H04L2025/03503 , H04L2025/03617 , H04L2025/03745
摘要： A method and a system for decoding information signals encoded in accordance with a multi-state encoding scheme and transmitted over a multi-dimensional transmission channel by computing a distance of a received word from a codeword. One-dimensional (1D) input signals are processed in a pair of symbol decoders, implemented as look-up tables, to produce a pair of 1D errors, with each representing a distance metric between the input signal and a symbol in one of two disjoint symbol-subsets. The 1D errors are combined based on the multi-state encoding scheme in order to produce a set of multi-dimensional error terms. Each of the multi-dimensional error terms corresponds to a distance between a received word and a nearest codeword.
摘要翻译：一种用于对根据多状态编码方案编码并通过计算从码字的接收字的距离而在多维传输信道上传送的信息信号的方法和系统。一维（1D）输入信号在一对符号解码器中被处理，被实现为查找表，以产生一对1D误差，其中每一个代表在两个不相交中的一个中的输入信号和符号之间的距离度量符号子集。基于多状态编码方案组合1D误差，以产生一组多维误差项。多维误差项中的每一个对应于接收到的字和最近的码字之间的距离。

49. 发明授权

US06252904B1 High-speed decoder for a multi-pair gigabit transceiver 有权
标题翻译：用于多对千兆位收发器的高速解码器
公开(公告)号：US06252904B1
公开(公告)日：2001-06-26
申请号：US09370491
申请日：1999-08-09
申请人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
发明人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
IPC分类号： H03H730
CPC分类号： H04L7/0062 , G01R31/3004 , G01R31/3008 , G01R31/3016 , G01R31/31715 , G01R31/318502 , G01R31/318552 , G01R31/318594 , H03M13/256 , H03M13/41 , H03M13/6331 , H04B3/23 , H04B3/32 , H04L1/005 , H04L1/0052 , H04L1/0054 , H04L1/0059 , H04L1/242 , H04L7/0334 , H04L25/03038 , H04L25/03057 , H04L25/03146 , H04L25/03267 , H04L25/067 , H04L25/14 , H04L25/4917 , H04L25/497 , H04L2025/03363 , H04L2025/03369 , H04L2025/03477 , H04L2025/0349 , H04L2025/03496 , H04L2025/03503 , H04L2025/03617 , H04L2025/03745
摘要： A method and a system for providing an input signal from a multiple decision feedback equalizer to a decoder based on a tail value and a subset of coefficient values received from a decision-feedback equalizer. A set of pre-computed values based on the subset of coefficient values is generated. Each of the pre-computed values is combined with the tail value to generate a tentative sample. One of the tentative samples is selected as the input signal to the decoder. In one aspect of the system, tentative samples are saturated and then stored in a set of registers before being outputted to a multiplexer which selects one of the tentative samples as the input signal to the decoder. This operation of storing the tentative samples in the registers before providing the tentative samples to the multiplexer facilitates high-speed operation by breaking up a critical path of computations into substantially balanced first and second portions, the first portion including computations in the decision-feedback equalizer and the multiple decision feedback equalizer, the second portion including computations in the decoder.
摘要翻译：一种用于基于从判决反馈均衡器接收的尾值和系数值的子集，将来自多决策反馈均衡器的输入信号提供给解码器的方法和系统。产生一组基于系数值子集的预计算值。每个预先计算的值与尾值组合以生成临时样本。选择一个暂定样本作为解码器的输入信号。在系统的一个方面，暂定样本被饱和，然后被存储在一组寄存器中，然后被输出到多路复用器，该多路复用器选择一个暂定采样作为解码器的输入信号。在将暂定样本提供给多路复用器之前将暂定样本存储在寄存器中的这种操作便于通过将计算的关键路径分解为基本上平衡的第一和第二部分进行高速操作，第一部分包括判决反馈均衡器和多个判决反馈均衡器，第二部分包括解码器中的计算。

50. 发明授权

US08320443B2 System and method for high-speed decoding and ISI compensation in a multi-pair transceiver system 有权
标题翻译：多对收发器系统中的高速解码和ISI补偿的系统和方法
公开(公告)号：US08320443B2
公开(公告)日：2012-11-27
申请号：US12768817
申请日：2010-04-28
申请人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
发明人： Oscar E. Agazzi , David Kruse , Arthur Abnous , Mehdi Hatamian
IPC分类号： H03H7/40
CPC分类号： H04L7/0062 , G01R31/3004 , G01R31/3008 , G01R31/3016 , G01R31/31715 , G01R31/318502 , G01R31/318552 , G01R31/318594 , H03M13/256 , H03M13/41 , H04B3/23 , H04B3/32 , H04L1/0054 , H04L1/0059 , H04L1/242 , H04L7/0334 , H04L25/03038 , H04L25/03057 , H04L25/03146 , H04L25/03203 , H04L25/03267 , H04L25/03324 , H04L25/067 , H04L25/14 , H04L25/4917 , H04L25/497 , H04L2025/03363 , H04L2025/03369 , H04L2025/03458 , H04L2025/03477 , H04L2025/0349 , H04L2025/03496 , H04L2025/03503 , H04L2025/03617 , H04L2025/03643 , H04L2025/03745
摘要： A method and a system for providing ISI compensation to an input signal in a bifurcated manner. ISI compensation is provided in two stages, a first stage compensates ISI components induced by characteristics of a transmitter's partial response pulse shaping filter, a second stage compensates ISI components induced by characteristics of a multi-pair transmission channel. First stage ISI compensation is performed in an inverse response filter having a characteristic feedback gain factor K, during system start-up. Second stage ISI compensation is performed by a single DFE in combination with a MDFE operating on tentative decisions output from a Viterbi decoder. As the DFE of the second stage reaches convergence, the feedback gain factor K of the first stage is ramped to zero.
摘要翻译：一种用于以分叉方式向输入信号提供ISI补偿的方法和系统。 ISI补偿分两阶段提供，第一阶段补偿由发射机的部分响应脉冲整形滤波器的特性引起的ISI分量，第二级补偿由多对传输信道的特性引起的ISI分量。在系统启动期间，在具有特性反馈增益因子K的逆响应滤波器中执行第一级ISI补偿。第二级ISI补偿由单个DFE与由维特比解码器输出的暂定决定操作的MDFE组合执行。当第二级的DFE达到收敛时，第一级的反馈增益因子K变为零。

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