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    • 42. 发明授权
    • Field effect transistor
    • 场效应晶体管
    • US08106382B2
    • 2012-01-31
    • US12305824
    • 2007-06-18
    • Tohru SaitohTakahiro Kawashima
    • Tohru SaitohTakahiro Kawashima
    • H01L29/66
    • H01L29/78696B82Y10/00H01L29/0665H01L29/0673H01L29/068H01L29/41733H01L29/66772H01L29/78621H01L29/78654
    • A source electrode 105 which is connected to a portion of at least one semiconductor nanostructure 103 among a plurality of semiconductor nanostructures, a drain electrode 106 connected to another portion of the semiconductor nanostructure 103, and a gate electrode 102 capable of controlling electrical conduction of the semiconductor nanostructure 103 are included. The semiconductor nanostructures 103 include a low concentration region 108 having a relatively low doping concentration and a pair of high concentration regions 107 having a higher doping concentration than that of the low concentration region 108 and being connected to both ends of the low concentration region 108. The doping concentration of the high concentration regions 107 is 1×1019 cm−3 or more; the length of the low concentration region 108 is shorter than a length of the gate electrode 102 along a direction from the source electrode 105 to the drain electrode 106; and the length of the gate electrode 102 is shorter than the interspace between the source electrode 105 and the drain electrode 106.
    • 连接到多个半导体纳米结构中的至少一个半导体纳米结构103的一部分的源电极105,连接到半导体纳米结构103的另一部分的漏电极106和能够控制半导体纳米结构103的导电的栅电极102 包括半导体纳米结构103。 半导体纳米结构103包括具有相对低的掺杂浓度的低浓度区域108和具有比低浓度区域108的掺杂浓度更高的掺杂浓度的一对高浓度区域107并且连接到低浓度区域108的两端。 高浓度区域107的掺杂浓度为1×1019cm-3以上; 低浓度区域108的长度比沿源极电极105至漏电极106的方向的栅电极102的长度短; 并且栅电极102的长度比源电极105和漏电极106之间的间隙短。
    • 48. 发明申请
    • Vertical field effect transistor and method for fabricating the same
    • 垂直场效应晶体管及其制造方法
    • US20060125025A1
    • 2006-06-15
    • US11344574
    • 2006-02-01
    • Takahiro KawashimaTohru SaitohTakeshi Takagi
    • Takahiro KawashimaTohru SaitohTakeshi Takagi
    • H01L29/76
    • H01L29/78696B82Y10/00H01L29/0665H01L29/0673H01L29/0676H01L29/1606H01L29/42384H01L29/7781H01L29/78642Y10S977/938
    • A vertical field effect transistor includes: an active region with a bundle of linear structures functioning as a channel region where electric carriers are transported; a lower electrode, connected to the bottom of the active region and functioning as one of source and drain regions; an upper electrode, connected to the top of the active region and functioning as the other of the source and drain regions; a gate electrode for controlling the electric conductivity of at least a portion of the bundle of linear structures included in the active region; and a gate insulating film arranged between the active region and the gate electrode to electrically isolate the gate electrode from the bundle of linear structures. The transistor further includes a dielectric portion between the upper and lower electrodes. The upper electrode is located over the lower electrode with the dielectric portion interposed and includes an overhanging portion that sticks out laterally from over the dielectric portion. The active region is located right under the overhanging portion of the upper electrode.
    • 垂直场效应晶体管包括:有源区,其具有用作传输电载体的沟道区的线性结构束; 下电极,连接到有源区的底部并用作源极和漏极区之一; 上电极,连接到有源区的顶部并用作源极和漏极区域中的另一个; 用于控制所述有源区域中包括的所述线性结构束的至少一部分的电导率的栅电极; 以及栅极绝缘膜,其布置在所述有源区和所述栅电极之间,以将所述栅电极与所述线结构的束电隔离。 晶体管还包括在上电极和下电极之间的电介质部分。 上电极位于下电极的上方,电介质部分插入,并且包括从电介质部分的上方向外伸出的突出部分。 有源区域位于上电极的伸出部分正下方。