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41. 发明申请

US20060028883A1 Information storage device, information storage method, and information storage program 失效
标题翻译：信息存储装置，信息存储方法和信息存储程序
公开(公告)号：US20060028883A1
公开(公告)日：2006-02-09
申请号：US10534752
申请日：2003-10-29
申请人： Takeshi Shimoyama
发明人： Takeshi Shimoyama
IPC分类号： G11C29/00
CPC分类号： G11C11/40607 , G06F2212/3042 , G11C7/065 , G11C7/1072 , G11C11/4091 , G11C2207/2245
摘要： Disclosed is a synchronous information storage device that uses a synchronizing clock signal to exercise operation timing control and processes operations with high efficiency to improve performance and provide low power consumption, which is characteristic of DRAMs. The information storage device includes a plurality of memory cells for storing data by accumulating an electrical charge and an amplifier for amplifying the electrical charge of the memory cells, and uses a synchronizing clock signal for input/output timing of the data. An electrical charge removal operation for moving an electrical charge from the memory cells to the amplifier or an electrical charge accumulation operation for acquiring an electrical charge from the amplifier and accumulating the electrical charge in the memory cells and an input/output operation for the amplifier in relation to the outside of the information storage device are processed while using a single clock of the synchronizing clock signal for synchronization timing.
摘要翻译：公开了一种同步信息存储装置，其使用同步时钟信号来运行定时控制并以高效率处理操作以提高性能并提供低功耗，这是DRAM的特征。信息存储装置包括用于通过累积电荷来存储数据的多个存储单元和用于放大存储单元的电荷的放大器，并且使用同步时钟信号进行数据的输入/输出定时。用于将电荷从存储器单元移动到放大器的电荷去除操作或用于从放大器获取电荷并累积存储器单元中的电荷的电荷积累操作以及放大器的输入/输出操作在使用用于同步定时的同步时钟信号的单个时钟的同时处理与信息存储装置的外部的关系。

42. 发明授权

US06965172B2 Starter for cranking internal combustion engine 有权
标题翻译：起动内燃机起动器
公开(公告)号：US06965172B2
公开(公告)日：2005-11-15
申请号：US10938575
申请日：2004-09-13
申请人： Takeshi Shimoyama , Youichi Hasegawa , Sadayoshi Kajino
发明人： Takeshi Shimoyama , Youichi Hasegawa , Sadayoshi Kajino
IPC分类号： F02N11/00 , F02N11/08 , F02N15/06 , H02K5/10 , H02K5/22 , H02K23/60
CPC分类号： H02K5/225 , F02N11/08 , F02N15/06 , F02N2250/08
摘要： A starter for cranking an internal combustion engine is mainly composed of an electric motor and a magnetic switch having a battery bolt connected to an on-board battery and a motor bolt connected to the electric motor. When the magnetic switch is closed, electric power is supplied to the electric motor to thereby generate a rotational torque for cranking the engine. One end of a motor terminal is electrically connected to the motor bolt, and the other end is led into a motor casing through a rubber insulator supported on the motor casing. The motor terminal includes one or more curved portions having resiliency, and they are positioned between the rubber insulator and the motor bolt. Water penetration into the motor casing is prevented by the rubber insulator, and the vibration of the motor terminal is alleviated by resiliency of the curved portions.
摘要翻译：用于起动内燃机的起动器主要由电动机和具有连接到车载电池的电池螺栓和连接到电动机的电动机螺栓的磁性开关组成。当磁开关闭合时，向电动机供电，从而产生用于起动发动机的转矩。电动机端子的一端电连接到电动机螺栓，另一端通过支撑在电动机壳体上的橡胶绝缘体引入电动机壳体。电动机端子包括具有弹性的一个或多个弯曲部分，并且它们位于橡胶绝缘体和电动机螺栓之间。通过橡胶绝缘子防止水分渗入电动机壳体，并且通过弯曲部分的弹性减轻电动机端子的振动。

43. 发明授权

US06594189B2 Information storage apparatus, information storage method, recording medium and program 失效
公开(公告)号：US06594189B2
公开(公告)日：2003-07-15
申请号：US10151853
申请日：2002-05-22
申请人： Takeshi Shimoyama
发明人： Takeshi Shimoyama
IPC分类号： G11C700
CPC分类号： G11C11/406
摘要： A self refresh timing generator detects the presence/absence of a read signal output by a control signal generator employed in a DRAM controller to a memory bank and, if no read signal is detected in a predetermined period of time, a refresh signal is generated and output to a refresh suppression register, which has been set in on or off status by the control signal generator in advance. If the refresh suppression register has been set in on status, the refresh signal is blocked and thus not output to the memory bank in the DRAM. If the refresh suppression register has been set in set in off status, on the other hand, the refresh suppression register passes on the refresh signal to the predetermined page of the memory bank associated with the refresh suppression register. As a result, the power consumption of the DRAM is reduced and a high speed read operation can be implemented with a high degree of probability.

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