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41. 发明授权

US06869865B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06869865B2
公开(公告)日：2005-03-22
申请号：US10608154
申请日：2003-06-30
申请人： Shigeto Maegawa , Takashi Ipposhi , Kazunobu Ohta , Yasuo Inoue , Masanobu Kohara , Takashi Eura , Natsuro Tsubouchi
发明人： Shigeto Maegawa , Takashi Ipposhi , Kazunobu Ohta , Yasuo Inoue , Masanobu Kohara , Takashi Eura , Natsuro Tsubouchi
IPC分类号： H01L21/28 , H01L21/20 , H01L21/265 , H01L21/268 , H01L21/285 , H01L21/336 , H01L29/78 , H01L21/425
CPC分类号： H01L21/268 , H01L21/2652 , H01L21/28518 , H01L29/6659
摘要： Activation of impurities is achieved without involving creation of a crystal defect or deformation by using phonon absorption. A laser beam (42) having a wavelength in a range of 16 to 17 μm is irradiated onto silicon, to cause phonon absorption. Before an energy supplied from the laser beam (42) diffuses around a portion which is irradiated with the laser beam (42), solid phase epitaxy in the portion finishes. Accordingly, crystallization occurs only in the portion which is irradiated with the laser beam (42), and does not occur in a portion which is not irradiated with the laser beam (42). Hence, heat is not excessively absorbed. Also, local phase change such as melting and solidification is not caused.
摘要翻译：实现杂质的活化而不涉及通过使用声子吸收产生晶体缺陷或变形。将具有16至17μm波长范围的激光束（42）照射到硅上以引起声子吸收。在从激光束（42）供给的能量在激光束（42）的一部分附近扩散之前，该部分的固相外延结束。因此，仅在被激光束（42）照射的部分中发生结晶，不会发生在不被激光束（42）照射的部分。因此，热量不会被过度吸收。此外，不会引起局部相变，如熔化和凝固。

42. 发明授权

US06818536B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06818536B2
公开(公告)日：2004-11-16
申请号：US10423960
申请日：2003-04-28
申请人： Takashi Ipposhi , Toshiaki Iwamatsu , Yasuo Yamaguchi
发明人： Takashi Ipposhi , Toshiaki Iwamatsu , Yasuo Yamaguchi
IPC分类号： H01L2100
CPC分类号： H01L29/66772 , H01L21/76224 , H01L21/76264 , H01L21/76281 , H01L29/0638 , H01L29/78609
摘要： A sidewall oxide layer and a sidewall insulation layer are formed to cover the edge portion of an SOI layer. A channel stopper region is formed in the vicinity of the edge portion of the SOI layer. A protruded insulation layer is formed on the channel stopper region. A gate electrode extends from a region over the SOI layer to the protruded insulation layer and the sidewall insulation layer. In this way, reduction in threshold voltage Vth of a parasitic MOS transistor at the edge portion of the SOI layer can be suppressed.
摘要翻译：形成侧壁氧化物层和侧壁绝缘层以覆盖SOI层的边缘部分。在SOI层的边缘部附近形成沟道阻挡区域。在沟道阻挡区域上形成突出的绝缘层。栅电极从SOI层上的区域延伸到突出的绝缘层和侧壁绝缘层。以这种方式，可以抑制在SOI层的边缘部分处的寄生MOS晶体管的阈值电压Vth的降低。

43. 发明授权

US06703953B2 Semiconductor device, method of manufacturing semiconductor device and communication method 失效
标题翻译：半导体器件，半导体器件的制造方法和通信方法
公开(公告)号：US06703953B2
公开(公告)日：2004-03-09
申请号：US09457721
申请日：1999-12-10
申请人： Shigenobu Maeda , Takashi Ipposhi , Hirotada Kuriyama , Hiroki Honda
发明人： Shigenobu Maeda , Takashi Ipposhi , Hirotada Kuriyama , Hiroki Honda
IPC分类号： H03M166
CPC分类号： H01L23/57 , H01L2223/5444 , H01L2924/0002 , H04M1/67 , H04W12/12 , H01L2924/00
摘要： A channel region (2), a source region (3) and a drain region (4) are formed on a polycrystalline semiconductor layer (1). The characteristic of a polycrystalline TFT (101) is dispersed by the amount of crystal grain boundaries (6) contained in the channel region (2). A drain current is reduced as the amount of the crystal grain boundaries (6) contained in the channel region (2) is increased. In order to utilize a code obtained by encoding the electric characteristic of the TFT (101) for identification of a semiconductor chip, a system or the like, the TFT (101) is mounted on the semiconductor chip, the system or the like along with an encoder circuit. Thus, a barrier against illegal use of a user terminal is improved at a low cost.
摘要翻译：在多晶半导体层（1）上形成沟道区（2），源区（3）和漏区（4）。多晶TFT（101）的特性通过包含在沟道区域（2）中的晶粒边界（6）的量而分散。随着沟道区域（2）中包含的晶界（6）的量增加，漏电流减小。为了利用通过对用于识别半导体芯片，系统等的TFT（101）的电特性进行编码而获得的代码，TFT（101）安装在半导体芯片，系统等上以及一个编码器电路。因此，以低成本提高了防止非法使用用户终端的屏障。

44. 发明授权

US06586802B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06586802B2
公开(公告)日：2003-07-01
申请号：US09346726
申请日：1999-07-02
申请人： Shoichi Miyamoto , Toshiaki Iwamatsu , Takashi Ipposhi
发明人： Shoichi Miyamoto , Toshiaki Iwamatsu , Takashi Ipposhi
IPC分类号： H01L2701
CPC分类号： H01L27/1203 , H01L29/42384
摘要： A semiconductor device comprising an SOI substrate fabricated by forming a silicon layer 3 on an insulating layer 2, a plurality of active regions 3 horizontally arranged in the silicon layer 3, and element isolating parts 5 having a trench-like shape which is made of an insulator 5 embedded between the active regions 3 in the silicon layer 3, wherein the insulating layer 2 has spaces 6 positioned in the vicinity of interfaces between the active regions and the element isolating parts 5, whereby it becomes possible to reduce fixed charges or holes existing on a side of the insulating layer in interfaces between the silicon layer and the insulating layer, which fixed charges or holes are generated in a process of oxidation for forming the insulating layer on a bottom surface of the silicon layer.
摘要翻译：一种半导体器件，包括通过在绝缘层2上形成硅层3，在硅层3中水平布置的多个有源区3和由沟槽状构成的沟槽状形状的元件隔离部5制造的SOI衬底绝缘体5嵌入在硅层3中的有源区域3之间，其中绝缘层2具有位于有源区域和元件隔离部分5之间的界面附近的空间6，由此可以减少固定电荷或存在的孔在硅层和绝缘层之间的界面中的绝缘层的一侧上，在硅层的底表面上形成绝缘层的氧化过程中产生固定的电荷或空穴。

45. 发明授权

US06335267B1 Semiconductor substrate and method of fabricating semiconductor device 失效
标题翻译：半导体衬底及制造半导体器件的方法
公开(公告)号：US06335267B1
公开(公告)日：2002-01-01
申请号：US09667498
申请日：2000-09-22
申请人： Toshiaki Iwamatsu , Yasuo Yamaguchi , Takashi Ipposhi , Shigenobu Maeda , Yuichi Hirano
发明人： Toshiaki Iwamatsu , Yasuo Yamaguchi , Takashi Ipposhi , Shigenobu Maeda , Yuichi Hirano
IPC分类号： H01L2120
CPC分类号： H01L27/1203 , H01L21/84
摘要： A semiconductor substrate and a method of fabricating a semiconductor device are provided. An oxide film (13) is formed by oxidizing an edge section and a lower major surface of an SOI substrate (10). This oxidizing step is performed in a manner similar to LOCOS (Local Oxide of Silicon) oxidation by using an oxide film (11) exposed on the edge section and lower major surface of the SOI substrate (10) as an underlying oxide film. Then, the thickness of the oxide film (13) is greater than that of the oxide film (11) on the edge section and lower major surface of the SOI substrate (10). The semiconductor substrate prevents particles of dust from being produced at the edge thereof.
摘要翻译：提供半导体衬底和制造半导体器件的方法。氧化膜（13）通过氧化SOI衬底（10）的边缘部分和下主表面而形成。通过使用暴露在SOI衬底（10）的边缘部分和下部主表面上的氧化膜（11）作为下面的氧化膜，以类似于LOCOS（硅的局部氧化物）氧化的方式进行该氧化步骤。然后，氧化膜（13）的厚度大于SOI衬底（10）的边缘部分和下主表面上的氧化物膜（11）的厚度。半导体衬底防止在其边缘处产生灰尘颗粒。

46. 发明授权

US06323527B1 Semiconductor device and method for manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06323527B1
公开(公告)日：2001-11-27
申请号：US09055300
申请日：1998-04-06
申请人： Toshiaki Iwamatsu , Takashi Ipposhi
发明人： Toshiaki Iwamatsu , Takashi Ipposhi
IPC分类号： H01L2358
CPC分类号： H01L29/402 , H01L21/28167 , H01L21/28202 , H01L21/28238 , H01L29/513 , H01L29/518 , H01L29/66772 , H01L29/78609
摘要： At an edge portion of an FS gate electrode (10) beneath a side wall oxide film (106), an FS gate oxide film (101) is thicker. Relative to a surface of a silicon substrate (SB) beneath the FS gate oxide film (101), other surface of the silicon substrate (SB) is retracted. Thus, a MOS transistor with field-shield isolation structure and a method for manufacturing the same can be provided with higher reliability of the gate oxide film.
摘要翻译：在侧壁氧化膜（106）下面的FS栅极（10）的边缘部分，FS栅极氧化膜（101）较厚。相对于FS栅极氧化膜（101）下面的硅衬底（SB）的表面，硅衬底（SB）的另一表面缩回。因此，具有场屏蔽隔离结构的MOS晶体管及其制造方法可以提供更高的栅极氧化膜的可靠性。

47. 发明授权

US06271065B1 Method directed to the manufacture of an SOI device 有权
标题翻译：涉及制造SOI器件的方法
公开(公告)号：US06271065B1
公开(公告)日：2001-08-07
申请号：US09494352
申请日：2000-01-31
申请人： Shoichi Miyamoto , Takashi Ipposhi
发明人： Shoichi Miyamoto , Takashi Ipposhi
IPC分类号： H01L2100
CPC分类号： H01L29/66772 , H01L21/84 , H01L27/1203 , H01L29/78636
摘要： On an insulating film a mesa-isolation silicon layer is formed, in which a channel region and source/drain regions ar included. A gate insulating film and a conducting layer as a part of a gate electrode are stacked on the mesa-isolation silicon layer. A sidewall of an insulating material is formed on side surfaces of the mesa-isolation silicon layer, gate insulating film, and conducting layer at an end portion of the channel region of the mesa-isolation silicon layer, and a gate electrode is formed on the conducting layer.
摘要翻译：在绝缘膜上形成台状隔离硅层，其中包括沟道区和源极/漏极区。栅极绝缘膜和作为栅电极的一部分的导电层堆叠在台面隔离硅层上。在台面隔离硅层的沟道区的端部的台面隔离硅层，栅极绝缘膜和导电层的侧面形成绝缘材料的侧壁，在导电层。

48. 发明授权

US06171889B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06171889B2
公开(公告)日：2001-01-09
申请号：US09179897
申请日：1998-10-28
申请人： Toshiaki Iwamatsu , Takashi Ipposhi
发明人： Toshiaki Iwamatsu , Takashi Ipposhi
IPC分类号： H01L21336
CPC分类号： H01L29/66772 , H01L21/26506 , H01L21/84 , H01L27/1203
摘要： This invention provides a semiconductor device with a SOI structure and a method of manufacturing the same, preventing deterioration in and making improvement in device characteristics. Nitrogen ion implantation into NMOS and PMOS regions (NR, PR) with resists (22b) and (22c) as masks, respectively, introduces nitrogen ions into channel doped layers (31). The subsequent thermal treatment provides a structure with the channel doped layers (31) containing nitrogen having a prescribed concentration distribution in the depth direction.
摘要翻译：本发明提供具有SOI结构的半导体器件及其制造方法，防止器件特性的劣化和改善。分别以抗蚀剂（22b）和（22c）作为掩模的氮离子注入到NMOS和PMOS区域（NR，PR）中，将氮离子引入沟道掺杂层（31）。随后的热处理提供了在深度方向上含有具有规定浓度分布的氮的沟道掺杂层（31）的结构。

49. 发明授权

US6150696A Semiconductor substrate and method of fabricating semiconductor device 失效
公开(公告)号：US6150696A
公开(公告)日：2000-11-21
申请号：US55903
申请日：1998-04-07
申请人： Toshiaki Iwamatsu , Yasuo Yamaguchi , Takashi Ipposhi , Shigenobu Maeda , Yuichi Hirano
发明人： Toshiaki Iwamatsu , Yasuo Yamaguchi , Takashi Ipposhi , Shigenobu Maeda , Yuichi Hirano
IPC分类号： H01L21/02 , H01L21/84 , H01L27/12 , H01L27/01
CPC分类号： H01L27/1203 , H01L21/84
摘要： A semiconductor substrate and a method of fabricating a semiconductor device are provided. An oxide film (13) is formed by oxidizing an edge section and a lower major surface of an SOI substrate (10). This oxidizing step is performed in a manner similar to LOCOS (Local Oxide of Silicon) oxidation by using an oxide film (11) exposed on the edge section and lower major surface of the SOI substrate (10) as an underlying oxide film. Then, the thickness of the oxide film (13) is greater than that of the oxide film (11) on the edge section and lower major surface of the SOI substrate (10). The semiconductor substrate prevents particles of dust from being produced at the edge thereof.

50. 发明授权

US5910672A Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5910672A
公开(公告)日：1999-06-08
申请号：US888898
申请日：1997-07-07
申请人： Toshiaki Iwamatsu , Takashi Ipposhi
发明人： Toshiaki Iwamatsu , Takashi Ipposhi
IPC分类号： H01L21/265 , H01L21/336 , H01L21/84 , H01L27/12 , H01L29/786 , H01L21/76
CPC分类号： H01L29/66772 , H01L21/26506 , H01L21/84 , H01L27/1203
摘要： This invention provides a semiconductor device with a SOI structure and a method of manufacturing the same, preventing deterioration in and making improvement in device characteristics. Nitrogen ion implantation into NMOS and PMOS regions (NR, PR) with resists (22b) and (22c) as masks, respectively, introduces nitrogen ions into channel doped layers (31). The subsequent thermal treatment provides a structure with the channel doped layers (31) containing nitrogen having a prescribed concentration distribution in the depth direction.
摘要翻译：本发明提供具有SOI结构的半导体器件及其制造方法，防止器件特性的劣化和改善。分别以抗蚀剂（22b）和（22c）作为掩模的氮离子注入到NMOS和PMOS区域（NR，PR）中，将氮离子引入沟道掺杂层（31）。随后的热处理提供了在深度方向上含有具有规定浓度分布的氮的沟道掺杂层（31）的结构。

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