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    • 43. 发明授权
    • Semiconductor integrated circuit device with fuse elements and control method therefore
    • 因此,具有熔丝元件的半导体集成电路器件和控制方法
    • US08120981B2
    • 2012-02-21
    • US12555031
    • 2009-09-08
    • Tomohiro Kobayashi
    • Tomohiro Kobayashi
    • G11C17/18
    • G11C17/16G11C17/165G11C17/18
    • A semiconductor integrated circuit device includes a first block, a second block, and a control section. The first block includes a first fuse, a first switching configured to write data to the first fuse, a first holding portion capable of holding a first instruction, and a first instruction portion configured to turn on the first switching when a second instruction is given thereto with the first instruction. The second block includes a second fuse, a second switching configured to write data to the second fuse, a second holding portion capable of holding the first instruction, and a second instruction portion configured to turn on the second switching when the second instruction is given thereto with the first instruction. The control section issues the second instruction at a point in time when the first instruction is held in the first and second holding portions.
    • 半导体集成电路器件包括第一块,第二块和控制部。 第一块包括第一熔丝,被配置为向第一熔丝写入数据的第一转换器,能够保持第一指令的第一保持部分和被配置为当给予第二指令时接通第一切换的第一指令部分 用第一个指令。 第二块包括第二熔丝,第二开关被配置为向第二熔丝写入数据,第二保持部分能够保持第一指令;以及第二指令部分,配置成当给予第二指令时接通第二切换 用第一个指令。 控制部分在第一指令被保持在第一和第二保持部分的时间点发出第二指令。
    • 47. 发明申请
    • SEMICONDUCTOR MEMORY DEVICE
    • 半导体存储器件
    • US20100097866A1
    • 2010-04-22
    • US12555029
    • 2009-09-08
    • Tomohiro Kobayashi
    • Tomohiro Kobayashi
    • G11C7/06G11C7/02G11C7/00
    • G11C7/14G11C7/065G11C17/12
    • A semiconductor memory device includes a memory cell array provided with a main memory cell array including a plurality of memory cells, and a dummy column including a plurality of dummy memory cells, a dummy readout current control section configured to control a current value of a dummy readout current of the dummy memory cell in such a manner that the current value becomes between the current values of the readout currents in first and second states of the memory cell, and a sense section provided with a sense amplifier configured to receive a readout current in one of the first and second states, or dummy readout current as an input, comparing these currents with each other, and outputting the currents.
    • 一种半导体存储器件,包括设置有包括多个存储单元的主存储单元阵列的存储单元阵列和包括多个虚拟存储单元的虚拟列,虚设读出电流控制部,被配置为控制虚拟的当前值 该虚拟存储单元的读出电流使得当前值在存储单元的第一和第二状态中的读出电流的当前值之间变化,以及设置有读出放大器的感测部分,该读出放大器被配置为接收读出电流 第一状态和第二状态之一,或虚拟读出电流作为输入,将这些电流彼此进行比较,并输出电流。
    • 50. 发明申请
    • Positive resist composition and patterning process
    • 正抗蚀剂组成和图案化工艺
    • US20080153030A1
    • 2008-06-26
    • US12000284
    • 2007-12-11
    • Tomohiro KobayashiYouichi OhsawaRyosuke Taniguchi
    • Tomohiro KobayashiYouichi OhsawaRyosuke Taniguchi
    • G03F7/039G03F7/26
    • G03F7/0397G03F7/0045
    • There is disclosed a resist composition that remarkably improves the resolution of photolithography using a high energy beam such as ArF excimer laser light as a light source, and exhibits excellent resistance to surface roughness and side lobe under use of a halftone phase shift mask; and a patterning process using the resist composition. The positive resist composition at least comprises (A) a resin component comprising a repeating unit represented by the following general formula (1); (B) a photoacid generator generating sulfonic acid represented by the following general formula (2) upon exposure to a high energy beam; and (C) an onium salt where a cation is sulfonium represented by the following general formula (3), or ammonium represented by the following general formula (4); and an anion is represented by any one of the following general formulae (5) to (7).
    • 公开了一种抗蚀剂组合物,其使用诸如ArF准分子激光的高能束作为光源显着提高了光刻的分辨率,并且在使用半色调相移掩模的情况下表现出优异的抗表面粗糙度和侧凸的性能; 以及使用抗蚀剂组合物的图案化工艺。 正型抗蚀剂组合物至少包含(A)包含由以下通式(1)表示的重复单元的树脂组分; (B)在暴露于高能量束时产生由以下通式(2)表示的磺酸的光酸产生剂; 和(C)鎓盐,其中阳离子是由以下通式(3)表示的锍或由以下通式(4)表示的铵; 并且阴离子由以下通式(5)至(7)中的任一个表示。