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41. 发明授权

US06633392B1 X-ray reflectance system to determine suitability of SiON ARC layer 有权
标题翻译： X射线反射系统，以确定SiON ARC层的适用性
公开(公告)号：US06633392B1
公开(公告)日：2003-10-14
申请号：US10052142
申请日：2002-01-17
申请人： Bhanwar Singh , Arvind Halliyal , Ramkumar Subramanian
发明人： Bhanwar Singh , Arvind Halliyal , Ramkumar Subramanian
IPC分类号： G01B1128
CPC分类号： H01L21/67253 , G01N23/20 , H01L22/26
摘要： One aspect of the present invention relates to a method to facilitate formation of an oxide portion of an anti-reflective layer on a substrate. The method involves the steps of forming an oxidized portion of an anti-reflective coating over an anti-reflective layer disposed on the substrate; reflecting a beam of x-ray radiation at the oxidized portion; generating a measurement signal based on the reflected portion of the light beam; and determining a thickness of the oxidized portion based on the measurement signal while the oxidized portion is being formed at the substrate.
摘要翻译：本发明的一个方面涉及一种便于在基底上形成抗反射层的氧化物部分的方法。该方法包括以下步骤：在设置在基底上的抗反射层上形成抗反射涂层的氧化部分; 在氧化部分反射一束x射线辐射; 基于所述光束的反射部分生成测量信号; 并且在氧化部分形成在基板上的同时基于测量信号确定氧化部分的厚度。

42. 发明授权

US06629786B1 Active control of developer time and temperature 失效
标题翻译：主动控制显影时间和温度
公开(公告)号：US06629786B1
公开(公告)日：2003-10-07
申请号：US09845232
申请日：2001-04-30
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Ramkumar Subramanian
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G03D500
CPC分类号： G03D5/00
摘要： A system for regulating the time and temperature of a development process is provided. The system includes one or more light sources, each light source directing light to one or more gratings being developed on a wafer. Light reflected from the gratings is collected by a measuring system, which processes the collected light. Light passing through the gratings may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the progress of development of the respective portions of the wafer. The measuring system provides progress of development related data to a processor that determines the progress of development of the respective portions of the wafer. The system also includes a plurality of heating devices, each heating device corresponds to a respective portion of the developer and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the wafer.
摘要翻译：提供了一种用于调节开发过程的时间和温度的系统。该系统包括一个或多个光源，每个光源将光引导到在晶片上显影的一个或多个光栅。从光栅反射的光被测量系统收集，该系统处理收集的光。通过光栅的光可以类似地由处理所收集的光的测量系统收集。所收集的光表示晶片的各个部分的显影进展。该测量系统提供开发相关数据的进展到处理器，该处理器确定晶片的相应部分的开发进度。该系统还包括多个加热装置，每个加热装置对应于显影剂的相应部分并提供其加热。处理器选择性地控制加热装置，以调节晶片各部分的温度。

43. 发明授权

US06613500B1 Reducing resist residue defects in open area on patterned wafer using trim mask 有权
标题翻译：使用修剪掩模减少图案化晶片上的开放区域中的抗蚀剂残留缺陷
公开(公告)号：US06613500B1
公开(公告)日：2003-09-02
申请号：US09824079
申请日：2001-04-02
申请人： Khoi A. Phan , Bhanwar Singh , Ramkumar Subramanian , Michael K. Templeton , Jeff Erhardt
发明人： Khoi A. Phan , Bhanwar Singh , Ramkumar Subramanian , Michael K. Templeton , Jeff Erhardt
IPC分类号： G03F700
CPC分类号： G03F7/70425 , G03F7/2022 , G03F7/203 , G03F7/70466
摘要： One aspect of the present invention relates to a method for reducing resist residue defects on a wafer structure. The method involves providing a semiconductor structure having a photoresist, the photoresist comprising open areas and circuit areas thereon; irradiating the open areas and circuit areas through a first photomask with a first energy dose to effect an image-wise pattern in the photoresist; irradiating the open areas of the photoresist through a second photomask with a second energy dose; and developing the photoresist.
摘要翻译：本发明的一个方面涉及减少晶片结构上的抗蚀剂残留缺陷的方法。该方法包括提供具有光致抗蚀剂的半导体结构，光致抗蚀剂包括开放区域和其上的电路区域; 通过具有第一能量剂量的第一光掩模照射开放区域和电路区域以在光致抗蚀剂中实现成像图案; 通过具有第二能量剂量的第二光掩模照射光致抗蚀剂的开放区域; 并显影光致抗蚀剂。

44. 发明授权

US06594024B1 Monitor CMP process using scatterometry 有权
标题翻译：使用散点法监测CMP过程
公开(公告)号：US06594024B1
公开(公告)日：2003-07-15
申请号：US09886863
申请日：2001-06-21
申请人： Bhanwar Singh , Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Carmen Morales
发明人： Bhanwar Singh , Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Carmen Morales
IPC分类号： G01B1128
CPC分类号： B24B37/005 , B24B49/12 , G01N21/47 , G01N21/9501 , H01L21/30625
摘要： One aspect of the present invention relates to an in-line system for monitoring and optimizing an on-going CMP process in order to determine a CMP process endpoint comprising a wafer, wherein the wafer is subjected to the CMP process; a CMP process monitoring system for generating a signature related to wafer dimensions for the wafer subjected to the CMP process; and a signature library to which the generated signature is compared to determine a state of the wafer. Another aspect relates to an in-line method for monitoring and optimizing an on-going CMP process involving providing a wafer, wherein the wafer is subjected to a CMP process; generating a signature associated with the wafer; comparing the generated signature to a signature library to determine a state of the wafer; and using a closed-loop feedback control system for modifying the on-going CMP process according to the determined state of the wafer.
摘要翻译：本发明的一个方面涉及用于监测和优化正在进行的CMP工艺的在线系统，以便确定包括晶片的CMP工艺端点，其中晶片经历CMP工艺; 用于生成与经历CMP处理的晶片的晶片尺寸相关的签名的CMP过程监控系统; 以及生成的签名被比较的签名库，以确定晶片的状态。另一方面涉及用于监测和优化涉及提供晶片的正在进行的CMP工艺的在线方法，其中所述晶片经受CMP工艺; 产生与晶片相关联的签名; 将生成的签名与签名库进行比较以确定晶片的状态; 以及使用闭环反馈控制系统来根据所确定的晶片状态来修正正在进行的CMP工艺。

45. 发明授权

US06448097B1 Measure fluorescence from chemical released during trim etch 失效
标题翻译：测量在修剪蚀刻期间释放的化学物质的荧光
公开(公告)号：US06448097B1
公开(公告)日：2002-09-10
申请号：US09911236
申请日：2001-07-23
申请人： Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
发明人： Bhanwar Singh , Bharath Rangarajan , Ramkumar Subramanian
IPC分类号： H01L3126
CPC分类号： G01N21/64 , G01N2021/6417 , H01L22/26
摘要： A system and method is provided for determining and controlling development of a semiconductor substrate employing fluorescence spectroscopy. One aspect of the invention relates to a system and method employing fluorescence spectroscopy to facilitate control of a chemical trim etch process during development of a photoresist material layer. The chemical trim etch process comprises applying a trim compound or material to a patterned photoresist. The trim compound or material is diffusable into the sides and top of the patterned resist. The diffused regions of the resist are soluble in a developer, which facilitates creating smaller features in the patterned photoresist. The fluorescence spectroscopy system can be employed to measure isolated and dense gratings or CDs and use the evolution of the CD to determine when to terminate the chemical trim process.
摘要翻译：提供了一种使用荧光光谱法确定和控制半导体衬底的开发的系统和方法。本发明的一个方面涉及使用荧光光谱学来促进在光致抗蚀剂材料层的显影期间控制化学修剪蚀刻工艺的系统和方法。化学修剪蚀刻工艺包括将修剪化合物或材料施加到图案化的光致抗蚀剂上。修整组合物或材料可扩散到图案化抗蚀剂的侧面和顶部。抗蚀剂的扩散区域可溶于显影剂，这有助于在图案化的光致抗蚀剂中产生更小的特征。荧光光谱系统可用于测量孤立和致密的光栅或CD，并使用CD的演变来确定何时终止化学修饰过程。

46. 发明授权

US06444381B1 Electron beam flood exposure technique to reduce the carbon contamination 有权
标题翻译：电子束泛滥技术减少碳污染
公开(公告)号：US06444381B1
公开(公告)日：2002-09-03
申请号：US09729295
申请日：2000-12-04
申请人： Bhanwar Singh , Ramkumar Subramanian , Michael K. Templeton , Bharath Rangarajan , Khoi A. Phan , Bryan K. Choo , Sanjay K. Yedur
发明人： Bhanwar Singh , Ramkumar Subramanian , Michael K. Templeton , Bharath Rangarajan , Khoi A. Phan , Bryan K. Choo , Sanjay K. Yedur
IPC分类号： G03F900
CPC分类号： G03F1/74 , Y10S430/143
摘要： One aspect of the present invention relates to a method for reducing carbon contamination on a mask involving placing a mask plate having carbon-containing contaminants thereon in a processing chamber; simultaneously contacting the mask plate with oxygen and exposing the mask plate with a flood exposure of electron beams wherein the carbon-containing contaminants are converted to a by-product; and removing the by-product from the processing chamber.
摘要翻译：本发明的一个方面涉及一种用于减少掩模上的碳污染的方法，其涉及将具有含碳污染物的掩模板放置在处理室中; 同时使掩模板与氧气接触，并将电子束的暴露暴露于掩模板，其中含碳污染物转化为副产物; 并从处理室中除去副产物。

47. 发明授权

US06335152B1 Use of RTA furnace for photoresist baking 有权
标题翻译：使用RTA炉进行光刻胶烘烤
公开(公告)号：US06335152B1
公开(公告)日：2002-01-01
申请号：US09564408
申请日：2000-05-01
申请人： Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
发明人： Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
IPC分类号： G03F738
CPC分类号： G03F7/38
摘要： In one embodiment, the present invention relates to a method of processing an irradiated photoresist involving the steps of placing a substrate having the irradiated photoresist thereon at a first temperature in a rapid thermal anneal furnace; heating the substrate having the irradiated photoresist thereon to a second temperature within about 0.1 seconds to about 10 seconds; cooling the substrate having the irradiated photoresist thereon to a third temperature in a rapid thermal annealing furnace within about 0.1 seconds to about 10 seconds; and developing the irradiated photoresist, wherein the second temperature is higher than the first temperature and the third temperature. In another embodiment, the present invention relates to a system of processing a photoresist, containing a source of actinic radiation and a mask for selectively irradiating a photoresist; a rapid thermal annealing furnace for rapidly heating and rapidly cooling a selectively irradiated photoresist, wherein the rapid heating and rapid cooling are independently conducted within about 0.1 seconds to about 10 seconds; and a developer for developing a rapid thermal annealing furnace heated and selectively irradiated photoresist into a patterned photoresist.
摘要翻译：在一个实施方案中，本发明涉及一种处理被照射的光致抗蚀剂的方法，包括以下步骤：在快速热退火炉中将具有照射光致抗蚀剂的基底在第一温度下放置; 将其上具有照射的光致抗蚀剂的基板加热至约0.1秒至约10秒的第二温度; 将快速热退火炉中具有照射光致抗蚀剂的基板冷却至约0.1秒至约10秒的第三温度; 并且显影所述被照射的光致抗蚀剂，其中所述第二温度高于所述第一温度和所述第三温度。在另一个实施方案中，本发明涉及一种处理含有光化辐射源的光致抗蚀剂的系统和用于选择性地照射光致抗蚀剂的掩模; 快速热退火炉，用于快速加热和快速冷却选择性照射的光致抗蚀剂，其中快速加热和快速冷却在约0.1秒至约10秒内独立进行; 以及用于将快速热退火炉加热并选择性地照射光致抗蚀剂的显影剂加工成图案化的光致抗蚀剂。

48. 发明授权

US06322009B1 Common nozzle for resist development 有权
标题翻译：普通喷嘴用于抗蚀剂开发
公开(公告)号：US06322009B1
公开(公告)日：2001-11-27
申请号：US09429992
申请日：1999-10-29
申请人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
发明人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh
IPC分类号： B05B900
CPC分类号： H01L21/6708 , H01L21/67051
摘要： A combination nozzle for applying a developer material and a washing solution material at different time intervals to a photoresist material layer disposed on a wafer is provided. The combination nozzle includes a number of developer nozzle tips connected to a developer supply line and a number of washing solution nozzle tips connected to a washing solution supply line. The developer supply line and the washing solution supply line ensure that the developer material and the washing solution material are always substantially isolated from one another. Furthermore, the developer nozzle tips and the washing solution nozzle tips are arranged so that developer material and washing solution material do not come into contact with one another. The volume of the material and the volume flow of the material can be controlled by electronically controlled valves.
摘要翻译：提供了用于将显影剂材料和洗涤液材料以不同的时间间隔施加到设置在晶片上的光致抗蚀剂材料层的组合喷嘴。组合喷嘴包括连接到显影剂供应管线的多个显影剂喷嘴尖端和连接到洗涤溶液供应管线的多个洗涤溶液喷嘴尖端。显影剂供应管线和洗涤溶液供应管线确保显影剂材料和洗涤液材料总是基本上彼此隔离。此外，显影剂喷嘴尖端和洗涤溶液喷嘴尖端被布置成使得显影剂材料和洗涤液材料彼此不接触。材料的体积和材料的体积流量可以通过电子控制阀来控制。

49. 发明授权

US6060380A Antireflective siliconoxynitride hardmask layer used during etching processes in integrated circuit fabrication 有权
标题翻译：在集成电路制造中的蚀刻工艺期间使用的抗反射硅氧氮化物硬掩模层
公开(公告)号：US6060380A
公开(公告)日：2000-05-09
申请号：US187391
申请日：1998-11-06
申请人： Ramkumar Subramanian , Bhanwar Singh , Simon Chan , Fei Wang
发明人： Ramkumar Subramanian , Bhanwar Singh , Simon Chan , Fei Wang
IPC分类号： H01L21/311 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/76811 , H01L21/31144 , H01L21/76813
摘要： A method for etching openings in an integrated circuit uses siliconoxynitride as a hardmask layer. Because of the relatively low reflectivity of siliconoxynitride, when a photoresist layer is deposited on the siliconoxynitride hardmask layer and is exposed to light, the photoresist layer is patterned more conformingly to a desired pattern. The present invention may be used to particular advantage for etching contiguous trench lines and via holes in a dual damascene etch process for small dimension integrated circuits.
摘要翻译：用于蚀刻集成电路中的开口的方法使用硅氧氮化物作为硬掩模层。由于硅氧氮化物的相对低的反射率，当光致抗蚀剂层沉积在硅氧氮化物硬掩模层上并暴露于光时，光致抗蚀剂层被图案更符合期望的图案。本发明可以用于在用于小尺寸集成电路的双镶嵌蚀刻工艺中蚀刻连续沟槽线和通孔的特别优点。

50. 发明授权

US08547521B1 Systems and methods that control liquid temperature in immersion lithography to maintain temperature gradient to reduce turbulence 有权
标题翻译：控制浸没式光刻液温度以保持温度梯度以减少湍流的系统和方法
公开(公告)号：US08547521B1
公开(公告)日：2013-10-01
申请号：US11000653
申请日：2004-12-01
申请人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
发明人： Srikanteswara Dakshina-Murthy , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G03B27/42 , G03B27/52 , G03B27/54
CPC分类号： G03F7/70891 , G03F7/70341
摘要： The subject invention provides systems and methods that monitor and/or control turbulence of an immersion medium. The systems and methods relate to computer controlled techniques that reduce effects of immersion medium flow due to a liquid temperature gradient. According to an aspect of the subject invention, a number of temperature measurements of the immersion medium are obtained, and the temperature measurements are utilized to generate a gradient map of the immersion medium. By way of illustration, the temperature measurements can be made via wireless temperature sensors. The gradient map can be utilized to understand the stability of the immersion medium. According to an aspect of the subject invention, instability identified with the gradient map can be mitigated.
摘要翻译：本发明提供了监测和/或控制浸没介质的湍流的系统和方法。这些系统和方法涉及由于液体温度梯度而降低浸没介质流动影响的计算机控制技术。根据本发明的一个方面，获得浸渍介质的多个温度测量值，并利用温度测量值来产生浸渍介质的梯度图。作为说明，可以通过无线温度传感器进行温度测量。梯度图可用于了解浸没介质的稳定性。根据本发明的一个方面，可以减轻用梯度图识别的不稳定性。

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