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41. 发明申请

US20130054179A1 Determining An Effective Stress Level On A Processor 有权
标题翻译：确定处理器上的有效应力水平
公开(公告)号：US20130054179A1
公开(公告)日：2013-02-28
申请号：US13221152
申请日：2011-08-30
申请人： Dorit Shapira , Efraim Rotem , Douglas R. Moran
发明人： Dorit Shapira , Efraim Rotem , Douglas R. Moran
IPC分类号： G06F19/00
CPC分类号： G06F11/3058 , G06F11/3024
摘要： In one embodiment, a processor includes multiple cores and a power control unit (PCU) coupled to the cores. The PCU has a stress detector to receive a voltage and a temperature at which the processor is operating and can calculate an effective reliability stress, maintain the effective reliability stress over multiple boot cycles of a computing system such as personal computer, server computer, tablet computer, smart phone or any other computing platform, and control one or more operating parameters of the processor based on the effective reliability stress. Other embodiments are described and claimed.
摘要翻译：在一个实施例中，处理器包括多个核和耦合到核的功率控制单元（PCU）。 PCU具有应力检测器，用于接收处理器运行的电压和温度，并且可以计算有效的可靠性压力，保持计算系统（例如个人计算机，服务器计算机，平板计算机）的多个引导周期的有效可靠性压力，智能电话或任何其他计算平台，并且基于有效的可靠性压力来控制处理器的一个或多个操作参数。描述和要求保护其他实施例。

42. 发明授权

US07966511B2 Power management coordination in multi-core processors 有权
标题翻译：多核处理器中的电源管理协调
公开(公告)号：US07966511B2
公开(公告)日：2011-06-21
申请号：US10899674
申请日：2004-07-27
申请人： Alon Naveh , Efraim Rotem , Eliezer Weissmann
发明人： Alon Naveh , Efraim Rotem , Eliezer Weissmann
IPC分类号： G06F1/00 , G06F9/00
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： Systems and methods of managing power provide for issuing a first operating requirement from a first processor core and issuing a second operating requirement from a second processor core. In one embodiment, the operating requirements can reflect either a power policy or a performance policy, depending upon the factor that is currently most important to software. Hardware coordination logic is used to coordinate a shared resource setting with the operating requirements. The hardware coordination logic is also able to coordinate the shared resource setting with independent resource settings of the first and second processor cores based on the operating requirements.
摘要翻译：管理电力的系统和方法提供从第一处理器核发出第一操作要求并从第二处理器核发出第二操作要求。在一个实施例中，操作要求可以反映功率策略或性能策略，这取决于当前对软件最重要的因素。硬件协调逻辑用于根据操作要求协调共享资源设置。硬件协调逻辑还能够基于操作要求来协调共享资源设置与第一和第二处理器核心的独立资源设置。

43. 发明申请

US20100115304A1 POWER MANAGEMENT FOR MULTIPLE PROCESSOR CORES 有权
标题翻译：多处理器电源的电源管理
公开(公告)号：US20100115304A1
公开(公告)日：2010-05-06
申请号：US12263421
申请日：2008-10-31
申请人： Lev Finkelstein , Efraim Rotem , Aviad Cohen , Ronny Ronen , Doron Rajwan
发明人： Lev Finkelstein , Efraim Rotem , Aviad Cohen , Ronny Ronen , Doron Rajwan
IPC分类号： G06F1/32 , G06F1/00
CPC分类号： G06F1/26 , G06F1/206 , G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/16 , Y02D10/172
摘要： Methods and apparatus relating to power management for multiple processor cores are described. In one embodiment, one or more techniques may be utilized locally (e.g., on a per core basis) to manage power consumption in a processor. In another embodiment, power may be distributed among different power planes of a processor based on energy-based considerations. Other embodiments are also disclosed and claimed.
摘要翻译：描述与多个处理器核心的电源管理相关的方法和装置。在一个实施例中，本地可以利用一个或多个技术（例如，基于每个核心）来管理处理器中的功率消耗。在另一个实施例中，功率可以基于能量考虑而分布在处理器的不同功率层之间。还公开并要求保护其他实施例。

44. 发明申请

US20100102949A1 OVERHEAT DETECTION IN THERMALLY CONTROLLED DEVICES 有权
标题翻译：过热检测在热控制器件中
公开(公告)号：US20100102949A1
公开(公告)日：2010-04-29
申请号：US12650831
申请日：2009-12-31
申请人： Efraim Rotem
发明人： Efraim Rotem
IPC分类号： G08B29/00
CPC分类号： G06F1/206
摘要： Systems and methods of overheat detection provide for generating a control signal on a die containing a processor based on an internal temperature of the processor and a control temperature threshold. It can be determined whether to generate a warning temperature event on the die based on a behavior of the control signal. In one embodiment, the warning temperature event provides for initiation of an automated data saving process, which reduces the abruptness of conventional warning temperature shutdowns. Other embodiments provide the user the option of saving his or her work before a shutdown temperature threshold is reached.
摘要翻译：过热检测的系统和方法提供了在基于处理器的内部温度和控制温度阈值的情况下在包含处理器的管芯上生成控制信号。可以基于控制信号的行为来确定是否在管芯上产生警告温度事件。在一个实施例中，警告温度事件提供启动自动数据保存处理，这减少了常规警告温度关闭的突然性。其他实施例为用户提供在达到关闭温度阈值之前保存他或她的工作的选项。

45. 发明授权

US07529955B2 Dynamic bus parking 有权
标题翻译：动态巴士停车场
公开(公告)号：US07529955B2
公开(公告)日：2009-05-05
申请号：US11172110
申请日：2005-06-30
申请人： Tsvika Kurts , Efraim Rotem
发明人： Tsvika Kurts , Efraim Rotem
IPC分类号： G06F1/00 , G06F1/32 , G06F13/36
CPC分类号： G06F1/3203 , G06F1/3215
摘要： Systems and methods of power management provide for issuing a power saving message from a processor toward a controller and using the controller to conduct a power saving activity in response to the power saving message. In one embodiment, the power saving message is issued by de-asserting a bus arbitration signal and the power saving activity can include disabling one or more input buffers of the controller.
摘要翻译：电源管理的系统和方法提供从处理器向控制器发出省电消息，并且使用控制器响应于省电消息进行省电活动。在一个实施例中，通过取消断言总线仲裁信号来发出省电消息，并且省电活动可以包括禁用控制器的一个或多个输入缓冲器。

46. 发明申请

US20080155281A1 Method and apparatus to estimate energy consumed by central processing unit core 失效
标题翻译：估计中央处理单元核心能耗的方法和装置
公开(公告)号：US20080155281A1
公开(公告)日：2008-06-26
申请号：US11641952
申请日：2006-12-20
申请人： Guillermo Savransky , Efraim Rotem , Ittai Anati , Oren Lamdan
发明人： Guillermo Savransky , Efraim Rotem , Ittai Anati , Oren Lamdan
IPC分类号： G06F1/26
CPC分类号： G06F1/206 , G06F1/26 , G06F1/3203 , G06F1/329 , G06F9/30181 , G06F9/3836 , Y02D10/16 , Y02D10/24
摘要： Briefly, a processor and a method of estimating an active energy consumption of two or more cores of a processor based on dispatching micro operations to one or more execution units of the processor.
摘要翻译：简而言之，是一种处理器和一种通过基于向处理器的一个或多个执行单元调度微操作来估计处理器的两个或多个核心的有功能量消耗的方法。

47. 发明申请

US20060149974A1 Device and method for on-die temperature measurement 有权
标题翻译：用于管芯温度测量的装置和方法
公开(公告)号：US20060149974A1
公开(公告)日：2006-07-06
申请号：US11025140
申请日：2004-12-30
申请人： Efraim Rotem , Jim Hermerding , Eric Distefano , Barnes Cooper
发明人： Efraim Rotem , Jim Hermerding , Eric Distefano , Barnes Cooper
IPC分类号： G06F1/26
CPC分类号： G06F1/206 , G06F11/3024 , G06F11/3058
摘要： A system for measuring and managing thermal operations of a processor core on a semiconductor die using a sensor positioned in a hotspot of the processor core. A measured temperature reading is determined based upon a temperature sensed by the sensor. Interrupt signals and a software readable register indicating temperature information provide feedback about the thermal environment to the processor. Based upon the measured temperature reading, the interrupt signals direct the processor to modify operation.
摘要翻译：一种用于使用位于处理器核心的热点中的传感器来测量和管理半导体管芯上的处理器核心的热操作的系统。测量的温度读数是根据传感器感测到的温度来确定的。中断信号和指示温度信息的软件可读寄存器提供关于处理器的热环境的反馈。基于测量的温度读数，中断信号指示处理器修改操作。

48. 发明申请

US20060047986A1 Method and apparatus for controlling power management state transitions 有权
标题翻译：用于控制电源管理状态转换的方法和装置
公开(公告)号：US20060047986A1
公开(公告)日：2006-03-02
申请号：US10931565
申请日：2004-08-31
申请人： Tsvika Kurts , Alon Naveh , Efraim Rotem , Brad Dendinger , Jorge Rodriguez , Ernest Knoll , David Poisner
发明人： Tsvika Kurts , Alon Naveh , Efraim Rotem , Brad Dendinger , Jorge Rodriguez , Ernest Knoll , David Poisner
IPC分类号： G06F1/26
CPC分类号： G06F1/324 , G06F1/3203 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： An integrated circuit device, such as a processor initiates a transition to a first power management state. The device then receives a request to exit the first power management state and, in response exits the first power management state at the highest of a reference operating voltage, such as a minimum operating voltage, and a current voltage. For one aspect, an analog to digital converter may be used to determine the current voltage level. Further, for one aspect the first power management state may be a deeper sleep (C4) state, and the processor may quickly exit to a C2 state in response to a bus event such as a bus snoop.
摘要翻译：诸如处理器的集成电路器件启动向第一电源管理状态的转变。然后，设备接收到退出第一电源管理状态的请求，并且响应于退出基准工作电压（例如最小工作电压）和当前电压的最高处的第一电源管理状态。一方面，可以使用模数转换器来确定当前的电压电平。此外，对于一个方面，第一功率管理状态可以是更深的睡眠（C4）状态，并且处理器可以响应于总线事件（例如总线监听）而快速退出到C2状态。

49. 发明申请

US20190196573A1 System, Apparatus And Method For Processor-External Override Of Hardware Performance State Control Of A Processor 审中-公开
公开(公告)号：US20190196573A1
公开(公告)日：2019-06-27
申请号：US15849995
申请日：2017-12-21
申请人： Nikhil Gupta , Israel Hirsh , Esfir Natanzon , Nir Rosenzweig , Efraim Rotem , Guy M. Therien , Ankush Varma , Eliezer Weissmann
发明人： Nikhil Gupta , Israel Hirsh , Esfir Natanzon , Nir Rosenzweig , Efraim Rotem , Guy M. Therien , Ankush Varma , Eliezer Weissmann
IPC分类号： G06F1/32 , G06F1/28
CPC分类号： G06F1/3293 , G06F1/28
摘要： In one embodiment, a processor includes: one or more cores to execute instructions; a first request register to store hardware performance state control information for a first core of the one or more cores obtained from an operating system; a second request register to store hardware performance state control override information, the hardware performance state control override information to be received from a management controller coupled to the processor; and a power controller coupled to the one or more cores to control a performance state of the first core based at least in part on the hardware performance state override information when at least one override indicator of the second request register is set. Other embodiments are described and claimed.

50. 发明申请

US20180039322A1 Providing An Interface For Demotion Control Information In A Processor 审中-公开
公开(公告)号：US20180039322A1
公开(公告)日：2018-02-08
申请号：US15227040
申请日：2016-08-03
申请人： Eliezer Weissmann , Nir Rosenzweig , Efraim Rotem , Yoav Ben-Raphael , Alon Naveh
发明人： Eliezer Weissmann , Nir Rosenzweig , Efraim Rotem , Yoav Ben-Raphael , Alon Naveh
IPC分类号： G06F1/32
CPC分类号： G06F1/3287 , G06F1/3206 , G06F1/3296 , Y02D10/171 , Y02D10/172 , Y02D50/20
摘要： In one embodiment, a processor includes: a plurality of cores; a power controller including a logic to autonomously demote a first request for at least one core of the plurality of cores to enter a first low power state, to cause the at least one core to enter a second low power state, the first low power state a deeper low power state than the second low power state; and an interface to receive an input from a system software, the input including at least one demotion control parameter, where the logic is to autonomously demote the first request based at least in part on the at least one demotion control parameter. Other embodiments are described and claimed.

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