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    • 41. 发明申请
    • Method of manufacturing honeycomb structure
    • 制造蜂窝结构的方法
    • US20060289501A1
    • 2006-12-28
    • US11436034
    • 2006-05-18
    • Taishi MichiwakiYuji ItoYukihisa Wada
    • Taishi MichiwakiYuji ItoYukihisa Wada
    • H05B6/80
    • B24D3/08B24B9/06B24B19/22
    • There is disclosed a honeycomb structure manufacturing method which is capable of efficiently and inexpensively manufacturing a honeycomb structure for preferable use in a filter for trapping particulates in an exhaust gas or the like by use of a long-life grinding member whose satisfactory grinding performance is retained for a long time. The method includes the step of: working an outer periphery of a coarsely shaped honeycomb structure 20 made of a porous ceramic by use of a grinding member 10 to obtain a honeycomb structure 30 having a predetermined shape, wherein diamond abrasive grains of the grinding member 10 have a grain size of 40 to 150 mesh (JIS B 4130 standard) and a concentration degree of 80 or more, and the surfaces of the diamond abrasive grains are coated with at least one selected from the group consisting of Ti, Ni, and Cr.
    • 公开了一种能够有效且廉价地制造蜂窝结构体的蜂窝结构体制造方法,该蜂窝结构体优选用于通过使用保持令人满意的研磨性能的长寿命研磨部件来捕集废气等中的微粒的过滤器 需很长时间。 该方法包括以下步骤:通过使用研磨部件10对由多孔陶瓷制成的粗形蜂窝结构体20的外周进行加工,得到具有规定形状的蜂窝结构体30,其中研磨部件10的金刚石磨粒 具有40至150目(JIS B 4130标准)的粒度和80以上的浓度,并且金刚石磨粒的表面涂覆有选自Ti,Ni和Cr中的至少一种 。
    • 43. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US06830979B2
    • 2004-12-14
    • US10152334
    • 2002-05-22
    • Yukihisa Wada
    • Yukihisa Wada
    • H10L21336
    • H01L21/823468H01L21/31111H01L21/31608H01L21/31625H01L21/3185H01L21/76224H01L28/84H01L28/91H01L29/6653
    • There is provided a method for fabricating a semiconductor device involving the formation of two or more oxide films having different etching properties. A multilayer-film sidewall including a first oxide film such as an NSG film, a TEOS film, or a HTO film and a second oxide film such as a BPSG film or a PSG film is formed over the side surfaces of a gate electrode. After the multilayer-film sidewall is used as an implantation mask for forming the source and drain of a MIS transistor, wet etching is performed by using an aqueous solution mixture containing a hydrofluoric acid and an inorganic acid (a hydrochloric acid, a sulfuric acid, or the like) in selectively removing the second oxide film. This increases the etching selectivity between the individual oxide films and allows the removal of only the upper-layer second oxide film.
    • 提供了一种用于制造半导体器件的方法,该半导体器件涉及形成具有不同蚀刻性能的两个或更多个氧化物膜。 在栅电极的侧面上形成包括诸如NSG膜,TEOS膜或HTO膜的第一氧化物膜和诸如BPSG膜或PSG膜的第二氧化物膜的多层膜侧壁。 在将多层膜侧壁用作用于形成MIS晶体管的源极和漏极的注入掩模之后,通过使用含有氢氟酸和无机酸(盐酸,硫酸, 等)选择性地除去第二氧化物膜。 这增加了各个氧化物膜之间的蚀刻选择性,并允许仅去除上层第二氧化物膜。