专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US08405143B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08405143B2
公开(公告)日：2013-03-26
申请号：US13031910
申请日：2011-02-22
申请人： Chun-Hsien Lin , Chao-Ching Hsieh
发明人： Chun-Hsien Lin , Chao-Ching Hsieh
IPC分类号： H01L29/792
CPC分类号： H01L29/7833 , H01L21/28088 , H01L29/4966 , H01L29/513 , H01L29/66545 , H01L29/7843
摘要： A semiconductor device including a substrate, a gate structure, a spacer and source/drain regions is provided. The gate structure is on the substrate, wherein the gate structure includes, from bottom to top, a high-k layer, a work function metal layer, a wetting layer and a metal layer. The spacer is on a sidewall of the gate structure. The source/drain regions are in the substrate beside the gate structure.
摘要翻译：提供了包括衬底，栅极结构，间隔物和源极/漏极区域的半导体器件。栅极结构在衬底上，其中栅极结构从底部到顶部包括高k层，功函数金属层，润湿层和金属层。间隔物位于栅极结构的侧壁上。源极/漏极区域位于栅极结构旁边的衬底中。

42. 发明授权

US08239056B2 Advanced process control for new tapeout product 有权
标题翻译：新的流片产品的高级过程控制
公开(公告)号：US08239056B2
公开(公告)日：2012-08-07
申请号：US12616681
申请日：2009-11-11
申请人： Chih-Wei Hsu , Yu-Jen Cheng , Wen-Pin Liu , Shun-Ping Wang , Shin-Rung Lu , Jo Fei Wang , Jong-I Mou , Andy Tsen , Chun-Hsien Lin
发明人： Chih-Wei Hsu , Yu-Jen Cheng , Wen-Pin Liu , Shun-Ping Wang , Shin-Rung Lu , Jo Fei Wang , Jong-I Mou , Andy Tsen , Chun-Hsien Lin
IPC分类号： G06F19/00
CPC分类号： H01L21/67253 , G05B19/41865 , H01L21/67276 , Y02P90/20
摘要： The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe.
摘要翻译：本发明提供一种半导体制造方法。该方法包括提供产品的产品数据，产品数据包括敏感产品参数; 根据敏感产品参数搜索现有产品，从现有产品中识别相关产品; 使用相关产品的相应数据确定产品的处理模型参数的初始值; 将处理模型参数的初始值分配给与制造过程相关联的处理模型; 此后，使用该处理模型调整处理配方; 以及使用所述处理配方对所述半导体晶片进行制造处理。

43. 发明申请

US20120146101A1 MULTI-GATE TRANSISTOR DEVICES AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：多栅极晶体管器件及其制造方法
公开(公告)号：US20120146101A1
公开(公告)日：2012-06-14
申请号：US12965933
申请日：2010-12-13
申请人： Chun-Hsien Lin
发明人： Chun-Hsien Lin
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L21/823821 , H01L21/823807 , H01L21/845 , H01L27/1108 , H01L27/1211
摘要： A method for manufacturing multi-gate transistor devices includes providing a semiconductor substrate having a first patterned hard mask for defining at least a first fin formed thereon, forming the first fin having a first crystal plane orientation on the semiconductor substrate, forming a second patterned hard mask for defining at least a second fin on the semiconductor substrate, forming the second fin having a second crystal plane orientation that is different from the first crystal plane orientation on the semiconductor substrate, forming a gate dielectric layer and a gate layer covering a portion of the first fin and a portion of the second fin on the semiconductor substrate, and forming a first source/drain in the first fin and a second source/drain in the second fin, respectively.
摘要翻译：一种用于制造多栅极晶体管器件的方法包括提供具有第一图案化硬掩模的半导体衬底，用于限定形成在其上的至少第一鳍片，在半导体衬底上形成具有第一晶面取向的第一鳍片，形成第二图案化硬掩模，用于在所述半导体衬底上限定至少第二鳍片，形成所述第二鳍片具有与所述半导体衬底上的所述第一晶面取向不同的第二晶面取向，形成栅介电层和覆盖所述半导体衬底的一部分的栅极层所述第一鳍片和所述第二鳍片的一部分在所述半导体衬底上，并且分别在所述第一鳍片中形成第一源极/漏极和在所述第二鳍片中形成第二源极/漏极。

44. 发明授权

US08146918B2 Paper sorting apparatus and electronic device with paper sorting apparatus 有权
标题翻译：纸分类设备和带有纸分类设备的电子设备
公开(公告)号：US08146918B2
公开(公告)日：2012-04-03
申请号：US12687027
申请日：2010-01-13
申请人： Chih-Kun Shih , Chen-Lu Fan , Chun-Hsien Lin
发明人： Chih-Kun Shih , Chen-Lu Fan , Chun-Hsien Lin
IPC分类号： B65H29/00
CPC分类号： B41J13/106 , B41J13/0036 , B41J13/009
摘要： A paper sorting apparatus for an electronic device includes a chassis with a control module disposed therein, a paper transporting module accommodated in the chassis, and a plurality of paper trays attached to the chassis. The paper transporting module has a first end, that is pivotable, and a second end, that is attached to the control module. The control module is capable of rotating the second end about the first end and coupling the second end with one of the paper trays.
摘要翻译：一种用于电子设备的纸张分拣装置，包括其中设置有控制模块的底盘，容纳在底盘中的纸张传送模块以及附接到底盘的多个纸盘。纸张传送模块具有可枢转的第一端和连接到控制模块的第二端。控制模块能够围绕第一端旋转第二端并将第二端与其中一个纸盘联接。

45. 发明授权

US08082055B2 Method for a bin ratio forecast at new tape out stage 有权
标题翻译：新磁带出站时的比例预测方法
公开(公告)号：US08082055B2
公开(公告)日：2011-12-20
申请号：US12499345
申请日：2009-07-08
申请人： Chun-Hsien Lin , Andy Tsen , Jui-Long Chen , Sunny Wu , Jong-I Mou , Chia-Hung Huang
发明人： Chun-Hsien Lin , Andy Tsen , Jui-Long Chen , Sunny Wu , Jong-I Mou , Chia-Hung Huang
IPC分类号： G06F19/00
CPC分类号： G06Q10/06 , G06Q30/0202
摘要： A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.
摘要翻译：公开了一种用于在集成电路器件制造工艺的早期阶段提供容量比预测的方法。该方法包括从一个或多个处理的晶片批次收集历史数据; 从一个或多个偏斜晶片批量收集测量数据; 从收集的历史数据和收集的测量数据生成估计的基线分布; 基于一个或多个指定参数和所生成的估计基线分布产生估计的性能分布; 通过对所生成的估计性能分布应用仓定义和产量退化因子估计来确定仓比预测; 根据仓比预测确定一个或多个生产目标; 以及基于所述一个或多个确定的生产目标来处理一个或多个晶圆。

46. 发明授权

US08076735B2 Semiconductor device with trench of various widths 有权
标题翻译：具有各种宽度沟槽的半导体器件
公开(公告)号：US08076735B2
公开(公告)日：2011-12-13
申请号：US12572498
申请日：2009-10-02
申请人： Chun-Hsien Lin
发明人： Chun-Hsien Lin
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119 , H01L27/108
CPC分类号： H01L29/7843 , H01L21/28088 , H01L21/28114 , H01L21/823807 , H01L21/82385 , H01L21/823864 , H01L29/42376 , H01L29/4966 , H01L29/66545 , H01L29/7833
摘要： A semiconductor device and a method for fabricating the same are described. A polysilicon layer is formed on a substrate. The polysilicon layer is doped with an N-type dopant. A portion of the polysilicon layer is then removed to form a plurality of dummy patterns. Each dummy pattern has a top, a bottom, and a neck arranged between the top and the bottom, where the width of the neck is narrower than that of the top. A dielectric layer is formed on the substrate to cover the substrate disposed between adjacent dummy patterns, and the top of each dummy pattern is exposed. Thereafter, the dummy patterns are removed to form a plurality of trenches in the dielectric layer. A plurality of gate structures is formed in the trenches, respectively.
摘要翻译：对半导体装置及其制造方法进行说明。在基板上形成多晶硅层。多晶硅层掺杂有N型掺杂剂。然后去除多晶硅层的一部分以形成多个虚拟图案。每个虚拟图案具有布置在顶部和底部之间的顶部，底部和颈部，其中颈部的宽度比顶部的宽度窄。在基板上形成电介质层以覆盖设置在相邻虚设图案之间的基板，并且暴露每个虚设图案的顶部。此后，去除虚拟图案以在电介质层中形成多个沟槽。在沟槽中分别形成多个栅极结构。

47. 发明授权

US08074981B2 Paper holding device and printer with paper holding device 失效
标题翻译：纸张保持装置和带有纸张保持装置的打印机
公开(公告)号：US08074981B2
公开(公告)日：2011-12-13
申请号：US12791035
申请日：2010-06-01
申请人： Chih-Kun Shih , Chun-Hsien Lin , Chen-Lu Fan
发明人： Chih-Kun Shih , Chun-Hsien Lin , Chen-Lu Fan
IPC分类号： B65H1/00
CPC分类号： B41J13/106 , Y10T74/18808
摘要： A printer includes a main body and a paper holding device. The main body is capable of printing and outputting paper. The paper holding device is secured to the main body and includes a paper tray, a connecting mechanism, and a sliding mechanism. The paper tray is configured for receiving the outputted paper. A driving gear member is located on the paper tray. The connecting mechanism is located on the paper tray and connected to the driving gear member. The sliding mechanism is located on the paper tray and connected to the connecting mechanism. The driving gear member controls the sliding mechanism by the connecting mechanism to shape a space to fit the size of the outputted paper.
摘要翻译：打印机包括主体和纸张保持装置。主体能够打印和输出纸张。纸张保持装置固定在主体上，并且包括纸盘，连接机构和滑动机构。纸盒配置为接收输出的纸张。驱动齿轮构件位于纸盘上。连接机构位于纸盘上并连接到驱动齿轮构件。滑动机构位于纸盘上并连接到连接机构。驱动齿轮构件通过连接机构来控制滑动机构，以形成适合输出纸张尺寸的空间。

48. 发明申请

US20110140207A1 METAL GATE STRUCTURE AND METHOD OF FORMING THE SAME 有权
标题翻译：金属门结构及其形成方法
公开(公告)号：US20110140207A1
公开(公告)日：2011-06-16
申请号：US12634689
申请日：2009-12-10
申请人： Chin-Fu Lin , Nien-Ting Ho , Chun-Hsien Lin , Chih-Hao Yu , Cheng-Hsien Chou
发明人： Chin-Fu Lin , Nien-Ting Ho , Chun-Hsien Lin , Chih-Hao Yu , Cheng-Hsien Chou
IPC分类号： H01L29/49 , H01L21/28
CPC分类号： H01L29/66545 , H01L21/28088 , H01L21/823842 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6659 , H01L29/7833
摘要： The metal gate structure of the present invention can include a TiN complex, and the N/Ti proportion of the TiN complex is decreased from bottom to top. In one embodiment, the TiN complex can include a single TiN layer, which has an N/Ti proportion gradually decreasing from bottom to top. In another embodiment, the TiN complex can include a plurality of TiN layers stacking together. In such a case, the lowest TiN layer has a higher N/Ti proportion than the adjusted TiN layer.
摘要翻译：本发明的金属栅极结构可以包括TiN络合物，TiN络合物的N / Ti比例从下到上减小。在一个实施方案中，TiN络合物可以包括单个TiN层，其具有从底部到顶部逐渐减小的N / Ti比例。在另一个实施方案中，TiN复合物可以包括堆叠在一起的多个TiN层。在这种情况下，最低的TiN层具有比调整后的TiN层更高的N / Ti比例。

49. 发明申请

US20110095495A1 RACK WITH WHEELS 有权
标题翻译：带轮的架子
公开(公告)号：US20110095495A1
公开(公告)日：2011-04-28
申请号：US12702522
申请日：2010-02-09
申请人： Chen-Lu Fan , Chih-Kun Shih , Chun-Hsien Lin
发明人： Chen-Lu Fan , Chih-Kun Shih , Chun-Hsien Lin
IPC分类号： B62B11/00
CPC分类号： B60B33/04 , B60B33/0007 , B60B33/0018 , B60B33/0044 , B60B33/0049 , B60B33/0063 , Y10T16/193 , Y10T16/1943
摘要： A rack includes a chassis, and a plurality of wheel assemblies secured to the chassis. Each wheel assembly includes a bracket, a wheel, and a handle. The bracket is rotatable relative to the chassis between a first position and a second position. Each wheel is capable of rotating about an axis. A distance between the axis and the chassis when each bracket is in the first position is less than a distance between the axis and the chassis when the bracket is in the second position. The handle is secured to the bracket and configured to rotate the corresponding bracket, and extends inside the chassis.
摘要翻译：机架包括底盘以及固定到底盘的多个轮组件。每个轮组件包括支架，轮和手柄。托架可以在第一位置和第二位置之间相对于底盘旋转。每个车轮都能绕轴旋转。当支架处于第一位置时，轴和底盘之间的距离小于当支架处于第二位置时轴和底盘之间的距离。手柄固定在支架上，并配置为旋转相应的支架，并在机箱内延伸。

50. 发明申请

US20080233662A1 Advanced Process Control for Semiconductor Processing 有权
标题翻译：先进的半导体处理过程控制
公开(公告)号：US20080233662A1
公开(公告)日：2008-09-25
申请号：US11689050
申请日：2007-03-21
申请人： Hsueh Chi Shen , Chun-Hsien Lin
发明人： Hsueh Chi Shen , Chun-Hsien Lin
IPC分类号： H01L21/66 , G06F19/00
CPC分类号： G05B15/02 , G05B2219/37576
摘要： An advanced process control (APC) method for semiconductor fabrication is provided. A first substrate and a second substrate are provided. The first substrate and the second substrate include a dielectric layer. A first etch process parameter for the first substrate is determined. A trench is etched in the dielectric layer of the first substrate using the first etch process parameter. At least one aspect of the etched trench of the first substrate is measured. A second etch process parameter for the second substrate is determined using the measured aspect of the etched trench of the first substrate. A planarization process parameter for the first substrate is determined also using the measured aspect of the etched trench of the first substrate.
摘要翻译：提供了一种用于半导体制造的先进的工艺控制（APC）方法。提供第一基板和第二基板。第一基板和第二基板包括电介质层。确定第一衬底的第一蚀刻工艺参数。使用第一蚀刻工艺参数在第一衬底的介电层中蚀刻沟槽。测量第一衬底的蚀刻沟槽的至少一个方面。使用第一衬底的蚀刻沟槽的测量方面来确定用于第二衬底的第二蚀刻工艺参数。还使用第一衬底的蚀刻沟槽的测量方面来确定第一衬底的平坦化处理参数。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式