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41. 发明申请

US20050014311A1 Multichip semiconductor device, chip therefor and method of formation thereof 有权
标题翻译：多芯片半导体器件，芯片及其形成方法
公开(公告)号：US20050014311A1
公开(公告)日：2005-01-20
申请号：US10902391
申请日：2004-07-30
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L21/768 , H01L23/48 , H01L23/64 , H01L25/065 , H01L25/10 , H01L21/44 , H01L21/4763 , H01L21/48 , H01L29/40
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译：公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。具有连接插头的芯片通过该连接插头与另一个芯片电连接。

42. 发明授权

US06566632B1 Hot plate and semiconductor device manufacturing method using the same 有权
标题翻译：热板和半导体器件的制造方法采用这种方法
公开(公告)号：US06566632B1
公开(公告)日：2003-05-20
申请号：US09503723
申请日：2000-02-15
申请人： Tomio Katata , Nobuo Hayasaka , Katsuya Okumura
发明人： Tomio Katata , Nobuo Hayasaka , Katsuya Okumura
IPC分类号： H05B368
CPC分类号： H01L21/67248 , H01L21/67103 , H05B3/68
摘要： An electrostatic chuck type of hot plate is disclosed which permits the temperature of a semiconductor substrate to be measured with good repeatability. In addition to an electrostatic chuck electrode and a heating electrode as provided in conventional hot plates, the inventive hot plate is further provided with two or more temperature measuring probes.
摘要翻译：公开了一种静电吸盘式热板，其允许以良好的重复性测量半导体衬底的温度。除了常规热板中提供的静电吸盘电极和加热电极之外，本发明的热板还设置有两个或更多个温度测量探针。

43. 发明授权

US06376894B1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US06376894B1
公开(公告)日：2002-04-23
申请号：US09525107
申请日：2000-03-14
申请人： Hiroshi Ikegami , Keiichi Sasaki , Nobuo Hayasaka
发明人： Hiroshi Ikegami , Keiichi Sasaki , Nobuo Hayasaka
IPC分类号： H01L2900
CPC分类号： H01L23/5258 , H01L2924/0002 , H01L2924/00
摘要： There is provided a semiconductor device in which redundancy fuses formed in an upper layer wiring region can be cut without damaging an underlying Si substrate or adjacent regions. The semiconductor device comprises a lower layer wiring formed within an interlayer insulating film on the Si substrate, and an upper layer metal wiring made of Al, Cu or the like, formed above the lower layer wiring and connected thereto through a via metal, wherein the redundancy fuses are formed in the same wiring layer as the upper layer metal wiring. For cutting a fuse by irradiating with a laser having a wavelength in a range of 1,000 to 1,100 nm and a beam diameter D (&mgr;m), the fuse may be designed to have a film thickness T (&mgr;m) and a width W (&mgr;m) which satisfy T≦(−0.15 (D+2&sgr;)+0.46) exp (2W), where &sgr; (&mgr;m) is an alignment accuracy of the center of the laser beam to the center of the fuse, with the result that the fuse formed in the same wiring layer as the upper layer metal wiring can be cut without damaging the Si substrate, an adjacent fuse and the upper layer metal wiring.
摘要翻译：提供了一种半导体器件，其中可以切割形成在上层布线区域中的冗余熔丝而不损坏下面的Si衬底或相邻区域。半导体器件包括形成在Si衬底上的层间绝缘膜内的下层布线和由Al，Cu等制成的上层金属布线，其形成在下层布线的上方并通过通孔金属连接，冗余熔丝形成在与上层金属布线相同的布线层中。为了通过用波长在1000至1100nm的波长和光束直径D（母体）的激光照射来切割熔丝，可以将熔丝设计成具有膜厚T（mum）和宽度W（mum）其满足T <=（ - 0.15（D + 2sigma）+0.46）exp（2W），其中σ（mum）是激光束的中心对熔丝的中心的对准精度，结果是熔丝形成在与上层金属布线相同的布线层中，不会损坏Si基板，相邻的熔丝和上层金属布线。

44. 发明授权

US06333215B1 Method for manufacturing a semiconductor device 失效
标题翻译：半导体器件的制造方法
公开(公告)号：US06333215B1
公开(公告)日：2001-12-25
申请号：US09098470
申请日：1998-06-17
申请人： Tetsuo Matsuda , Nobuo Hayasaka
发明人： Tetsuo Matsuda , Nobuo Hayasaka
IPC分类号： H01L2100
CPC分类号： H01L21/02131 , H01L21/02118 , H01L21/02126 , H01L21/02211 , H01L21/02274 , H01L21/02282 , H01L21/02304 , H01L21/31612 , Y10S438/977
摘要： A method of manufacturing a semiconductor device, which comprises the steps of subjecting a solid material to a first treatment consisting of a thermal treatment and/or a chemical treatment thereby to obtain a treated solid material having desired properties, and adhering the treated solid material onto a substrate for the semiconductor device, thereby to form a thin film on the substrate.
摘要翻译：一种制造半导体器件的方法，其包括以下步骤：使固体材料进行由热处理和/或化学处理组成的第一处理，从而获得具有所需性能的经处理的固体材料，并将经处理的固体材料粘附到用于半导体器件的衬底，从而在衬底上形成薄膜。

45. 发明授权

US5607718A Polishing method and polishing apparatus 失效
标题翻译：抛光方法和抛光装置
公开(公告)号：US5607718A
公开(公告)日：1997-03-04
申请号：US300127
申请日：1994-09-02
申请人： Yasutaka Sasaki , Mie Matsuo , Rempei Nakata , Junichi Wada , Nobuo Hayasaka , Hiroyuki Yano , Haruo Okano
发明人： Yasutaka Sasaki , Mie Matsuo , Rempei Nakata , Junichi Wada , Nobuo Hayasaka , Hiroyuki Yano , Haruo Okano
IPC分类号： B24B37/015 , B24B49/14 , B24B57/02 , H01L21/02 , H01L21/321 , H01L21/3213 , H01L21/768 , B05D5/12 , C03C15/00 , H01L21/465
CPC分类号： B24B37/015 , B24B57/02 , H01L21/02074 , H01L21/3212 , H01L21/3213 , H01L21/7684
摘要： This invention provides a polishing method including the steps of forming a film to be polished on a substrate having a recessed portion in its surface so as to fill at least the recessed portion, and selectively leaving the film to be polished behind in the recessed portion by polishing the film by using a polishing agent containing polishing particles and a solvent, and having a pH of 7.5 or more. The invention also provides a polishing apparatus including a polishing agent storage vessel for storing a polishing agent, a turntable for polishing an object to be polished, a polishing agent supply pipe for supplying the polishing agent from the polishing agent storage vessel onto the turntable, a polishing object holding jig for holding the object to be polished such that the surface to be polished of the object opposes the turntable, and a polishing agent supply pipe temperature adjusting unit, connected to the polishing agent supply pipe, for adjusting the temperature of the polishing agent.
摘要翻译：本发明提供了一种抛光方法，包括以下步骤：在其表面上具有凹陷部分的基底上形成待研磨的膜，以便至少填充凹部，并且通过在凹部中选择性地将被抛光的膜留在后面通过使用含有研磨粒子和溶剂的研磨剂，pH为7.5以上来研磨该膜。本发明还提供了一种抛光装置，其包括：用于存储抛光剂的抛光剂储存容器，用于抛光待抛光对象物的转盘，用于将抛光剂从抛光剂储存容器供应到转台上的抛光剂供给管，抛光对象保持夹具，用于保持待抛光对象物，使被处理物体的表面与转盘相对;抛光剂供给管温度调节单元，连接到抛光剂供应管，用于调节抛光温度代理商

46. 发明授权

US5514425A Method of forming a thin film 失效
标题翻译：形成薄膜的方法
公开(公告)号：US5514425A
公开(公告)日：1996-05-07
申请号：US392737
申请日：1995-03-06
申请人： Hitoshi Ito , Kyoichi Suguro , Nobuo Hayasaka , Haruo Okano , Shinji Himori , Kazuya Nagaseki , Syuji Mochizuki
发明人： Hitoshi Ito , Kyoichi Suguro , Nobuo Hayasaka , Haruo Okano , Shinji Himori , Kazuya Nagaseki , Syuji Mochizuki
IPC分类号： H01L21/205 , C23C16/04 , C23C16/34 , H01L21/302 , H01L21/3065 , H01L21/768 , C23C14/02
CPC分类号： H01L21/76865 , C23C16/045 , C23C16/34 , H01L21/76843 , H01L21/76877
摘要： A thin film-forming method according to the present invention is characterized by comprising the steps of introducing TiCl.sub.4, hydrogen, nitrogen and NF.sub.3 into a film-forming chamber containing a semiconductor substrate (1) having a groove made in its surface, after the chamber has been evacuated to 10.sup.-4 Torr or less; and converting these gases into plasma, thereby forming a thin TiN film on only that portion of the groove which is other than the wall surfaces of the groove.
摘要翻译： PCT No.PCT / JP94 / 01089 Sec。 371日期：1995年3月6日 102（e）1995年3月6日PCT PCT 1994年7月5日PCT公布。第WO95 / 02076号公报日本1990年1月19日。根据本发明的薄膜形成方法的特征在于包括以下步骤：将TiCl 4，氢，氮和NF 3引入包含具有凹槽的半导体衬底（1）的成膜室在其表面上，在室被抽真空至10-4乇或更小之后; 并将这些气体转化为等离子体，从而在凹槽的除了凹槽的壁表面之外的部分上形成薄的TiN膜。

47. 发明授权

US07829975B2 Multichip semiconductor device, chip therefor and method of formation thereof 有权
标题翻译：多芯片半导体器件，芯片及其形成方法
公开(公告)号：US07829975B2
公开(公告)日：2010-11-09
申请号：US11980641
申请日：2007-10-31
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L29/40
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.
摘要翻译：公开了一种多芯片半导体器件，其中堆叠芯片，每个芯片包括形成在顶部的半导体衬底和电路部件，以及形成在半导体衬底的顶部上的层间绝缘膜。至少一个芯片具有穿过半导体衬底和层间绝缘膜的通孔中形成的金属的连接插头。具有连接插头的芯片通过该连接插头与另一个芯片电连接。

48. 发明申请

US20080237888A1 Multichip semiconductor device, chip therefor and method of formation thereof 有权
公开(公告)号：US20080237888A1
公开(公告)日：2008-10-02
申请号：US11980641
申请日：2007-10-31
申请人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
发明人： Nobuo Hayasaka , Katsuya Okumura , Keiichi Sasaki , Mie Matsuo
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L23/642 , H01L21/76898 , H01L23/367 , H01L23/481 , H01L25/0655 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/0401 , H01L2224/0557 , H01L2224/06181 , H01L2224/13025 , H01L2224/14181 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2225/06572 , H01L2225/06589 , H01L2225/1023 , H01L2225/1058 , H01L2924/01046 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/10253 , H01L2924/13091 , H01L2924/15174 , H01L2924/15192 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/00
摘要： A multichip semiconductor device is disclosed in which chips are stacked each of which comprises a semiconductor substrate formed on top with circuit components and an interlayer insulating film formed on the top of the semiconductor substrate. At least one of the chips has a connect plug of a metal formed in a through hole that passes through the semiconductor substrate and the interlayer insulating film. The chip with the connect plug is electrically connected with another chip by that connect plug.

49. 发明授权

US06933205B2 Integrated circuit device and method of manufacturing the same 失效
标题翻译：集成电路装置及其制造方法
公开(公告)号：US06933205B2
公开(公告)日：2005-08-23
申请号：US10298059
申请日：2002-11-18
申请人： Mie Matsuo , Nobuo Hayasaka , Noriaki Matsunaga , Katsuya Okumura
发明人： Mie Matsuo , Nobuo Hayasaka , Noriaki Matsunaga , Katsuya Okumura
IPC分类号： H01F41/04 , H01F17/00 , H01L21/822 , H01L23/48 , H01L23/522 , H01L23/64 , H01L27/04 , H01L27/08 , H01L21/76
CPC分类号： H01L23/645 , H01L23/481 , H01L23/5227 , H01L27/08 , H01L2224/05009 , H01L2224/05027 , H01L2224/05155 , H01L2224/05169 , H01L2224/05171 , H01L2224/05568 , H01L2224/056 , H01L2224/05647 , H01L2224/16 , H01L2924/01078 , H01L2924/01079 , H01L2924/13091 , Y10S438/957 , H01L2924/00 , H01L2924/00014
摘要： The present invention provides an integrated circuit, comprising a semiconductor substrate, an active element formed on the side of one main surface of the semiconductor substrate, an insulating region formed on the side of the main surface of the semiconductor substrate by burying an insulating material in a groove having a depth of at least 20 μm, and a passive element formed directly or indirectly on the insulating region. It is desirable for the passive element to be an inductor.
摘要翻译：本发明提供了一种集成电路，包括半导体衬底，形成在半导体衬底的一个主表面侧的有源元件，通过将绝缘材料埋入半导体衬底的主表面侧而形成的绝缘区域具有至少20μm的深度的凹槽，以及直接或间接形成在绝缘区域上的无源元件。无源元件最好是一个电感器。

50. 发明授权

US06784680B2 Contact probe with guide unit and fabrication method thereof 失效
标题翻译：带导向单元的接触式探头及其制造方法
公开(公告)号：US06784680B2
公开(公告)日：2004-08-31
申请号：US10445181
申请日：2003-05-23
申请人： Tsuyoshi Haga , Katsuya Okumura , Nobuo Hayasaka , Hideki Shibata , Noriaki Matsunaga
发明人： Tsuyoshi Haga , Katsuya Okumura , Nobuo Hayasaka , Hideki Shibata , Noriaki Matsunaga
IPC分类号： G01R3102
CPC分类号： G01R1/06716 , G01R1/06722 , G01R1/06733 , G01R1/06738
摘要： A contact probe is fabricated by a method including a lithography step and a plating step. The contact probe includes a plunger unit to form contact with a circuit to be tested, a spring unit, and a lead wire connection unit, all formed integrally so as to have a three dimensional configuration with uniform thickness with respect to a predetermined plane configuration in a thickness direction perpendicular to the predetermined plane configuration. Preferably, a guide unit parallel to the spring unit is also formed integrally. Further preferably, the contact probe is formed integrally also including a stopper for each unitary configuration of the spring unit constituted by a leaf spring.
摘要翻译：通过包括光刻步骤和电镀步骤的方法制造接触探针。接触探针包括与被测试电路形成接触的柱塞单元，弹簧单元和引线连接单元，其全部形成为具有相对于预定平面构造具有均匀厚度的三维构造垂直于预定平面构造的厚度方向。优选地，与弹簧单元平行的引导单元也整体形成。进一步优选地，接触探针一体地形成，还包括用于由板簧构成的弹簧单元的每个单一构造的止动件。

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