专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明申请

US20120097948A1 THIN FILM TRANSISTOR 审中-公开
标题翻译：薄膜晶体管
公开(公告)号：US20120097948A1
公开(公告)日：2012-04-26
申请号：US13193463
申请日：2011-07-28
申请人： Jeong-Hwan Kim , Ki-Hong Kim , Yong-Jae Jang , Jung-Hyun Kim
发明人： Jeong-Hwan Kim , Ki-Hong Kim , Yong-Jae Jang , Jung-Hyun Kim
IPC分类号： H01L29/786
CPC分类号： H01L29/78621 , H01L27/0705 , H01L29/41733 , H01L29/42384
摘要： A thin film transistor includes a substrate, a gate electrode on the substrate, a gate insulating layer covering the gate electrode, a first semiconductor layer and a second semiconductor layer overlapping the gate electrode on the gate insulating layer and separated from each other, a first source electrode and a first drain electrode on the first semiconductor layer and on opposite sides of the gate electrode, and a second source electrode and a second drain electrode on the second semiconductor layer and on opposite sides of the gate electrode, wherein the first source electrode is coupled to the second source electrode through a source connection overlapping the gate electrode, and the first drain electrode is coupled to the second drain electrode, such that the on current and off current characteristics of the thin film transistor may be constantly maintained regardless of alignment error.
摘要翻译：薄膜晶体管包括衬底，衬底上的栅电极，覆盖栅电极的栅极绝缘层，与栅极绝缘层上的栅电极重叠并彼此分离的第一半导体层和第二半导体层，第一源电极和第一漏电极，以及在第二半导体层上和栅电极的相对侧上的第二源电极和第二漏电极，其中第一源电极通过与栅电极重叠的源极连接而耦合到第二源电极，并且第一漏电极耦合到第二漏电极，使得薄膜晶体管的导通电流和截止电流特性可以恒定地保持，而不管对准错误。

42. 发明授权

US08046634B2 Integrated circuit card with condition detector 有权
标题翻译：带状态检测器的集成电路卡
公开(公告)号：US08046634B2
公开(公告)日：2011-10-25
申请号：US11869990
申请日：2007-10-10
申请人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim
发明人： Sun-Kwon Kim , Byeong-Hoon Lee , Ki-Hong Kim
IPC分类号： G06F11/00
CPC分类号： G06F11/00
摘要： An integrated circuit card includes a central processing unit, a memory and an abnormal condition detector. The memory stores data to be processed by the central processing unit. The abnormal condition detector detects whether at least one operating condition of the integrated circuit card is within one of a suspend region or a reset region. The abnormal condition detector controls an operation of the central processing unit in accordance with the detection.
摘要翻译：集成电路卡包括中央处理单元，存储器和异常状态检测器。存储器存储要由中央处理单元处理的数据。异常状况检测器检测集成电路卡的至少一个工作状态是否在暂停区域或复位区域中的一个内。异常状态检测器根据检测器控制中央处理单元的操作。

43. 发明申请

US20110225351A1 MEMORY CARD AND MEMORY SYSTEM HAVING THE SAME 审中-公开
标题翻译：存储卡和存储器系统
公开(公告)号：US20110225351A1
公开(公告)日：2011-09-15
申请号：US13111489
申请日：2011-05-19
申请人： Ki-Hong Kim , Byeong-Hoon Lee , Seung-Won Lee , Sun-Kwon Kim
发明人： Ki-Hong Kim , Byeong-Hoon Lee , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G06F12/00
CPC分类号： G11C16/20
摘要： A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to a sum of sizes of the first and second memory chips. The plurality of memory chips of the memory card are useful in designing the memory card with storage capacity in various forms.
摘要翻译：存储卡包括：响应于外部输入的所有命令的第一存储器芯片; 以及响应命令的第二存储器芯片，在外部输入的命令中与数据的读取，编程和擦除操作相关。存储在第一存储器芯片中的卡识别信息包括对应于第一和第二存储器芯片的尺寸之和的容量信息。存储卡的多个存储芯片可用于以各种形式设计具有存储容量的存储卡。

44. 发明申请

US20110052055A1 COLOR CONVERSION SYSTEM AND METHOD 有权
标题翻译：颜色转换系统和方法
公开(公告)号：US20110052055A1
公开(公告)日：2011-03-03
申请号：US12836043
申请日：2010-07-14
申请人： Maeng-Sub CHO , Jin-Seo Kim , Bonki Koo , Soon-Young Kwon , Juyeon You , Ki-Hong Kim
发明人： Maeng-Sub CHO , Jin-Seo Kim , Bonki Koo , Soon-Young Kwon , Juyeon You , Ki-Hong Kim
IPC分类号： G06K9/00
CPC分类号： H04N1/6033 , H04N9/68
摘要： Provided is a color conversion system and method. The color conversion system which converts the color of a filmed image includes: an image separation unit configured to receive a reference image including a color reference table and an action image, and separate the reference and action images from each other; a color data extraction unit configured to output color values of the color reference table included in the reference image; a control unit configured to detect change values obtained by comparing color values included in the reference image with those included in the color reference table, and generate a look-up table for converting the colors of the color reference table included in the reference image into desired colors; and an image conversion unit configured to perform color correction by converting the color values of the action image into coordinates in pixels, using the look-up table outputted from the control unit.
摘要翻译：提供了一种颜色转换系统和方法。转换成像图像的颜色的颜色转换系统包括：图像分离单元，被配置为接收包括颜色参考表和动作图像的参考图像，并且使参考和动作图像彼此分离; 彩色数据提取单元，被配置为输出包括在参考图像中的颜色参考表的颜色值; 控制单元，被配置为检测通过将参考图像中包括的颜色值与包括在颜色参考表中的颜色值进行比较而获得的变化值，并且生成用于将包括在参考图像中的颜色参考表的颜色转换为期望的查找表颜色; 以及图像转换单元，被配置为使用从所述控制单元输出的查找表，将所述动作图像的颜色值转换为像素中的坐标来执行颜色校正。

45. 发明授权

US07889555B2 Flash memory system capable of operating in a random access mode and data reading method thereof 有权
标题翻译：能够以随机存取模式操作的闪存系统及其数据读取方法
公开(公告)号：US07889555B2
公开(公告)日：2011-02-15
申请号：US11764613
申请日：2007-06-18
申请人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G11C16/04
CPC分类号： G11C16/0483
摘要： A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.
摘要翻译：存储器系统包括操作以控制存储器的存储器和存储器控制器。存储器包括随机存取存储器，其包括以随机存取模式操作的存储单元阵列，NAND闪速存储器和使存储器控制器操作随机存取存储器或NAND闪速存储器之一的选择电路。

46. 发明授权

US07719321B2 Short pulse rejection circuit and method thereof 有权
标题翻译：短脉冲抑制电路及其方法
公开(公告)号：US07719321B2
公开(公告)日：2010-05-18
申请号：US12289855
申请日：2008-11-06
申请人： Cheon-Oh Lee , Nam-Hyun Kim , Ki-Hong Kim , Jong-Seok Kim , Jin-Ho Oh
发明人： Cheon-Oh Lee , Nam-Hyun Kim , Ki-Hong Kim , Jong-Seok Kim , Jin-Ho Oh
IPC分类号： H03K9/08
CPC分类号： H04L7/033 , H03K5/1252 , H03K5/1534 , H04L7/0083
摘要： A short pulse rejection circuit may include an edge detector, a filter circuit, a comparison circuit, and a gating circuit. The edge detector may delay an input signal to generate a delayed input signal, and detect an edge of the input signal to generate an edge detection signal. The filter circuit may perform a low pass filtering on the edge detection signal to generate a first signal. The comparison circuit may compare the first signal with a reference voltage. The gating circuit may gate the delayed input signal based on an output signal of the comparison circuit. Therefore, the short pulse rejection circuit may have a sufficient setup/hold time margin of a flip-flop, and may sample an input signal even when a state of the input signal does not change during an initial operation.
摘要翻译：短脉冲抑制电路可以包括边缘检测器，滤波器电路，比较电路和门控电路。边缘检测器可以延迟输入信号以产生延迟的输入信号，并且检测输入信号的边沿以产生边缘检测信号。滤波器电路可以对边缘检测信号执行低通滤波以产生第一信号。比较电路可以将第一信号与参考电压进行比较。门控电路可以基于比较电路的输出信号对延迟的输入信号进行门控。因此，短脉冲抑制电路可以具有触发器的足够的建立/保持时间裕度，并且即使在初始操作期间输入信号的状态没有改变时，也可以采样输入信号。

47. 发明申请

US20080192542A1 Memory System and Data Reading Method Thereof 有权
标题翻译：内存系统及其数据读取方法
公开(公告)号：US20080192542A1
公开(公告)日：2008-08-14
申请号：US11764613
申请日：2007-06-18
申请人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
发明人： Byeong-Hoon Lee , Ki-Hong Kim , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G11C11/409
CPC分类号： G11C16/0483
摘要： A memory system includes a memory and a memory controller operating to control the memory. The memory includes a random accessible memory including a memory cell array operable in a random access mode, a NAND flash memory, and a selection circuit making the memory controller operate either one of the random accessible memory or the NAND flash memory.
摘要翻译：存储器系统包括操作以控制存储器的存储器和存储器控制器。存储器包括随机存取存储器，其包括以随机存取模式操作的存储单元阵列，NAND闪速存储器和使存储器控制器操作随机存取存储器或NAND闪速存储器之一的选择电路。

48. 发明申请

US20080189474A1 MEMORY CARD AND MEMORY SYSTEM HAVING THE SAME 失效
标题翻译：存储卡和存储器系统
公开(公告)号：US20080189474A1
公开(公告)日：2008-08-07
申请号：US11761620
申请日：2007-06-12
申请人： Ki-Hong Kim , Byeong-Hoon Lee , Seung-Won Lee , Sun-Kwon Kim
发明人： Ki-Hong Kim , Byeong-Hoon Lee , Seung-Won Lee , Sun-Kwon Kim
IPC分类号： G06F12/00
CPC分类号： G11C16/20
摘要： A memory card includes: a first memory chip responding to all commands input externally; and a second memory chip responding to commands, among the commands input externally, relevant to reading, programming, and erasing operations with data. Card identification information stored in the first memory chip includes capacity information corresponding to a sum of sizes of the first and second memory chips. The plurality of memory chips of the memory card are useful in designing the memory card with storage capacity in various forms.
摘要翻译：存储卡包括：响应于外部输入的所有命令的第一存储器芯片; 以及响应命令的第二存储器芯片，在外部输入的命令中与数据的读取，编程和擦除操作相关。存储在第一存储器芯片中的卡识别信息包括对应于第一和第二存储器芯片的尺寸之和的容量信息。存储卡的多个存储芯片可用于以各种形式设计具有存储容量的存储卡。

49. 发明授权

US07364933B2 Image sensor and method for forming the same 失效
标题翻译：图像传感器及其形成方法
公开(公告)号：US07364933B2
公开(公告)日：2008-04-29
申请号：US11334936
申请日：2006-01-19
申请人： Ki-Hong Kim
发明人： Ki-Hong Kim
IPC分类号： H01L21/00
CPC分类号： H01L27/14636 , H01L27/14627
摘要： A method for forming an image sensor is provided. The method includes providing a semiconductor substrate having a pixel region and a peripheral circuit region, forming a photoelectric transformation section at the semiconductor substrate of the pixel region, forming a plurality of interlayer dielectrics over the semiconductor substrate with interconnections interposed therebetween, forming a passivation layer, partially patterning the passivation layer at the peripheral circuit region to form a via hole exposing the interconnection and removing the passivation layer and the underlying interlayer dielectric at the pixel region. The method further includes forming a conductive layer to fill the via hole and etching the conductive layer to remove the conductive layer at the pixel region and form a via plug and a conductive pad at the peripheral circuit region. The via plug fills the via hole and the conductive pad protrudes outwardly from the via hole.
摘要翻译：提供了一种用于形成图像传感器的方法。该方法包括提供具有像素区域和外围电路区域的半导体衬底，在像素区域的半导体衬底处形成光电转换部分，在半导体衬底上形成多个层间电介质，其间插入互连，形成钝化层，在外围电路区域部分地图案化钝化层以形成暴露互连并在像素区域去除钝化层和下层层间电介质的通孔。该方法还包括形成导电层以填充通孔并蚀刻导电层以去除像素区域处的导电层，并在外围电路区域形成通孔塞和导电垫。通孔插头填充通孔，导电垫从通孔向外突出。

50. 发明申请

US20080048904A1 Thermometer code generator, and frequency-locked loop including the same 有权
标题翻译：温度计代码发生器和包括相同的锁相环
公开(公告)号：US20080048904A1
公开(公告)日：2008-02-28
申请号：US11892476
申请日：2007-08-23
申请人： In-Ho Lee , Seok-Soo Yoon , Young-Ho Kwak , Ki-Hong Kim , Chulwoo Kim
发明人： In-Ho Lee , Seok-Soo Yoon , Young-Ho Kwak , Ki-Hong Kim , Chulwoo Kim
IPC分类号： H03L7/06 , G08C19/12
CPC分类号： H03L7/095 , H03L7/0891 , H03L7/0995 , H03L7/10
摘要： A thermometer code generator includes n bit storing stages that are coupled to each other, where n is an integer greater than 1, and the n bit storing stages store a thermometer code, and are adapted to increase the stored thermometer code by 1 in synchronization with a clock signal when an up signal is active, to decrease the stored thermometer code by 1 in synchronization with the clock signal when a down signal is active, and to maintain the stored thermometer code in synchronization with the clock signal when both of the up signal and the down signal are inactive.
摘要翻译：温度计代码发生器包括相互耦合的n位存储级，其中n是大于1的整数，并且n位存储级存储温度计代码，并且适于将存储的温度计代码增加1，与当上行信号有效时的时钟信号，当下行信号有效时，与时钟信号同步地将所存储的温度计代码减1，并且当两个上行信号都保持存储的温度计代码与时钟信号同步时并且下降信号无效。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式