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41. 发明授权

US07989355B2 Method of pitch halving 有权
标题翻译：节距减法的方法
公开(公告)号：US07989355B2
公开(公告)日：2011-08-02
申请号：US12370152
申请日：2009-02-12
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Ming-Ching Chang , Jeff J. Xu
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Ming-Ching Chang , Jeff J. Xu
IPC分类号： H01L21/302 , H01L21/461
CPC分类号： H01L21/3086 , H01L21/3088 , H01L21/823828 , H01L21/823871 , Y10S438/947
摘要： The present disclosure provides a method of fabricating a semiconductor device that includes forming a mask layer over a substrate, forming a dummy layer having a first dummy feature and a second dummy feature over the mask layer, forming first and second spacer roofs to cover a top portion of the first and second dummy features, respectively, and forming first and second spacer sleeves to encircle side portions of the first and second dummy features, respectively, removing the first spacer roof and the first dummy feature while protecting the second dummy feature, removing a first end portion and a second end portion of the first spacer sleeve to form spacer fins, and patterning the mask layer using the spacer fins as a first mask element and the second dummy feature as a second mask element.
摘要翻译：本公开提供了一种制造半导体器件的方法，该半导体器件包括在衬底上形成掩模层，在掩模层上形成具有第一虚拟特征和第二虚拟特征的虚设层，形成第一和第二间隔物顶部以覆盖顶部分别形成第一和第二间隔套筒以分别围绕第一和第二虚拟特征的侧面部分，去除第一间隔物顶部和第一虚拟特征，同时保护第二虚拟特征，去除第一间隔套筒的第一端部和第二端部，以形成间隔件翅片，并且使用间隔件翅片作为第一掩模元件并将第二虚拟特征图案化为掩模层作为第二掩模元件。

42. 发明申请

US20100183961A1 INTEGRATED CIRCUIT LAYOUT DESIGN 有权
标题翻译：集成电路布局设计
公开(公告)号：US20100183961A1
公开(公告)日：2010-07-22
申请号：US12356405
申请日：2009-01-20
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
IPC分类号： G03F7/20 , G06F17/50 , G03F1/00 , G03F7/40
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a method including layout design of an integrated circuit. A first pattern is provided. The first pattern includes an array of dummy line features and a plurality of spacer elements abutting the dummy line features. A second pattern is provided. The second pattern defines an active region of an integrated circuit device. An edge spacer element of the active region is determined. A dummy line feature of the array of dummy line features is biased (e.g., increased in width), the dummy line feature is adjacent an edge spacer element.
摘要翻译：提供了一种包括集成电路的布局设计的方法。提供了第一种模式。第一图案包括虚线特征的阵列和与虚线特征相邻的多个间隔元件。提供了第二种模式。第二图案定义了集成电路器件的有源区。确定有源区的边缘间隔元件。假线特征阵列的虚线特征被偏置（例如，宽度增加），虚线特征与边缘间隔元件相邻。

43. 发明授权

US06593033B1 Attenuated rim phase shift mask 有权
标题翻译：衰减边缘相移掩模
公开(公告)号：US06593033B1
公开(公告)日：2003-07-15
申请号：US09399840
申请日：1999-09-21
申请人： Zhiliu Ma , Anthony Yen , Cesar Garza
发明人： Zhiliu Ma , Anthony Yen , Cesar Garza
IPC分类号： G03F900
CPC分类号： G03F1/32 , G03F1/29
摘要： An embodiment of the instant invention is a mask having a pattern which is transferred to a layer overlying a semiconductor wafer, the mask comprising: a transmissive portion (structure 102 of FIG. 1), the transmissive portion allowing energy which impinges upon the transmission portion to substantially pass through the transmissive portion; a substantially non-transmissive portion (structure 106 of FIG. 1); a semi-transmissive portion (structure 104 of FIG. 1) situated between the transmissive portion and the substantially non-transmissive portion, energy passing through the semi-transmissive portion having a phase; and wherein the phase of energy which passes through the semi-transmissive portion is out of phase with the phase of energy which passes through the transmissive portion. Preferably, the phase of the energy which passes through the semi-transmissive portion is around 180 degrees out of phase with energy which passes through the transmissive portion.
摘要翻译：本发明的实施例是具有转移到覆盖半导体晶片的层的图案的掩模，掩模包括：透射部分（图1的结构102），透射部分允许撞击透射部分的能量以基本上穿过透射部分; 基本上非透射部分（图1的结构106）; 位于透射部分和基本上不透射部分之间的半透射部分（图1的结构104），穿过具有相位的半透射部分的能量; 并且其中穿过半透射部分的能量相位与通过透射部分的能量相位异相。优选地，通过半透射部分的能量的相位与通过透射部分的能量相差大约180度。

44. 发明授权

US06492073B1 Removal of line end shortening in microlithography and mask set for removal 有权
标题翻译：在微光刻和掩模组中去除线端缩短以进行去除
公开(公告)号：US06492073B1
公开(公告)日：2002-12-10
申请号：US09839926
申请日：2001-04-23
申请人： Burn Jeng Lin , Ru-Gun Liu , Shih-Ying Chen , Shinn-Sheng Yu , Hua-Tai Lin , Anthony Yen , Yao-Ching Ku
发明人： Burn Jeng Lin , Ru-Gun Liu , Shih-Ying Chen , Shinn-Sheng Yu , Hua-Tai Lin , Anthony Yen , Yao-Ching Ku
IPC分类号： G03F900
CPC分类号： G03F1/36 , G03F1/70 , G03F7/70433 , G03F7/70441
摘要： A mask set of two masks and a method of using these masks in a double exposure to avoid line shortening due to optical proximity effects is described. A pattern having pattern elements comprising a number of line segments, wherein each of the line segments has one or two free ends which are not connected to other mask pattern elements is to be transferred to a layer of resist. A first mask is formed by adding line extensions to each of the free ends of the line segments. A cutting mask is formed comprising rectangles enclosing each of the line extensions wherein one of the sides of said rectangles is coincident with the corresponding free end of said line segment. The first mask has opaque regions corresponding to the extended line segments. The cutting mask has transparent regions corresponding to the cutting pattern. In another embodiment a pattern having pattern openings comprising a number of line segments. In this embodiment the cutting pattern comprises rectangles having the same width as said line segments and add length to the line segments.
摘要翻译：描述了两个掩模的掩模组和在双重曝光中使用这些掩模以避免由于光学邻近效应引起的线缩短的方法。具有包括多个线段的图形元素的图案，其中每个线段具有未连接到其它掩模图案元件的一个或两个自由端将被转移到抗蚀剂层。通过向线段的每个自由端添加线延伸来形成第一掩模。形成切割掩模，其包括围绕每个线延伸的矩形，其中所述矩形的一个侧面与所述线段的对应的自由端重合。第一掩模具有对应于延伸线段的不透明区域。切割掩模具有对应于切割图案的透明区域。在另一个实施例中，具有包括多个线段的图案开口的图案。在该实施例中，切割图案包括具有与所述线段相同宽度的矩形，并且对线段增加长度。

45. 发明授权

US08828625B2 Extreme ultraviolet lithography mask and multilayer deposition method for fabricating same 有权
标题翻译：极紫外光刻掩模及其制造方法
公开(公告)号：US08828625B2
公开(公告)日：2014-09-09
申请号：US13567900
申请日：2012-08-06
申请人： Yen-Cheng Lu , Shinn-Sheng Yu , Anthony Yen
发明人： Yen-Cheng Lu , Shinn-Sheng Yu , Anthony Yen
IPC分类号： G03F7/16 , G03F1/24
CPC分类号： G03F1/24 , G03F1/52
摘要： A mask, method of fabricating same, and method of using same are disclosed. In an example, a mask includes a substrate and a reflective multilayer coating deposited over the substrate. The reflective multilayer coating is formed by positioning the substrate such that an angle α is formed between a normal line of the substrate and particles landing on the substrate and rotating the substrate about an axis that is parallel with a landing direction of the particles. In an example, reflective multilayer coating includes a first layer and a second layer deposited over the first layer. A phase defect region of the reflective multilayer coating includes a first deformation in the first layer at a first location, and a second deformation in the second layer at a second location, the second location laterally displaced from the first location.
摘要翻译：公开了一种掩模，其制造方法及其使用方法。在一个示例中，掩模包括沉积在衬底上的衬底和反射多层涂层。反射多层涂层通过定位基板而形成，使得在基板的法线和着陆在基板上的颗粒之间形成角度α，并使基板围绕与颗粒的着陆方向平行的轴线旋转。在一个实例中，反射多层涂层包括沉积在第一层上的第一层和第二层。反射多层涂层的相缺陷区域包括在第一位置处的第一层中的第一变形，以及在第二位置处的第二层中的第二变形，第二位置从第一位置横向移位。

46. 发明申请

US20090035902A1 INTEGRATED METHOD OF FABRICATING A MEMORY DEVICE WITH REDUCED PITCH 审中-公开
标题翻译：一种用减少PITCH制造存储器件的集成方法
公开(公告)号：US20090035902A1
公开(公告)日：2009-02-05
申请号：US11831031
申请日：2007-07-31
申请人： Jeff J. Xu , Anthony Yen , Chia-Ta Hsieh , Chia-Chi Chung , Cheng-Ming Lin
发明人： Jeff J. Xu , Anthony Yen , Chia-Ta Hsieh , Chia-Chi Chung , Cheng-Ming Lin
IPC分类号： H01L21/336
CPC分类号： H01L21/823468 , H01L27/105 , H01L27/1052
摘要： Provided is a method of fabricating a memory device. A substrate including an array region and a peripheral region is provided. A first feature and a second feature are formed in the array region. The first feature and the second feature have a first pitch. A plurality of spacers abutting each of the first feature and the second feature are formed. The plurality of spacers have a second pitch. A third feature in the peripheral region and a fourth and fifth feature in the array region are formed concurrently. The forth and fifth feature have the second pitch.
摘要翻译：提供一种制造存储器件的方法。提供了包括阵列区域和外围区域的基板。第一特征和第二特征形成在阵列区域中。第一特征和第二特征具有第一音调。形成邻接第一特征和第二特征的多个间隔件。多个间隔件具有第二间距。外围区域的第三特征和阵列区域中的第四和第五特征同时形成。第四和第五特征具有第二音调。

47. 发明授权

US08663878B2 Mask and method for forming the same 有权
标题翻译：面具及其形成方法
公开(公告)号：US08663878B2
公开(公告)日：2014-03-04
申请号：US13542550
申请日：2012-07-05
申请人： Shinn-Sheng Yu , Anthony Yen
发明人： Shinn-Sheng Yu , Anthony Yen
IPC分类号： G03F1/24 , G06F1/22
CPC分类号： G03F1/24 , G03F1/54
摘要： A mask can be used in lithography to fabricate a semiconductor wafer. The mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) above the LTEM substrate; and a patterned absorption layer above the reflective ML. The patterned absorption layer includes a thickness ranging between 25 nm and 31 nm, a refractive index ranging between 0.84 and 0.93 and an extinction coefficient ranging between 0.038 and 0.051.
摘要翻译：在光刻中可以使用掩模来制造半导体晶片。掩模包括低热膨胀材料（LTEM）衬底，在LTEM衬底上方的反射多层（ML）; 以及在反射ML上方的图案化吸收层。图案化吸收层包括在25nm和31nm之间的厚度，折射率在0.84和0.93之间，消光系数在0.038和0.051之间。

48. 发明申请

US20140011121A1 MASK AND METHOD FOR FORMING THE SAME 有权
标题翻译：掩模及其形成方法
公开(公告)号：US20140011121A1
公开(公告)日：2014-01-09
申请号：US13542550
申请日：2012-07-05
申请人： Shinn-Sheng Yu , Anthony Yen
发明人： Shinn-Sheng Yu , Anthony Yen
IPC分类号： G03F1/24 , G03F7/20
CPC分类号： G03F1/24 , G03F1/54
摘要： A mask can be used in lithography to fabricate a semiconductor wafer. The mask includes a low thermal expansion material (LTEM) substrate, a reflective multilayer (ML) above the LTEM substrate; and a patterned absorption layer above the reflective ML. The patterned absorption layer includes a thickness ranging between 25 nm and 31 nm, a refractive index ranging between 0.84 and 0.93 and an extinction coefficient ranging between 0.038 and 0.051.
摘要翻译：在光刻中可以使用掩模来制造半导体晶片。掩模包括低热膨胀材料（LTEM）衬底，在LTEM衬底上方的反射多层（ML）; 以及在反射ML上方的图案化吸收层。图案化吸收层包括在25nm和31nm之间的厚度，折射率在0.84和0.93之间，消光系数在0.038和0.051之间。

49. 发明申请

US20110151359A1 INTEGRATED CIRCUIT LAYOUT DESIGN 有权
标题翻译：集成电路布局设计
公开(公告)号：US20110151359A1
公开(公告)日：2011-06-23
申请号：US12980764
申请日：2010-12-29
申请人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
发明人： Ming-Feng Shieh , Shinn-Sheng Yu , Anthony Yen , Shao-Ming Yu , Chang-Yun Chang , Jeff J. Xu , Clement Hsingjen Wann
IPC分类号： G03F1/00 , G03F7/20 , G06F17/50
CPC分类号： H01L27/0203 , G03F1/00 , G03F1/36 , H01L21/3086 , H01L21/823431 , H01L29/66795
摘要： Provided is a photolithography apparatus including a photomask. The photomask includes a pattern having a plurality, of features, in an example, dummy line features. The pattern includes a first region being in the form of a localized on-grid array and a second region where at least one of the features has an increased width. The apparatus may include a second photomask which may define an active region. The feature with an increased width may be adjacent, and outside, the defined active region.
摘要翻译：提供了一种包括光掩模的光刻设备。光掩模包括具有多个特征的图案，在示例中为假线特征。该图案包括呈局部网格阵列形式的第一区域和其中至少一个特征具有增加的宽度的第二区域。该装置可以包括可以限定有源区域的第二光掩模。具有增加的宽度的特征可以与所定义的有效区域相邻并且在外部。

50. 发明授权

US06991895B1 Defocus-invariant exposure for regular patterns 失效
标题翻译：定焦模式的散焦不变曝光
公开(公告)号：US06991895B1
公开(公告)日：2006-01-31
申请号：US10224186
申请日：2002-08-20
申请人： Anthony Yen , Shinn-Sheng Yu
发明人： Anthony Yen , Shinn-Sheng Yu
IPC分类号： G03F7/00
CPC分类号： G03F1/30 , G03F7/70091 , G03F7/701
摘要： For a 2-dimensional periodic array of contact holes or islands, a depth-of-focus-enhancement lithographic scheme based on a combination of alternating phase-shifting mask and off-axis illumination is revealed. The scheme is achieved by choosing appropriate off-axis illumination and smaller numerical aperture such that only two diffraction orders, which are of equal distance from the pupil center, are collected in the first exposure. The image of the 2-dimensional periodic array can be formed by superposing a second exposure on the first. In the second exposure, another appropriate off-axis illumination and smaller numerical aperture is chosen such that another two diffraction orders, which are also of equal distance from the pupil center, are collected.
摘要翻译：对于接触孔或岛的2维周期性阵列，揭示了基于交替移相掩模和离轴照明的组合的聚焦深度增强光刻方案。该方案通过选择适当的离轴照明和较小的数值孔径来实现，使得在第一次曝光中仅收集与瞳孔中心相等距离的两个衍射级。可以通过在第一曝光上叠加第二曝光来形成二维周期性阵列的图像。在第二曝光中，选择另一适当的离轴照明和较小的数值孔径，以便收集距离瞳孔中心距离相等的另外两个衍射级。

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