专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

41. 发明授权

US06809972B2 Circuit technique for column redundancy fuse latches 失效
标题翻译：列冗余保险丝锁存器的电路技术
公开(公告)号：US06809972B2
公开(公告)日：2004-10-26
申请号：US10387993
申请日：2003-03-13
申请人： Gunther Lehmann , Gerd Frankowsky
发明人： Gunther Lehmann , Gerd Frankowsky
IPC分类号： G11C700
CPC分类号： G11C29/812
摘要： Address information representing failed elements in an array portion of a device is delivered. Respective fail address bit values are stored in a plurality of fuses. A signal associated with a respective value of a portion of a further address is received. When the signal is received, one of the fail address bit values is delivered from one of the fuses to a corresponding latch circuit. The latch circuit receives fail address bit values from at least two of the fuses. One of the fail address bit values is selected based on the value associated with the signal. The latch circuit is activated to deliver the fail address bit value.
摘要翻译：交付表示设备的阵列部分中的故障元素的地址信息。各故障地址位值存储在多个保险丝中。接收与另一地址的一部分的相应值相关联的信号。当接收到信号时，其中一个故障地址位值从保险丝之一传送到相应的锁存电路。锁存电路从至少两个保险丝接收故障地址位值。其中一个故障地址位值是根据与信号相关的值来选择的。锁存电路被激活以传送故障地址位值。

42. 发明授权

US06665224B1 Partial refresh for synchronous dynamic random access memory (SDRAM) circuits 有权
标题翻译：同步动态随机存取存储器（SDRAM）电路的部分刷新
公开(公告)号：US06665224B1
公开(公告)日：2003-12-16
申请号：US10153042
申请日：2002-05-22
申请人： Gunther Lehmann , Manfred Menke
发明人： Gunther Lehmann , Manfred Menke
IPC分类号： G11C700
CPC分类号： G11C11/40611 , G11C11/406 , G11C11/40622
摘要： A semiconductor dynamic random access memory (DRAM) 300 with a programmable memory refresh counter 345 is presented. The counter 345 permits the specification of portions of the DRAM 300 to be refreshed, saving power and time over DRAMs that refresh the entire memory. The counter 345 may be programmed with a wordline address at the beginning of a block of memory and subsequent refresh operations automatically increment or decrement the value in the counter. Additionally, blocks of the memory not being refreshed can be accessed (written or read), improving the utilization of the memory device.
摘要翻译：提出了具有可编程存储器刷新计数器345的半导体动态随机存取存储器（DRAM）300。计数器345允许更新DRAM 300的部分的指定，从而节省了刷新整个存储器的DRAM的功率和时间。计数器345可以在存储器块的开始处用字线地址编程，并且随后的刷新操作自动地增加或减少计数器中的值。此外，可以访问（书写或读取）不刷新的存储器块，从而提高存储器件的利用率。

43. 发明授权

US06661721B2 Systems and methods for executing precharge commands using posted precharge in integrated circuit memory devices with memory banks each including local precharge control circuits 有权
标题翻译：在具有各自包括局部预充电控制电路的存储体的集成电路存储器件中使用预充电来执行预充电命令的系统和方法
公开(公告)号：US06661721B2
公开(公告)日：2003-12-09
申请号：US10017106
申请日：2001-12-13
申请人： Gunther Lehmann , Thomas Boehler , Juei Lung Chen
发明人： Gunther Lehmann , Thomas Boehler , Juei Lung Chen
IPC分类号： G11C700
CPC分类号： G11C11/4094 , G11C7/12
摘要： A precharge command can be issued to a single bank or a precharge-all command can be issued to all banks of an integrated circuit memory device (e.g., DRAM circuit) at any time during normal operation of the device. Internal circuits are provided to decode the respective commands and send them to the different independent memory banks of the integrated circuit memory device. A local precharge control unit (or circuit) is present inside each of the memory banks that can receive and process the decoded precharge commands. If certain specified timing conditions are met, the local precharge control unit can issue and store a precharge request for a specific bank. The precharge request can be held back until all timing requirements are fulfilled. The precharge request can then be automatically executed.
摘要翻译：可以在设备的正常操作期间的任何时间向单个存储体发出预充电命令，或者可以在集成电路存储器件（例如，DRAM电路）的所有存储体中发出预充电命令。提供内部电路以对相应的命令进行解码并将其发送到集成电路存储器件的不同独立存储体。在可以接收和处理解码的预充电命令的每个存储体内部存在局部预充电控制单元（或电路）。如果满足某些指定的定时条件，则本地预充电控制单元可以发出并存储针对特定银行的预充电请求。预充电请求可以被保留，直到满足所有的时序要求为止。然后可以自动执行预充电请求。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式