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41. 发明申请

US20100122021A1 USB-Attached-SCSI Flash-Memory System with Additional Command, Status, and Control Pipes to a Smart-Storage Switch 失效
标题翻译： USB附加SCSI闪存系统，带有附加命令，状态和控制管道到智能存储交换机
公开(公告)号：US20100122021A1
公开(公告)日：2010-05-13
申请号：US12651334
申请日：2009-12-31
申请人： Charles C. Lee , Frank Yu , Abraham C. Ma
发明人： Charles C. Lee , Frank Yu , Abraham C. Ma
IPC分类号： G06F12/00 , G06F12/02 , G06F13/00
CPC分类号： G06F3/0661 , G06F3/0613 , G06F3/0688 , G11C11/5678 , G11C13/0004 , G11C16/102 , G11C2216/30
摘要： An electronic flash-memory card has additional pipes for commands and status messages so that data pipes are not clogged with commands and status messages, allowing for a higher data throughput. The command and status pipes are activated when a UAS/BOT detector detects that a host is using a USB-Attached-SCSI (UAS) mode rather than a Bulk-Only-Transfer (BOT) mode. The host can send additional commands and data without waiting for completion of a prior command when operating in UAS mode but not while operating in BOT mode. A command queue (CQ) in the device re-orders commands for accessing flash memory and merges data in a RAM buffer. Smaller 1 KB USB packets in the data pipes are merged into larger 8 KB payloads in the RAM buffer, allowing for more efficient flash access.
摘要翻译：电子闪存卡具有用于命令和状态消息的附加管道，使得数据管道不被命令和状态消息阻塞，从而允许更高的数据吞吐量。当UAS / BOT检测器检测到主机正在使用USB-Attached-SCSI（UAS）模式而不是Bulk-Only-Transfer（BOT）模式时，命令和状态管道将被激活。主机可以发送附加的命令和数据，而不必在UAS模式下操作时等待先前的命令完成，而不能在BOT模式下运行。设备中的命令队列（CQ）重新命令用于访问闪存的命令，并将数据合并到RAM缓冲区中。数据管道中较小的1 KB USB数据包被合并到RAM缓冲区中的较大的8 KB有效载荷中，从而实现更高效的闪存访问。

42. 发明授权

US07657692B2 High-level bridge from PCIE to extended USB 失效
标题翻译：从PCIE到扩展USB的高级桥
公开(公告)号：US07657692B2
公开(公告)日：2010-02-02
申请号：US11926636
申请日：2007-10-29
申请人： Charles C. Lee , David Q. Chow , Abraham C. Ma , Frank Yu , Ming-Shiang Shen , Horng-Yee Chou
发明人： Charles C. Lee , David Q. Chow , Abraham C. Ma , Frank Yu , Ming-Shiang Shen , Horng-Yee Chou
IPC分类号： G06F13/00
CPC分类号： G06F13/28 , G06F12/1416 , G06F21/32 , G06F21/78 , G06K9/00087 , G06K19/07 , G06K19/07354 , G07C9/00087
摘要： An extended universal-serial bus (EUSB) bridge to a host computer can have peripheral component interconnect express (PCIE) protocol layers on one side of the bridge, and EUSB layers on the other side of the bridge, with a high-level bridging converter module connecting the upper layers. The PCIE physical, data-link, and transport layers may be eliminated by integrating the bridge with an I/O controller. PCIE requests and data payloads are directly sent to the bridge, rather than low-level PCIE physical signals. The PCIE data payloads are converted to EUSB data payloads by a high-level direct bridging converter module. Then the EUSB data payloads are passed down to an EUSB transaction layer, an EUSB data-link layer, and an EUSB physical layer which drives and senses physical electrical signals on both differential pairs of the EUSB bus.
摘要翻译：到主机的扩展通用串行总线（EUSB）桥可以在桥的一侧具有外围组件互连快速（PCIE）协议层，并且在桥的另一侧可以具有高级桥接转换器模块连接上层。可以通过将桥与I / O控制器集成来消除PCIE物理，数据链路和传输层。 PCIE请求和数据有效载荷直接发送到桥，而不是低级PCIE物理信号。 PCIE数据有效载荷通过高级直接桥接转换器模块转换为EUSB数据有效载荷。然后，EUSB数据有效载荷被传递到EUSB事务层，EUSB数据链路层和EUSB物理层，其在EUSB总线的两个差分对上驱动和感测物理电信号。

43. 发明申请

US20100023682A1 Flash-Memory System with Enhanced Smart-Storage Switch and Packed Meta-Data Cache for Mitigating Write Amplification by Delaying and Merging Writes until a Host Read 有权
标题翻译：具有增强型智能存储交换机和封装元数据缓存的闪存系统，用于通过延迟和合并写入来缓解写入放大，直到主机读取
公开(公告)号：US20100023682A1
公开(公告)日：2010-01-28
申请号：US12576216
申请日：2009-10-08
申请人： Charles C. Lee , Frank Yu , Abraham C. Ma
发明人： Charles C. Lee , Frank Yu , Abraham C. Ma
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F12/0866 , G06F2212/1036 , G06F2212/214 , G06F2212/7203 , G06F2212/7207 , G11C13/0004 , G11C16/102 , G11C19/0808 , G11C2211/5641 , G11C2216/30
摘要： A flash memory solid-state-drive (SSD) has a smart storage switch that reduces write acceleration that occurs when more data is written to flash memory than is received from the host. Page mapping rather than block mapping reduces write acceleration. Host commands are loaded into a Logical-Block-Address (LBA) range FIFO. Entries are sub-divided and portions invalidated when a new command overlaps an older command in the FIFO. Host data is aligned to page boundaries with pre- and post-fetched data filling in to the boundaries. Repeated data patterns are detected and encoded by compressed meta-data codes that are stored in meta-pattern entries in a meta-pattern cache of a meta-pattern flash block. The sector data is not written to flash. The meta-pattern entries are located using a meta-data mapping table. Storing host CRC's for comparison to incoming host data can detect identical data writes that can be skipped, avoiding a write to flash.
摘要翻译：闪存固态驱动器（SSD）具有智能存储交换机，可以减少写入快速写入的速度，而写入速度会比从主机接收到的更多的数据写入闪存。页面映射而不是块映射减少写入加速。主机命令加载到逻辑块地址（LBA）范围FIFO中。当新命令与FIFO中的旧命令重叠时，条目被分割，部分无效。主机数据与页边界对齐，前后获取的数据填充到边界。通过存储在元模式闪存块的元模式高速缓存中的元模式条目中的压缩元数据代码来检测和编码重复的数据模式。扇区数据未写入闪存。使用元数据映射表定位元模式条目。存储主机CRC用于与传入主机数据进行比较可以检测可跳过的相同数据写入，避免写入闪存。

44. 发明申请

US20090193184A1 Hybrid 2-Level Mapping Tables for Hybrid Block- and Page-Mode Flash-Memory System 审中-公开
标题翻译：用于混合块和页模式闪存系统的混合二级映射表
公开(公告)号：US20090193184A1
公开(公告)日：2009-07-30
申请号：US12418550
申请日：2009-04-03
申请人： Frank Yu , Charles C. Lee , Abraham C. Ma , Myeongjin Shin
发明人： Frank Yu , Charles C. Lee , Abraham C. Ma , Myeongjin Shin
IPC分类号： G06F12/02 , G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7203 , G06F2212/7208 , G11C11/5628 , G11C11/5678 , G11C13/00 , G11C13/0004 , G11C2211/5641
摘要： A hybrid solid-state disk (SSD) has multi-level-cell (MLC) or single-level-cell (SLC) flash memory, or both. SLC flash may be emulated by MLC that uses fewer cell states. A NVM controller converts logical block addresses (LBA) to physical block addresses (PBA). Most data is block-mapped and stored in MLC flash, but some critical or high-frequency data is page-mapped to reduce block-relocation copying. A hybrid mapping table has a first-level and a second level. Only the first level is used for block-mapped data, but both levels are used for page-mapped data. The first level contains a block-page bit that indicates if the data is block-mapped or page-mapped. A PBA field in the first-level table maps block-mapped data, while a virtual field points to the second-level table where the PBA and page number is stored for page-mapped data. Page-mapped data is identified by a frequency counter or sector count. SRAM space is reduced.
摘要翻译：混合固态盘（SSD）具有多级单元（MLC）或单级单元（SLC）闪存，或两者兼有。 SLC闪存可能由使用较少单元状态的MLC仿真。 NVM控制器将逻辑块地址（LBA）转换为物理块地址（PBA）。大多数数据被块映射并存储在MLC闪存中，但是一些关键或高频数据被页映射以减少块重定位复制。混合映射表具有第一级和第二级。只有第一级用于块映射数据，但是这两个级别都用于页映射数据。第一级包含一个块页位，指示数据是块映射还是页映射。第一级表中的PBA字段映射块映射数据，而虚拟字段指向存储页面映射数据的PBA和页码的二级表。页面映射数据由频率计数器或扇区计数来标识。 SRAM空间减少。

45. 发明申请

US20120199285A1 MIXING BONDING ADHESIVE AT DIE BONDER BEFORE DISPENSE 有权
标题翻译：混合胶粘剂在配方之前
公开(公告)号：US20120199285A1
公开(公告)日：2012-08-09
申请号：US13020311
申请日：2011-02-03
申请人： Frank Yu , Eric Hsieh , Kevin Jin
发明人： Frank Yu , Eric Hsieh , Kevin Jin
IPC分类号： B32B7/12 , B29C47/36
CPC分类号： B05C11/10 , B29C47/0009 , B29C47/026
摘要： A method for die bonding includes positioning a dispenser in a die bonding apparatus, wherein the dispenser includes a reservoir having bonding adhesive therein including particles and a liquid carrier. The dispenser is moved to provide mechanical agitation to the dispenser for mixing the bonding adhesive into a homogeneous mixture of particles and the liquid carrier, wherein the bonding adhesive is not dispensed during moving. After the moving, the bonding adhesive is dispensed onto a bonding location on the workpiece without removing the dispenser from the die attach apparatus. An integrated circuit (IC) die is attached onto the bonding adhesive over the bonding location. The method can also include determining an amount of time elapsed after the last mixing of the bonding adhesive or the positioning of the dispenser in the die bonding apparatus, and automatically initiating movement for mixing only if the elapsed time exceeds a predetermined time.
摘要翻译：一种用于芯片接合的方法包括将分配器定位在芯片接合装置中，其中分配器包括其中具有粘合剂的储存器，其中包括颗粒和液体载体。移动分配器以向分配器提供机械搅拌，用于将粘合粘合剂混合成粒子和液体载体的均匀混合物，其中粘合粘合剂在移动期间不分配。在移动之后，将粘合粘合剂分配到工件上的粘合位置上，而不从管芯附接装置移除分配器。集成电路（IC）管芯在接合位置附着在粘结粘合剂上。该方法还可以包括确定在粘合粘合剂的最后混合之后经过的时间量或分散器在芯片粘合装置中的定位，以及仅在经过时间超过预定时间时才自动启动混合运动。

46. 发明申请

US20100027329A1 Synchronous Page-Mode Phase-Change Memory with ECC and RAM Cache 失效
标题翻译：具有ECC和RAM缓存的同步页模式相变存储器
公开(公告)号：US20100027329A1
公开(公告)日：2010-02-04
申请号：US12579695
申请日：2009-10-15
申请人： Charles C. Lee , Frank Yu , David Q. Chow
发明人： Charles C. Lee , Frank Yu , David Q. Chow
IPC分类号： G11C11/00 , G11C7/10 , G11C7/00
CPC分类号： G11C8/08 , G11C8/06 , G11C8/12 , G11C11/5678 , G11C13/0004 , G11C13/0023 , G11C13/0028 , G11C13/0061 , G11C13/0069 , G11C2013/0071 , G11C2013/0085 , G11C2213/79
摘要： Phase-change memory (PCM) cells store data using alloy resistors in high-resistance amorphous and low-resistance crystalline states. The time of the memory cell's set-current pulse can be 100 ns, much longer than read or reset times. The write time thus depends on the write data and is relatively long. A page-mode caching PCM device has a lookup table (LUT) that caches write data that is later written to an array of PCM banks. Host data is latched into a line FIFO and written into the LUT, reducing write delays to the relatively slow PCM. Host read data can be supplied by the LUT or fetched from the PCM banks. A multi-line page buffer between the PCM banks and LUT allows for larger block transfers using the LUT. Error-correction code (ECC) checking and generation is performed for data in the LUT, hiding ECC delays for data writes into the PCM banks.
摘要翻译：相变存储器（PCM）单元使用高电阻非晶和低电阻晶体状态的合金电阻存储数据。存储单元的设定电流脉冲的时间可以是100 ns，比读取或复位时间长得多。因此，写入时间取决于写入数据并且相对较长。页面模式缓存PCM设备具有高速缓存写入数据的查找表（LUT），该数据稍后被写入PCM存储体阵列。主机数据被锁存到行FIFO中并写入LUT中，从而将写入延迟减少到相对较慢的PCM。主机读取数据可由LUT提供或从PCM存储区中提取。 PCM组和LUT之间的多行页面缓冲区允许使用LUT进行更大的块传输。对LUT中的数据执行纠错码（ECC）检查和生成，将ECC数据写入PCM存储体中隐藏ECC延迟。

47. 发明申请

US20080052507A1 Multi-Partition USB Device that Re-Boots a PC to an Alternate Operating System for Virus Recovery 有权
标题翻译：将PC重新引导到备用操作系统进行病毒恢复的多分区USB设备
公开(公告)号：US20080052507A1
公开(公告)日：2008-02-28
申请号：US11838192
申请日：2007-08-13
申请人： David Chow , Charles Lee , Frank Yu , Tzu-Yih Chu , Ming-Shiang Shen
发明人： David Chow , Charles Lee , Frank Yu , Tzu-Yih Chu , Ming-Shiang Shen
IPC分类号： G06F13/38 , G06F1/24 , G06F21/00 , G06F9/06
CPC分类号： G06F21/568 , G06F21/575 , G06F2221/2105 , G06F2221/2153
摘要： A multi-partition Universal Serial Bus (USB) device has a flash memory with multiple partitions of storage. Some partitions are for different operating systems and store OS images. Another partition has a control program while a user partition stores user data and user configuration information. The control program can test the multi-partition USB device and instruct the host computer BIOS to mount a partition from its flash memory as a drive of the host computer. The host computer can then be rebooted. The OS image from the flash memory is loaded into main memory during rebooting, and the host computer executes a new operating system using the new OS image. The user can press buttons on the multi-partition USB device to select which OS to load, and to begin rebooting. Virus removal programs in the alternate OS can help recover from a virus in the primary OS.
摘要翻译：多分区通用串行总线（USB）设备具有具有多个存储分区的闪存。一些分区用于不同的操作系统并存储操作系统映像。另一个分区具有控制程序，而用户分区则存储用户数据和用户配置信息。控制程序可以测试多分区USB设备，并指示主机BIOS将其闪存中的分区作为主机的驱动器安装。然后可以重新启动主机。重新启动时，闪存中的OS映像将加载到主内存中，主机使用新的操作系统映像执行新的操作系统。用户可以按多分区USB设备上的按钮选择要加载的操作系统，并开始重新启动。备用操作系统中的病毒清除程序可以帮助从主操作系统中的病毒恢复。

48. 发明申请

US20080040598A1 Flash micro-controller with shadow boot-loader SRAM for dual-device booting of micro-controller and host 失效
标题翻译：闪存微控制器带有引导加载器的SRAM，用于微控制器和主机的双设备启动
公开(公告)号：US20080040598A1
公开(公告)日：2008-02-14
申请号：US11875648
申请日：2007-10-19
申请人： Charles Lee , David Chow , Abraham Ma , Frank Yu , Ming-Shiang Shen
发明人： Charles Lee , David Chow , Abraham Ma , Frank Yu , Ming-Shiang Shen
IPC分类号： G06F15/177
CPC分类号： G06F9/441
摘要： A flash microcontroller has a Static Random-Access-Memory (SRAM) buffer that stores several blocks of boot code read from a flash memory. The boot code includes an initial boot loader, boot code and a control program that are executed by the flash microcontroller, and an operating system OS image and an external-host control program that are executed by an external host. Both the external host and the microcontroller are booted from boot code buffered in the SRAM buffer. A first-reset-read address from the external host is captured by the microcontroller during its boot sequence and stored in a mapping table along with a physical address of the block in the SRAM buffer with the operating system OS image and the external-host control program. A boot-loader state machine reads the flash ID and programs flash parameter registers with timing parameters for the flash memory.
摘要翻译：闪存微控制器具有静态随机存取存储器（SRAM）缓冲器，其存储从闪存读取的几个引导代码块。引导代码包括由闪存微控制器执行的初始引导加载程序，引导代码和控制程序，以及由外部主机执行的操作系统OS映像和外部主机控制程序。外部主机和微控制器均由缓冲在SRAM缓冲区中的引导代码引导。微控制器在其引导序列期间捕获来自外部主机的第一复位读取地址，并将其与SRAM缓冲器中具有操作系统OS映像和外部主机控制的块的物理地址一起存储在映射表中程序。引导加载器状态机读取闪存ID，并使用Flash存储器的时序参数对闪存参数寄存器进行编程。

49. 发明申请

US20070204128A1 Two-Level RAM Lookup Table for Block and Page Allocation and Wear-Leveling in Limited-Write Flash-Memories 失效
标题翻译：有限写入闪存中的块和页面分配和磨损均衡的两级RAM查找表
公开(公告)号：US20070204128A1
公开(公告)日：2007-08-30
申请号：US11742270
申请日：2007-04-30
申请人： Charles Lee , Frank Yu , David Chow
发明人： Charles Lee , Frank Yu , David Chow
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/1036 , G06F2212/7211
摘要： A restrictive multi-level-cell (MLC) flash memory prohibits regressive page-writes. When a regressive page-write is requested, an empty block having a low wear-level count is found, and data from the regressive page-write and data from pages stored in the old block are written to the empty block in page order. The old block is erased and recycled. A two-level look-up table is stored in volatile random-access memory (RAM). A logical page address from a host is divided by a modulo divider to generate a quotient and a remainder. The quotient is a logical block address that indexes a first-level look-up table to find a mapping entry with a physical block address that selects a row in a second-level look-up table. The remainder locates a column in the row in the second-level look-up table. If any page-valid bits above the column pointed to by the remainder are set, the write is regressive.
摘要翻译：限制性多电平单元（MLC）闪存禁止回归页面写入。当请求回归页面写入时，找到具有低磨损级别计数的空块，并且按页顺序将存储在旧块中的页面写入的数据和来自页面的页面的数据写入空块。旧区被擦除并回收。两级查找表存储在易失性随机存取存储器（RAM）中。来自主机的逻辑页地址由模分隔器除以生成商和余数。商是一个逻辑块地址，其索引第一级查找表以找到具有在二级查找表中选择行的物理块地址的映射条目。剩余部分在二级查找表中的行中找到一列。如果设置了剩余部分指向的列之上的任何页面有效位，则写入是回归的。

50. 发明申请

US20070156587A1 Content Protection Using Encryption Key Embedded with Content File 审中-公开
标题翻译：使用嵌入内容文件的加密密钥进行内容保护
公开(公告)号：US20070156587A1
公开(公告)日：2007-07-05
申请号：US11677658
申请日：2007-02-22
申请人： Frank Yu , Charles Lee , Abraham Ma , Ming-Shiang Shen
发明人： Frank Yu , Charles Lee , Abraham Ma , Ming-Shiang Shen
IPC分类号： G06Q99/00
CPC分类号： G06F21/10
摘要： Content on a storage medium is protected from unauthorized use, such as excessive copying or expired playback. A storage medium contains encrypted content and an encrypted content key with rules such as usage and copy rules. An interface between a record/playback device and the storage medium has enhanced security by not passing unprotected encryption keys that might be intercepted by external hackers. A content key is combined with usage and copy rules and then encrypted with a unique key, and may be doubly-encrypted with a control key before transmission over the interface. The unique key is generated from a key matrix on the record/playback device using row and columns received from the storage medium. The storage medium stores a pre-loaded copy of the unique key. The control key is generated from a random number on the record/playback device and storage medium avoiding transmission over the interface.
摘要翻译：保护存储介质上的内容免受未经授权的使用，例如过度复制或过期播放。存储介质包含加密内容和具有诸如使用和复制规则等规则的加密内容密钥。记录/回放设备和存储介质之间的接口通过不传递可能被外部黑客拦截的未受保护的加密密钥而增强了安全性。内容密钥与使用和复制规则组合，然后用唯一密钥加密，并且可以在通过接口传输之前用控制密钥进行双重加密。使用从存储介质接收的行和列从记录/回放设备上的按键矩阵生成唯一密钥。存储介质存储唯一密钥的预加载副本。该控制键是从记录/重放设备和存储介质上的随机数生成的，避免了通过接口的传输。

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