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41. 发明授权

US07070657B1 Method and apparatus for depositing antireflective coating 失效
标题翻译：用于沉积抗反射涂层的方法和装置
公开(公告)号：US07070657B1
公开(公告)日：2006-07-04
申请号：US09418818
申请日：1999-10-15
申请人： David Cheung , Joe Feng , Judy H. Huang , Wai-Fan Yau
发明人： David Cheung , Joe Feng , Judy H. Huang , Wai-Fan Yau
IPC分类号： C23C16/52 , C23F1/00 , H01L21/306
CPC分类号： G03F7/091
摘要： This invention provides a stable process for depositing an antireflective layer. Helium gas is used to lower the deposition rate of plasma-enhanced silane oxide, silane oxynitride, and silane nitride processes. Helium is also used to stabilize the process, so that different films can be deposited. The invention also provides conditions under which process parameters can be controlled to produce antireflective layers with varying optimum refractive index, absorptive index, and thickness for obtaining the desired optical behavior.
摘要翻译：本发明提供一种用于沉积抗反射层的稳定方法。氦气用于降低等离子体增强硅烷氧化物，硅氮氧化物和氮化硅工艺的沉积速率。氦也用于稳定工艺，使得可以沉积不同的膜。本发明还提供了可以控制工艺参数以产生具有变化的最佳折射率，吸收指数和厚度以获得所需光学行为的抗反射层的条件。

42. 发明申请

US20050079703A1 Method for planarizing an interconnect structure 审中-公开
标题翻译：平面化互连结构的方法
公开(公告)号：US20050079703A1
公开(公告)日：2005-04-14
申请号：US10683143
申请日：2003-10-09
申请人： Hui Chen , Chun Yan , Wai-Fan Yau
发明人： Hui Chen , Chun Yan , Wai-Fan Yau
IPC分类号： C23F3/04 , H01L21/02 , H01L21/321 , H01L21/3213 , H01L21/768 , H01L21/44 , H01L21/4763
CPC分类号： H01L21/02074 , C23F3/04 , H01L21/32115 , H01L21/3212 , H01L21/32136 , H01L21/7684
摘要： A method of forming an interconnect structure (e.g., copper interconnect structure, and the like) on a semiconductor substrate. The interconnect structure is formed by depositing within trenches and openings formed in an inter-metal dielectric (IMD) layer a barrier layer and a conductive material. Thereafter, the interconnect structure is planarized using a two-step process whereby excess conductive material on the IMD material is removed during the first step using a chemical mechanical polishing (CMD) process. In the second step the barrier layer is removed using a plasma etch process. The barrier layer is removed using a gas mixture including a halogen-containing gas.
摘要翻译：在半导体衬底上形成互连结构（例如，铜互连结构等）的方法。互连结构通过在形成于金属间电介质（IMD）层的沟槽和开口内沉积阻挡层和导电材料而形成。此后，使用两步法将互连结构平坦化，由此在第一步骤期间使用化学机械抛光（CMD）工艺除去IMD材料上的过量导电材料。在第二步骤中，使用等离子体蚀刻工艺去除阻挡层。使用包含含卤素气体的气体混合物除去阻挡层。

43. 发明授权

US06743737B2 Method of improving moisture resistance of low dielectric constant films 有权
标题翻译：提高低介电常数膜耐湿性的方法
公开(公告)号：US06743737B2
公开(公告)日：2004-06-01
申请号：US10226717
申请日：2002-08-22
申请人： Wai-Fan Yau , David Cheung , Nasreen Gazala Chopra , Yung-Cheng Lu , Robert Mandal , Farhad Moghadam
发明人： Wai-Fan Yau , David Cheung , Nasreen Gazala Chopra , Yung-Cheng Lu , Robert Mandal , Farhad Moghadam
IPC分类号： H01L2131
CPC分类号： H01L21/02211 , C23C16/401 , C23C16/56 , H01L21/02126 , H01L21/022 , H01L21/02216 , H01L21/02271 , H01L21/02274 , H01L21/02337 , H01L21/02343 , H01L21/02359 , H01L21/3125 , H01L21/31633 , H01L21/76807
摘要： A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10 W to about 500 W, exposing the silicon oxide based film to water or a hydrophobic-imparting surfactant such as hexamethyldisilazane, and curing the silicon oxide based film at an elevated temperature. Dissociation of the oxidizing gas can be increased in a separate microwave chamber to assist in controlling the carbon content of the deposited film. The moisture resistance of the silicon oxide based films is enhanced.
摘要翻译：用于沉积低介电常数膜的方法和装置包括沉积氧化硅基膜，优选通过有机硅化合物和氧化气体以约10W至约500W的低RF功率水平反应，暴露基于氧化硅的膜与水或疏水赋予性表面活性剂如六甲基二硅氮烷，并在升高的温度下固化氧化硅基膜。可以在单独的微波室中增加氧化气体的离解，以有助于控制沉积膜的碳含量。氧化硅系膜的耐湿性提高。

44. 发明授权

US06287990B1 CVD plasma assisted low dielectric constant films 有权
标题翻译： CVD等离子体辅助低介电常数膜
公开(公告)号：US06287990B1
公开(公告)日：2001-09-11
申请号：US09162915
申请日：1998-09-29
申请人： David Cheung , Wai-Fan Yau , Robert R. Mandal
发明人： David Cheung , Wai-Fan Yau , Robert R. Mandal
IPC分类号： C23C16505
CPC分类号： H01L21/76832 , C23C16/401 , H01L21/02126 , H01L21/02208 , H01L21/02274 , H01L21/0228 , H01L21/02304 , H01L21/02362 , H01L21/31612 , H01L21/76801 , H01L21/76808 , H01L21/7681 , H01L21/76829 , H01L21/76834 , H01L21/76835 , H01L2221/1031
摘要： A method and apparatus for depositing a low dielectric constant film by reaction of an organosilane or organosiloxane compound and an oxidizing gas at a low RF power level from 10-250 W. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop or an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers. A preferred oxidized organosilane film is produced by reaction of methylsilane, CH3SiH3, or dimethylsilane, (CH3)2SiH2, and nitrous oxide, N2O, at an RF power level from about 10 to 200 W or a pulsed RF power level from about 20 to 250 W during 10-30% of the duty cycle.
摘要翻译：一种用于通过有机硅烷或有机硅氧烷化合物和氧化性气体以10-250W的低RF功率水平反应沉积低介电常数膜的方法和装置。氧化的有机硅烷或有机硅氧烷膜具有良好的阻挡性能，用作衬垫或盖层邻近其它电介质层。氧化的有机硅烷或有机硅氧烷膜也可用作制造双镶嵌结构的蚀刻停止层或金属间介质层。氧化的有机硅烷或有机硅氧烷膜也在不同的介电层之间提供优异的粘附性。优选的氧化有机硅烷膜通过甲基硅烷，CH 3 SiH 3或二甲基硅烷，（CH 3）2 SiH 2和一氧化二氮，N 2 O以约10至200W的RF功率水平或约20至250的RF功率水平反应来制备 W占用周期的10-30％。

45. 发明授权

US06245690B1 Method of improving moisture resistance of low dielectric constant films 有权
标题翻译：提高低介电常数膜耐湿性的方法
公开(公告)号：US06245690B1
公开(公告)日：2001-06-12
申请号：US09187460
申请日：1998-11-04
申请人： Wai-Fan Yau , David Cheung , Nasreen Gazala Chopra , Yung-Cheng Lu , Robert Mandal , Farhad Moghadam
发明人： Wai-Fan Yau , David Cheung , Nasreen Gazala Chopra , Yung-Cheng Lu , Robert Mandal , Farhad Moghadam
IPC分类号： C23C1640
CPC分类号： H01L21/02211 , C23C16/401 , C23C16/56 , H01L21/02126 , H01L21/022 , H01L21/02216 , H01L21/02271 , H01L21/02274 , H01L21/02337 , H01L21/02343 , H01L21/02359 , H01L21/3125 , H01L21/31633 , H01L21/76807
摘要： A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10 W to about 500 W, exposing the silicon oxide based film to water or a hydrophobic-imparting surfactant such as hexamethyldisilazane, and curing the silicon oxide based film at an elevated temperature. Dissociation of the oxidizing gas can be increased in a separate microwave chamber to assist in controlling the carbon content of the deposited film. The moisture resistance of the silicon oxide based films is enhanced.
摘要翻译：用于沉积低介电常数膜的方法和装置包括沉积氧化硅基膜，优选通过有机硅化合物和氧化气体以约10W至约500W的低RF功率水平反应，暴露基于氧化硅的膜与水或疏水赋予性表面活性剂如六甲基二硅氮烷，并在升高的温度下固化氧化硅基膜。可以在单独的微波室中增加氧化气体的离解，以有助于控制沉积膜的碳含量。氧化硅系膜的耐湿性提高。

46. 发明授权

US06209484B1 Method and apparatus for depositing an etch stop layer 有权
标题翻译：沉积蚀刻停止层的方法和装置
公开(公告)号：US06209484B1
公开(公告)日：2001-04-03
申请号：US09551021
申请日：2000-04-17
申请人： Judy H. Huang , Wai-Fan Yau , David Cheung , Chan-Lon Yang
发明人： Judy H. Huang , Wai-Fan Yau , David Cheung , Chan-Lon Yang
IPC分类号： C23C1600
CPC分类号： C23C16/308 , C23C16/345 , C23C16/52 , G03F7/091 , H01L21/0276 , H01L21/31116 , H01L21/76802 , H01L21/76829
摘要： A method and apparatus for depositing an etch stop layer. The method begins by introducing process gases into a processing chamber in which a substrate is disposed. An etch stop layer is then deposited over the substrate. An overlying layer is then deposited over the etch stop layer. The etch stop layer substantially protects underlying materials from the etchants used in patterning the overlying layer. Moreover, the etch stop layer also possesses advantageous optical characteristics, making it suitable for use as an antireflective coating in the patterning of layers underlying the etch stop layer.
摘要翻译：一种沉积蚀刻停止层的方法和装置。该方法开始于将工艺气体引入其中设置衬底的处理室中。然后在衬底上沉积蚀刻停止层。然后将上覆层沉积在蚀刻停止层上。蚀刻停止层基本上保护用于图案化上覆层的蚀刻剂的下层材料。此外，蚀刻停止层还具有有利的光学特性，使其适合用作在蚀刻停止层下面的图案图案中的抗反射涂层。

47. 发明授权

US08187951B1 CVD flowable gap fill 有权
标题翻译： CVD可流动缝隙填充
公开(公告)号：US08187951B1
公开(公告)日：2012-05-29
申请号：US12625468
申请日：2009-11-24
申请人： Feng Wang , Victor Y. Lu , Brian Lu , Wai-Fan Yau , Nerissa Draeger
发明人： Feng Wang , Victor Y. Lu , Brian Lu , Wai-Fan Yau , Nerissa Draeger
IPC分类号： H01L21/76
CPC分类号： H01L21/76224
摘要： Methods of lining and/or filling gaps on a substrate by creating flowable silicon oxide-containing films are provided. The methods involve introducing vapor-phase silicon-containing precursor and oxidant reactants into a reaction chamber containing the substrate under conditions such that a condensed flowable film is formed on the substrate. The flowable film at least partially fills gaps on the substrates and is then converted into a silicon oxide film. In certain embodiments, the methods involve using a catalyst, e.g., a nucleophile or onium catalyst, in the formation of the film. The catalyst may be incorporated into one of the reactants and/or introduced as a separate reactant. Also provided are methods of converting the flowable film to a solid dielectric film. The methods of this invention may be used to line or fill high aspect ratio gaps, including gaps having aspect ratios ranging from 3:1 to 10:1.
摘要翻译：提供了通过产生可流动的含氧化硅膜在衬底上衬里和/或填充间隙的方法。所述方法包括将气相含硅前体和氧化剂反应物引入含有基材的反应室中，使得在基材上形成冷凝的可流动的膜。可流动膜至少部分地填充衬底上的间隙，然后转换成氧化硅膜。在某些实施方案中，所述方法包括在形成膜中使用催化剂，例如亲核试剂或鎓催化剂。催化剂可以并入到一种反应物中和/或作为单独的反应物引入。还提供了将可流动膜转化为固体电介质膜的方法。本发明的方法可以用于线或填充高纵横比间隙，包括具有3:1至10:1的纵横比的间隙。

48. 发明授权

US07888273B1 Density gradient-free gap fill 有权
标题翻译：密度无梯度填充
公开(公告)号：US07888273B1
公开(公告)日：2011-02-15
申请号：US11834581
申请日：2007-08-06
申请人： Feng Wang , Victor Y. Lu , Brian Lu , Wai-Fan Yau
发明人： Feng Wang , Victor Y. Lu , Brian Lu , Wai-Fan Yau
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/76224
摘要： Multi-cycle methods result in dense, seamless and void-free dielectric gap fill are provided. The methods involve forming liquid or flowable films that partially fill a gap, followed by a solidification and/or anneal process that uniformly densifies the just-formed film. The thickness of the layer formed is such that the subsequent anneal process creates a film that does not have a density gradient. The process is then repeated as necessary to wholly or partially fill or line the gap as desired. The methods of this invention may be used to line or fill high aspect ratio gaps, including gaps having aspect ratios greater than about 6:1 with widths less than about 0.13 μm.
摘要翻译：多循环方法可提供密集，无缝隙和无空隙的电介质间隙填充。所述方法包括形成部分填充间隙的液体或可流动膜，随后进行均匀地致密刚形成膜的凝固和/或退火工艺。所形成的层的厚度使得随后的退火工艺产生不具有密度梯度的膜。然后根据需要重复该过程以根据需要完全或部分填充或排列间隙。本发明的方法可用于对高纵横比间隙进行排列或填充，包括具有大于约6:1的纵横比的间隙，宽度小于约0.13μm。

49. 发明申请

US20060166108A1 Method for etching a molybdenum layer suitable for photomask fabrication 失效
标题翻译：蚀刻适用于光掩模制造的钼层的方法
公开(公告)号：US20060166108A1
公开(公告)日：2006-07-27
申请号：US11044358
申请日：2005-01-27
申请人： Madhavi Chandrachood , Ajay Kumar , Wai-Fan Yau
发明人： Madhavi Chandrachood , Ajay Kumar , Wai-Fan Yau
IPC分类号： G03C5/00 , G03F1/00
CPC分类号： G03F1/32 , G03F1/54 , G03F1/80
摘要： Methods for fabricating a photomask are disclosed herein. In one embodiment, a method for fabricating a photomask includes providing a filmstack having a molybdenum layer and a light-shielding layer in a processing chamber, patterning a first resist layer on the light-shielding layer, etching the light-shielding layer using the first resist layer as an etch mask, and etching the molybdenum layer using the patterned light-shielding layer and the patterned first resist layer as a composite mask.
摘要翻译：本文公开了制造光掩模的方法。在一个实施例中，一种制造光掩模的方法包括在处理室中提供具有钼层和遮光层的薄膜层，对遮光层上的第一抗蚀剂层进行图案化，使用第一抗蚀剂层作为蚀刻掩模，并且使用图案化遮光层和图案化的第一抗蚀剂层作为复合掩模蚀刻钼层。

50. 发明授权

US06632735B2 Method of depositing low dielectric constant carbon doped silicon oxide 失效
标题翻译：沉积低介电常数碳掺杂氧化硅的方法
公开(公告)号：US06632735B2
公开(公告)日：2003-10-14
申请号：US09924240
申请日：2001-08-07
申请人： Wai-Fan Yau , Ju-Hyung Lee , Nasreen Gazala Chopra , Tzu-Fang Huang , David Cheung , Farhad Moghadam , Kuo-Wei Liu , Yung-Cheng Lu , Ralf B. Willecke , Paul Matthews , Dian Sugiarto
发明人： Wai-Fan Yau , Ju-Hyung Lee , Nasreen Gazala Chopra , Tzu-Fang Huang , David Cheung , Farhad Moghadam , Kuo-Wei Liu , Yung-Cheng Lu , Ralf B. Willecke , Paul Matthews , Dian Sugiarto
IPC分类号： H01L2131
CPC分类号： H01L21/02126 , C23C16/401 , H01L21/02274 , H01L21/02337 , H01L21/31633
摘要： A method of forming a carbon-doped silicon oxide layer is disclosed. The carbon-doped silicon oxide layer is formed by applying an electric field to a gas mixture comprising an organosilane compound and an oxidizing gas. The carbon-doped silicon oxide layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the carbon-doped silicon oxide layer is used as an intermetal dielectric layer. In another integrated circuit fabrication process, the carbon-doped silicon oxide layer is incorporated into a damascene structure.
摘要翻译：公开了形成碳掺杂氧化硅层的方法。碳掺杂氧化硅层通过向包含有机硅烷化合物和氧化气体的气体混合物施加电场而形成。碳掺杂氧化硅层与集成电路制造工艺兼容。在一个集成电路制造工艺中，碳掺杂氧化硅层用作金属间介电层。在另一个集成电路制造工艺中，掺杂碳的氧化硅层被结合到镶嵌结构中

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