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    • 47. 发明授权
    • Method for manufacturing semiconductor device
    • 制造半导体器件的方法
    • US09178071B2
    • 2015-11-03
    • US13225703
    • 2011-09-06
    • Hidekazu MiyairiKoji DairikiShunpei YamazakiRyo Arasawa
    • Hidekazu MiyairiKoji DairikiShunpei YamazakiRyo Arasawa
    • H01L21/336H01L29/786H01L29/66
    • H01L29/78678H01L29/66765H01L29/78606H01L29/78648H01L29/78669H01L29/78696
    • Provided is a method for manufacturing a semiconductor device with fewer masks and in a simple process. A gate electrode is formed. A gate insulating film, a semiconductor film, an impurity semiconductor film, and a conductive film are stacked in this order, covering the gate electrode. A source electrode and a drain electrode are formed by processing the conductive film. A source region, a drain region, and a semiconductor layer, an upper part of a portion of which does not overlap with the source region and the drain region is removed, are formed by processing the upper part of the semiconductor film, while the impurity semiconductor film is divided. A passivation film over the gate insulating film, the semiconductor layer, the source region, the drain region, the source electrode, and the drain electrode are formed. An etching mask is formed over the passivation film. At least the passivation film and the semiconductor layer are processed to have an island shape while an opening reaching the source electrode or the drain electrode is formed, with the use of the etching mask. The etching mask is removed. A pixel electrode is formed over the gate insulating film and the passivation film.
    • 提供一种用于制造具有较少掩模的半导体器件的方法,并且在简单的过程中。 形成栅电极。 依次层叠栅绝缘膜,半导体膜,杂质半导体膜和导电膜,覆盖栅电极。 通过处理导电膜形成源电极和漏电极。 通过处理半导体膜的上部,形成源区域,漏极区域和半导体层,其部分的上部不与源极区域和漏极区域重叠,而杂质 半导体薄膜被划分。 形成栅极绝缘膜,半导体层,源极区域,漏极区域,源极电极和漏极电极之后的钝化膜。 在钝化膜上形成蚀刻掩模。 通过使用蚀刻掩模,至少钝化膜和半导体层被加工成具有岛状,同时形成到达源电极或漏电极的开口。 去除蚀刻掩模。 在栅极绝缘膜和钝化膜上形成像素电极。