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    • 42. 发明申请
    • Method And System For Designing A Probe Card
    • 探针卡设计方法与系统
    • US20060294008A1
    • 2006-12-28
    • US11464760
    • 2006-08-15
    • Benjamin EldridgeMark BrandemuehlStefan GraefYves Parent
    • Benjamin EldridgeMark BrandemuehlStefan GraefYves Parent
    • G06Q99/00
    • G01R3/00G01R1/073G01R1/07342G06Q30/0609G06Q30/0621G06Q30/0633G06Q50/188
    • A method and system for designing a probe card from data provided by prospective customers via the Internet is provided. Design specifications are entered into the system by prospective customers and compiled into a database. The collective feasibility of each set of design specifications is determined by an automated computer system and communicated to the prospective customer. If feasible, additional software enables prospective customers to create verification packages according to their respective design specifications. These verification packages further consist of drawing files visually describing the final design and verification files confirming wafer bonding pad data. Verification packages are reviewed and forwarded to an applications engineer after customer approval. An interactive simulation of probe card performance is also provided. Data on probe card performance is incorporated into an overall modeling exercise, which includes not only the probe card, but data on the device(s) under test and wafer, as well as data on automated test equipment.
    • 提供了一种通过互联网从潜在客户提供的数据设计探针卡的方法和系统。 设计规范由潜在客户输入系统并编译成数据库。 每套设计规范的集体可行性由自动化计算机系统确定,并传达给潜在客户。 如果可行,附加软件可使潜在客户根据各自的设计规范创建验证包。 这些验证包还包括可视化地描述确认晶圆键合焊盘数据的最终设计和验证文件的绘图文件。 在客户批准后,验证包将被审核并转发给应用工程师。 还提供了探针卡性能的交互式仿真。 探针卡性能数据被纳入整体建模练习中,其中不仅包括探针卡,还包括被测设备和晶片上的数据,以及自动测试设备的数据。
    • 45. 发明申请
    • Mechanically reconfigurable vertical tester interface for IC probing
    • 用于IC探测的机械可重构垂直测试仪接口
    • US20050277323A1
    • 2005-12-15
    • US10868425
    • 2004-06-15
    • Benjamin EldridgeBarbara VasquezMakarand ShindeGaetan MathieuA. Sporck
    • Benjamin EldridgeBarbara VasquezMakarand ShindeGaetan MathieuA. Sporck
    • G01R1/04G01R1/073G01R31/28H01R11/18
    • G01R31/2889G01R1/0416G01R1/07307
    • A wafer test assembly includes multiple probe head substrates arranged like tiles with connectors attached to one side and probes supported on the opposing side. In one embodiment, flexible cable connectors directly connect the connectors on the probe head tile to a test head, while in another embodiment the flexible cables connect the probe head tile to a PCB providing horizontal routing to test head connectors. In one embodiment, leveling pins provide a simplified support structure connecting to a retaining element attached to the tiles to provide for applying a push-pull leveling force. A test head connector interface frame enables rearrangement of connectors between the test head and the probe card to provide for both full wafer contact or partial wafer contact. The test head connectors are rearranged by being slidable on rails, or pluggable and unpluggable enabling movement over a range of positions.
    • 晶片测试组件包括多个探针头基底,其布置成瓦片,其中连接器连接到一侧,探针支撑在相对侧上。 在一个实施例中,柔性电缆连接器将探头头瓦片上的连接器直接连接到测试头,而在另一个实施例中,柔性电缆将探头头瓦片连接到PCB,从而向测试头连接器提供水平布线。 在一个实施例中,调平销提供连接到附接到瓦片的保持元件以提供施加推挽平整力的简化支撑结构。 测试头连接器接口框架能够重新布置测试头和探针卡之间的连接器,以提供完整的晶片接触或部分晶片接触。 测试头连接器通过在轨道上滑动来重新布置,或者可插拔和可拔出,使得能够在一定范围的位置上移动。
    • 47. 发明申请
    • Probe card configuration for low mechanical flexural strength electrical routing substrates
    • 用于低机械抗弯强度电路基板的探针卡配置
    • US20050156611A1
    • 2005-07-21
    • US10771099
    • 2004-02-02
    • Makarand ShindeRichard LarderTimothy CooperRavindra ShenoyBenjamin Eldridge
    • Makarand ShindeRichard LarderTimothy CooperRavindra ShenoyBenjamin Eldridge
    • G01R31/02G01R31/28
    • G01R31/2889G01R1/07378
    • A mechanical support configuration for a probe card of a wafer test system is provided to increase support for a very low flexural strength substrate that supports spring probes. Increased mechanical support is provided by: (1) a frame around the periphery of the substrate having an increased sized horizontal extension over the surface of the substrate; (2) leaf springs with a bend enabling the leaf springs to extend vertically and engage the inner frame closer to the spring probes; (3) an insulating flexible membrane, or load support member machined into the inner frame, to engage the low flexural strength substrate farther away from its edge; (4) a support structure, such as support pins, added to provide support to counteract probe loading near the center of the space transformer substrate; and/or (5) a highly rigid interface tile provided between the probes and a lower flexural strength space transformer substrate.
    • 提供了用于晶片测试系统的探针卡的机械支撑结构,以增加对支撑弹簧探针的极低弯曲强度基底的支撑。 通过以下方式提供增加的机械支撑:(1)围绕基板的周边的框架,在基板的表面上具有增大尺寸的水平延伸; (2)具有弯曲的板簧,使得板簧能够垂直延伸并使内框架接近弹簧探头; (3)绝缘柔性膜或加工到内框架中的负载支撑构件,使低弯曲强度基板与其边缘更远地接合; (4)加载支撑结构,例如支撑销,以提供支撑以抵消在空间变压器基板的中心附近的探头负载; 和/或(5)设置在所述探针与下弯曲强度空间变换器基板之间的高刚性界面砖。
    • 50. 发明申请
    • PREDICTIVE, ADAPTIVE POWER SUPPLY FOR AN INTEGRATED CIRCUIT UNDER TEST
    • 预测,适用于测试中的集成电路的自适应电源
    • US20070257696A1
    • 2007-11-08
    • US11779188
    • 2007-07-17
    • Benjamin EldridgeCharles Miller
    • Benjamin EldridgeCharles Miller
    • G06F1/26
    • G06F1/26G01R31/2851G01R31/31721G01R31/31905G01R31/31924
    • A main power source supplies current through path impedance to a power terminal of an integrated circuit device under test (DUT). The DUT's demand for current at the power input terminal temporarily increases following edges of a clock signal applied to the DUT during a test as transistors within the IC switch in response to the clock signal edges. To limit variation (noise) in voltage at the power input terminal, an auxiliary power supply supplies an additional current pulse to the power input terminal to meet the increased demand during each cycle of the clock signal. The magnitude of the current pulse is a function of a predicted increase in current demand during that clock cycle, and of the magnitude of an adaption signal controlled by a feedback circuit provided to limit variation in voltage developed at the DUT's power input terminal.
    • 主电源将电流通过路径阻抗提供给被测集成电路器件(DUT)的电源端子。 在测试期间,DUT对电源输入端的电流需求暂时增加了在测试期间施加到DUT的时钟信号的随后边缘,作为IC开关中的晶体管响应于时钟信号的边缘。 为了限制电源输入端子的电压变化(噪声),辅助电源为电源输入端子提供额外的电流脉冲,以满足在时钟信号的每个周期期间增加的需求。 电流脉冲的大小是在该时钟周期期间电流需求的预测增加以及由反馈电路控制的适配信号的大小的函数,以设置用于限制在DUT的功率输入端产生的电压变化。