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41. 发明授权

US06415363B1 Memory statistics counter and method for counting the number of accesses to a portion of memory 失效
标题翻译：存储器统计计数器和用于计数对存储器的一部分的访问次数的方法
公开(公告)号：US06415363B1
公开(公告)日：2002-07-02
申请号：US09512407
申请日：2000-02-24
申请人： Alain Benayoun , Patrick Michel , Jean-Francois Le Pennec , Michel Verhaeghe
发明人： Alain Benayoun , Patrick Michel , Jean-Francois Le Pennec , Michel Verhaeghe
IPC分类号： G06F1300
CPC分类号： G06F11/3409 , G06F11/348 , G06F2201/88
摘要： A memory statistic counter and method for counting the number of accesses (writes or reads) by a microprocessor (10) to at least a portion of a memory comprising a decoding logic unit (16) for providing a selection signal for selecting the portion of memory in response to control signals from the microprocessor, and adding logic units (18, 20, 22). The memory statistic counter includes a register which is incremented each time the portion of memory is accessed by the microprocessor and providing a registration signal when the number of accesses is equal to a predetermined number, and a queuing unit (44) for registering a value in a registering memory (50), such as a first-in-first-out (FIFO) memory, in response to the registration signal and providing an interrupt signal to the microprocessor when all locations of the registering memory have been filled, thereby indicating to the microprocessor that a defined number of accesses to the portion of memory has occurred.
摘要翻译：一种存储器统计计数器和方法，用于将由微处理器（10）接收（写入或读取）的数量计数到包括解码逻辑单元（16）的存储器的至少一部分，用于提供用于选择存储器部分的选择信号响应于来自微处理器的控制信号，以及添加逻辑单元（18,20,22）。存储器统计计数器包括每当存储器部分被微处理器访问并且当访问次数等于预定数量时提供注册信号而递增的寄存器，以及用于将值存储在其中的排队单元（44）诸如先入先出（FIFO）存储器的登记存储器（50），其响应于所述注册信号，并且在所述注册存储器的所有位置已经被填充时向微处理器提供中断信号，由此指示对存储器部分的定义数量的访问已经发生的微处理器。

42. 发明授权

US06256323B1 Method and apparatus for efficiently transporting asynchronous characters over an ATM network 失效
标题翻译：用于在ATM网络上有效地传送异步字符的方法和装置
公开(公告)号：US06256323B1
公开(公告)日：2001-07-03
申请号：US09052286
申请日：1998-03-31
申请人： Alain Benayoun , Patrick Michel , Maurice Duault , Jean-Francois Le Pennec
发明人： Alain Benayoun , Patrick Michel , Maurice Duault , Jean-Francois Le Pennec
IPC分类号： H04J326
CPC分类号： H04Q11/0478 , H04L7/041 , H04L2012/5653
摘要： Method of processing asynchronous characters in order to transmit them over an ATM network (10, 12 or 16) of a communication system having a first endpoint (36) and a second endpoint (38), a first group of one or more Data Terminal Equipments (DTE) being connected to the first endpoint and a second group of one or more DTE's being connected to the second endpoint and wherein data are transmitted from the first group of DTE's to the second group of DTE's by the intermediary of the ATM network. Asynchronous characters are processed as they are received at the first endpoint from the first group of DTE's by removing Start, Stop and parity bits. A block is generated consisting of one or more processed asynchronous characters received in sequence from a particular DTE of the first group of DTE's. An ID byte is added to the block to identify the transmitting DTE, yielding a data unit. A plurality of such data units are concatenated to build a data unit frame. The data unit frame is encapsulated into an ATM cell structure in order to transmit the frame over the ATM network.
摘要翻译：处理异步字符以便通过具有第一端点（36）和第二端点（38）的通信系统的ATM网络（10,12或16）进行处理的方法，第一组一个或多个数据终端设备（DTE）连接到所述第一端点，并且第二组一个或多个DTE连接到所述第二端点，并且其中数据通过所述ATM网络的媒介从所述第一DTE组发送到所述第二组DTE。在从第一组DTE通过删除启动，停止和奇偶校验位在第一个端点处接收到异步字符。产生一个块，其由从第一组DTE的特定DTE顺序接收的一个或多个经处理的异步字符组成。将ID字节添加到块以识别发送DTE，产生数据单元。多个这样的数据单元被级联以建立数据单元框架。数据单元帧被封装成ATM信元结构，以便通过ATM网络发送帧。

43. 发明授权

US06233239B1 Package structure for communication equipment 失效
标题翻译：通讯设备的封装结构
公开(公告)号：US06233239B1
公开(公告)日：2001-05-15
申请号：US09409275
申请日：1999-09-30
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Patrick Cavallo
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Patrick Cavallo
IPC分类号： H04L1228
CPC分类号： H04L49/45 , H04L49/15 , H04L49/20 , H04L49/253 , H04L49/30 , H04L49/3009 , H04L49/40 , H04L49/508 , H04L49/557 , H04L2012/5625 , H04Q1/021 , H04Q1/03 , H04Q1/035 , H05K5/0021
摘要： A package for communication equipment has a housing fitted with a locking mechanism and electrical/communication power supply and distribution, and includes UP, DOWN, RIGHT, LEFT faces for assembly with other housings. The locking mechanism includes a rotatable axle penetrating the housing and having a first end located outside of the housing and a second end located inside of the housing. A camming hook having a distal end is mounted on the rotatable axle inside the housing to rotate with the axle and locks into position when rotated in a first direction, to bring a movable electrical contact to make resilient electrical contact with a stationary live contact. When the rotatable axle is rotated in a direction opposite to the first direction, the mechanism becomes unlocked and breaks the electrical connection at the movable electrical contact.
摘要翻译：用于通信设备的包装件具有安装有锁定机构和电气/通信电力供应和分配的壳体，并且包括用于与其它壳体组装的UP，DOWN，RIGHT，LEFT面。锁定机构包括穿过壳体的旋转轴，并且具有位于壳体外部的第一端和位于壳体内部的第二端。具有远端的凸轮钩安装在壳体内部的可旋转轴上以与轴一起旋转并在沿第一方向旋转时锁定到位，以使可动电接触件与静止的带电接触件弹性地电接触。当可旋转轴沿与第一方向相反的方向旋转时，机构解锁并且断开可移动电接触处的电连接。

44. 发明授权

US06128761A Method and apparatus for G.706 frame alignment and CRC procedure test tool 失效
标题翻译： G.706帧校准和CRC程序测试工具的方法和装置
公开(公告)号：US06128761A
公开(公告)日：2000-10-03
申请号：US986830
申请日：1997-12-08
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Jean-Louis Clara , Jacques Cresp
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Jean-Louis Clara , Jacques Cresp
IPC分类号： H04J3/06 , H04J3/14 , H04L7/04 , H03M13/00
CPC分类号： H04J3/14 , H04J3/06 , H04L7/042
摘要： This invention describes a test tool based on a PC workstation. This test tool is used to validate any E1 framing telecommunication device. In order to comply with the CCITT G.706 recommendations, a device has to pass a series of test cases that are predetermined. Each test case contains test sequences according to the CCITT G.706 specifications. The purpose of this test tool is to generate a set of stimuli in the transmission mode, whereas in the reception mode, the value of the data returned by the tested device is analyzed and compared with the expected response. The data bytes are structured as for E1 multiframe format containing 16 frames of 32 timeslots, where each timeslot is a data byte. According to the G.706 recommendations, timeslot 0 is dedicated to the frame and multiframe alignment and to the CRC test. The test tool enables generating of the content of the 8-bit timeslot 0 of each frame and therefore modifying the frame alignment, the multiframe alignment and the CRC procedure test tool; and storing the content of the received 8-bit timeslot 0 to monitor the remote alarm indication bit (`A` bit) reflecting the behavior of the tested device so as to determine whether this latter conforms to the CCITT G.706 recommendations.
摘要翻译：本发明描述了一种基于PC工作站的测试工具。该测试工具用于验证任何E1成帧电信设备。为了符合CCITT G.706建议，设备必须通过一系列预先确定的测试用例。每个测试用例都包含根据CCITT G.706规范的测试序列。该测试工具的目的是在传输模式中产生一组刺激，而在接收模式下，对被测设备返回的数据值进行分析并与预期响应进行比较。数据字节被构造为包含32个时隙的16个帧的E1复帧格式，其中每个时隙是数据字节。根据G.706建议，时隙0专用于帧和多帧对准以及CRC测试。该测试工具能够生成每个帧的8位时隙0的内容，从而修改帧对齐，多帧对准和CRC过程测试工具; 并存储接收的8位时隙0的内容以监视反映被测设备的行为的远程报警指示位（'A'位），以便确定后者是否符合CCITT G.706建议。

45. 发明授权

US6026089A Package structure for communication equipment 失效
公开(公告)号：US6026089A
公开(公告)日：2000-02-15
申请号：US770931
申请日：1996-12-20
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Patrick Cavallo
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Patrick Cavallo
IPC分类号： H04L12/70 , H04L12/931 , H04L12/933 , H04L12/935 , H04L12/937 , H04L12/939 , H04Q1/02 , H05K5/00 , H04L12/28 , H04L12/56 , H04Q5/00
CPC分类号： H04L49/45 , H04L49/15 , H04L49/253 , H04L49/40 , H04L49/557 , H04Q1/021 , H04Q1/03 , H04Q1/035 , H05K5/0021 , H04L2012/5625 , H04L49/20 , H04L49/30 , H04L49/3009 , H04L49/508
摘要： A package for a communication equipment fitted with mechanical locking mechanism and electrical and communication connectivity for allowing power supply distribution as well as communication at least at four distinctive faces (UP, DOWN, RIGHT, LEFT). Each communicating face is fitted with optical transmission and reception devices allowing digital communication between adjacent apparatuses. Each package comprises two faces having each one protrusion at one surface that is intended to enter into a groove machined at a corresponding surface of the next adjacent package in said structure. Each protrusion comprises a locking mechanism for power supply that comprises a camming hook (2200) having a distal end which forceably engages a locking aperture (2210) when pivoted. The hook is pivotally coupled to an axel (2101) extending respectfully through an elongated aperture (2301) formed at one end of a lever arm (2300), and an elongated aperture (2302) of the hook. The lever arm (2300) having a dielectrical non-conductive distal end including at least one recess (2411). The bottom of the recess engages at one end of a first compression coil spring (2405) whose other end is spring biased against a first washer (2403) whose lower surface thereof engages a second compression coil spring (2410), the lower end of which engages the interior surface of the protrusion of the adjacent package. A rod extending through an electrically insulated aperture of said lower surface of said protrusion has a lower end being rigidly secured to a second washer (2407) and an upper end being rigidly secured to said first washer (2403). The lower end of the rod faces an electrical contact (2402) connected to a power supply electrical wire which is affixed to the upper surface of the adjacent package. The pivotation of said camming hook (2200) parallely causes the locking and the electrical connection of said package.

46. 发明授权

US5771227A Method and system for routing massages in a multi-node data communication network 失效
标题翻译：用于在多节点数据通信网络中路由消息的方法和系统
公开(公告)号：US5771227A
公开(公告)日：1998-06-23
申请号：US612712
申请日：1996-03-08
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Gerard Brun
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Gerard Brun
IPC分类号： H04L12/54 , H04L12/70 , H04L12/701 , H04L12/933 , H04L12/947 , H04J3/24 , H04L12/56
CPC分类号： H04L12/5601 , H04L45/00 , H04L49/107 , H04L49/256 , H04L2012/567 , H04L2012/5679
摘要： The invention relates to a method and a system for routing messages or frames through network nodes connected to each other by network links and connected to a plurality of terminals by different input/output ports also called network attachment cards (NAC) in a multi-node communication network. In such a configuration, each terminal equipment stores a network table. The network table is updated in the terminal itself by a network manager which may by the way limit the access of the terminal to some terminals of the network. To route an incoming message or frame from a source terminal (T1) to the destination terminal (T7), a routing algorithm is implemented in each NAC. Each NAC has a different and unique integer address in the node, each node has a different and unique prime number address greater than the number of NACs in the node. Each terminal connected to a node sends frames with a routing identifier (RI). The different RIs are located in the network table. When an input NAC receives a frame, the routing algorithm computes the address of the output NAC given by the remainder of the division of the RI by the node address, then this output NAC sends the frames onto its network link. This process is performed in each node until the destination terminal is reached. The RI is kept unchanged during the frame transmission. A timer is also used to test if the frame is received because a network link may be down. In such case, an alternate RI is used to take an alternate route.
摘要翻译：本发明涉及一种方法和系统，用于通过网络链路彼此连接的网络节点路由消息或帧，并通过多节点中也称为网络附加卡（NAC）的不同输入/输出端口连接到多个终端通讯网络在这种配置中，每个终端设备存储网络表。网络表在终端本身由网络管理器更新，网络管理器可以限制终端对网络的某些终端的访问。为了将来自源终端（T1）的输入消息或帧路由到目的终端（T7），在每个NAC中实现路由算法。每个NAC在节点中具有不同且唯一的整数地址，每个节点具有大于节点中NAC个数的不同且唯一的素数地址。连接到节点的每个终端发送具有路由标识符（RI）的帧。不同的RI位于网络表中。当输入NAC接收到帧时，路由算法计算由RI的除法余数由节点地址给出的输出NAC的地址，则该输出NAC将帧发送到其网络链路上。在每个节点中执行该过程，直到达到目标终端。在帧传输期间，RI保持不变。定时器也用于测试帧是否被接收，因为网络链路可能会关闭。在这种情况下，替代的RI用于采取替代路由。

47. 发明授权

US08190862B2 Hardware device for processing the tasks of an algorithm in parallel 失效
标题翻译：用于并行处理算法任务的硬件设备
公开(公告)号：US08190862B2
公开(公告)日：2012-05-29
申请号：US12109001
申请日：2008-04-24
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
IPC分类号： G06F9/30 , G06F9/46 , G06F9/54
CPC分类号： G06F9/30101 , G06F9/3836
摘要： A hardware device for processing the tasks of an algorithm of the type having a number of processes the execution of some of which depend on binary decisions has a plurality of task units (10, 12, 14), each of which are associated with a task defined as being either one process or one decision or one process together with a following decision. A task interconnection logic block (16) is connected to each task unit for communicating actions from a source task unit to a destination task unit. Each task unit includes a processor (18) for processing the steps of the associated task when a received action requests such a processing. A status manager (20) handles actions coming from other task units and builds actions to be sent to other task units.
摘要翻译：一种硬件设备，用于处理具有多个进程数量的处理类型的算法的任务取决于二进制决定的任务具有多个任务单元（10,12,14），每个任务单元与任务相关联定义为一个过程或一个决策或一个过程以及以下决定。任务互连逻辑块（16）连接到每个任务单元，用于将来自源任务单元的操作传送到目的地任务单元。每个任务单元包括处理器（18），用于在接收的动作请求这样的处理时处理相关任务的步骤。状态管理器（20）处理来自其他任务单元的动作，并构建要发送到其他任务单元的动作。

48. 发明申请

US20060112393A1 Hardware device for processing the tasks of an algorithm in parallel 失效
标题翻译：用于并行处理算法任务的硬件设备
公开(公告)号：US20060112393A1
公开(公告)日：2006-05-25
申请号：US11322378
申请日：2006-01-03
申请人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
发明人： Alain Benayoun , Jean-Francois Le Pennec , Patrick Michel , Claude Pin
IPC分类号： G06F9/46
CPC分类号： G06F9/30101 , G06F9/3836
摘要： A hardware device for processing the tasks of an algorithm of the type having a number of processes the execution of some of which depend on binary decisions has a plurality of task units (10, 12, 14), each of which are associated with a task defined as being either one process or one decision or one process together with a following decision. A task interconnection logic block (16) is connected to each task unit for communicating actions from a source task unit to a destination task unit. Each task unit includes a processor (18) for processing the steps of the associated task when a received action requests such a processing. A status manager (20) handles actions coming from other task units and builds actions to be sent to other task units
摘要翻译：一种硬件设备，用于处理具有多个进程数量的处理类型的算法的任务取决于二进制决定的任务具有多个任务单元（10,12,14），每个任务单元与任务相关联定义为一个过程或一个决策或一个过程以及以下决定。任务互连逻辑块（16）连接到每个任务单元，用于将来自源任务单元的操作传送到目的地任务单元。每个任务单元包括处理器（18），用于在接收的动作请求这样的处理时处理相关任务的步骤。状态管理器（20）处理来自其他任务单元的动作，并构建要发送到其他任务单元的动作

49. 发明授权

US06789130B1 Automatic rate adaptation system in a local area network 失效
标题翻译：局域网自动速率调整系统
公开(公告)号：US06789130B1
公开(公告)日：2004-09-07
申请号：US09571681
申请日：2000-05-16
申请人： Alain Benayoun , Jean-Francois Le Pennec , Michel Verhaeghe , Patrick Michel
发明人： Alain Benayoun , Jean-Francois Le Pennec , Michel Verhaeghe , Patrick Michel
IPC分类号： G06F1516
CPC分类号： H04L12/5602
摘要： Automatic speed adaptation system in a Local Area Network (LAN) between a hub (10) including a hub adapter (20, 24, 28) and at least a workstation (12, 14, 16) including a workstation adapter (18, 22, 26) for exchanging data over a link connected between the hub adapter and the workstation adapter at a rate based on a frequency which is inversely proportional to the length of the link. Each adapter comprises a clock generator for generating a clock having a frequency between F1 and F2 and processing means for transmitting at least a check frame from the hub adapter to the workstation adapter at a rate based on a frequency VCLK generated by the clock generator under the control of the processing means and selected as being the frequency corresponding to the length of the link, and for transmitting an acknowledge frame from the workstation adapter to the hub adapter thereby ascertaining that the selected frequency is the right frequency resulting in the best quality of transmission.
摘要翻译：在包括轮毂适配器（20,24,28）的轮毂（10）和至少包括工作站适配器（18,22）的工作站（12,14,16）之间的局域网（LAN）中的自动速度适配系统， 26），用于以基于与链路的长度成反比的频率的速率通过连接在中继适配器和工作站适配器之间的链路交换数据。每个适配器包括用于产生具有F1和F2之间的频率的时钟的时钟发生器和用于以基于由时钟发生器下的时钟发生器产生的频率VCLK的速率从集线器适配器至工作站适配器发送至少一个校验帧的处理装置处理装置的控制并被选择为对应于链路的长度的频率，并且用于将确认帧从工作站适配器发送到集线器适配器，从而确定所选择的频率是合适的频率，从而产生最佳传输质量。

50. 发明授权

US06516319B1 Parallelized processing device for processing search keys based upon tree structure 失效
标题翻译：基于树结构处理搜索键的并行处理设备
公开(公告)号：US06516319B1
公开(公告)日：2003-02-04
申请号：US09569493
申请日：2000-05-11
申请人： Alain Benayoun , Jean-Francois Le Pennec , Claude Pin , Patrick Michel
发明人： Alain Benayoun , Jean-Francois Le Pennec , Claude Pin , Patrick Michel
IPC分类号： G06F1730
CPC分类号： G06F17/30961 , G06F17/3061 , G06F17/30952 , Y10S707/99933
摘要： A device for parallel processing of subtrees within a binary tree for searching for the tree leaf matching a search key. The search is performed at each node by applying a recursive function associated with each node and whose parameters depend on the node for determining which branch, left or right, is to be taken in accordance with the search key. The device includes subtree register blocks for storing the recursive functions, processors for processing the recursive functions, a control unit that assigns one processor to the processing of the recursive functions contained in a block that sent the request to the control unit, and means for selecting subtrees included in the sequence of branches between the root and the leaf defined in accordance with the search key in response to the processing of blocks.
摘要翻译：用于并行处理二进制树中的子树的装置，用于搜索与搜索关键字匹配的树叶。通过应用与每个节点相关联的递归函数并且其参数依赖于该节点来确定将根据搜索关键字被采取左侧或右侧的哪个分支来在每个节点处执行搜索。该装置包括用于存储递归函数的子树寄存器块，用于处理递归函数的处理器，将包含在向控制单元发送请求的块中的递归函数的处理分配给一个处理器的控制单元，以及用于选择子树包括在响应于块的处理的根据搜索关键字定义的根和叶之间的分支序列中。

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