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41. 发明授权

US09039278B2 Ratio meter of a thermal sensor 有权
标题翻译：热传感器的比率计
公开(公告)号：US09039278B2
公开(公告)日：2015-05-26
申请号：US13754151
申请日：2013-01-30
申请人： Mei-Chen Chuang , Jui-Cheng Huang , Alan Roth
发明人： Mei-Chen Chuang , Jui-Cheng Huang , Alan Roth
IPC分类号： G01K7/00 , G01L19/04 , G01R27/02 , G01K1/00
CPC分类号： G01K1/00 , G01K1/02 , G01K7/01 , G01K7/34 , G01K2219/00
摘要： A ratio meter includes a converter circuit, a first counter, a delay circuit, and a second counter. The converter circuit is configured to receive a temperature-independent signal, to convert the received temperature-independent signal into a first frequency signal during a first phase, to receive a temperature-dependent signal, and to convert the temperature-dependent signal into a second frequency signal during a second phase. The first counter is configured to receive the first frequency signal and to generate a control signal by counting a predetermined number of pulses of the first frequency signal count. The delay circuit is configured to delay the control signal for a predetermined time delay. The second counter is configured to receive the second frequency signal and to generate a count value by counting the second frequency signal.
摘要翻译：比率计包括转换器电路，第一计数器，延迟电路和第二计数器。转换器电路被配置为接收温度独立信号，以在第一阶段期间将接收到的与温度无关的信号转换为第一频率信号，以接收依赖于温度的信号，并将温度相关信号转换为第二频率信号频率信号在第二阶段。第一计数器被配置为接收第一频率信号并且通过对预定数量的第一频率信号计数的脉冲进行计数来产生控制信号。延迟电路被配置为延迟控制信号达预定的时间延迟。第二计数器被配置为接收第二频率信号并且通过对第二频率信号进行计数来产生计数值。

42. 发明授权

US08742125B2 Process for the preparation of 2-trifluoromethyl-5-(1-substituted)alkylpyridines 有权
标题翻译： 2-三氟甲基-5-（1-取代）烷基吡啶的制备方法
公开(公告)号：US08742125B2
公开(公告)日：2014-06-03
申请号：US13303182
申请日：2011-11-23
申请人： Gary Alan Roth , Douglas C. Bland , James R. McConnell
发明人： Gary Alan Roth , Douglas C. Bland , James R. McConnell
IPC分类号： C07D213/00
CPC分类号： C07D213/32
摘要： 2-Trifluoromethyl-5-(1-substituted)alkylpyridines of formula (I) wherein R1 and R2 independently represent H, C1-C4 alkyl, or either of R1 or R2 taken together with R3 represent a 4- to 6-membered saturated ring, or R1 taken together with R2 represents a 3- to 6-membered saturated ring optionally substituted with an O or a N atom, R3 represents C1-C4 alkyl or R3 taken together with either of R1 or R2 represent a 4- to 6-membered saturated ring, and X represents CH2, O or S, are produced efficiently and in high yield from an 4-alkoxy-1,1,1-trifluorobut-3-en-2-one (II) wherein R represents a C1-C4 alkyl by condensation with an enamine (III) wherein R1, R2, R3 and X are as previously defined, and R4 and R5 independently represent C1-C8 alkyl, C2-C8 alkenyl, C1-C8 arylalkyl, C1-C8 haloalkyl, C1-C8 alkoxyalkyl, C1-C8 alkylaminoalkyl, aryl or heteroaryl or R4 and R5 taken together with N represent a 5- or 6-membered saturated or unsaturated ring, to provide an intermediate of the formula (IV) wherein R1, R2, R3, R4, R5 and X are as previously defined followed by cyclization in the presence of ammonia or a reagent capable of generating ammonia. Both reactions are performed in the same nonpolar solvent without isolation and purification of intermediates.
摘要翻译：式（I）的2-三氟甲基-5-（1-取代的）烷基吡啶其中R 1和R 2独立地表示H，C 1 -C 4烷基，或者与R 3一起与R 3一起表示4至6元饱和环或者R 1与R 2一起表示任选被O或N原子取代的3至6元饱和环，R 3表示C 1 -C 4烷基或与R 1或R 2中的任一个一起表示的4-至6-元饱和环，通过4-烷氧基-1,1,1-三氟丁-3-烯-2-酮（II）有效且高产率地制备X代表CH 2，O或S的化合物，其中R代表C1- C4烷基，其中R1，R2，R3和X如前定义，并且R4和R5独立地表示C1-C8烷基，C2-C8链烯基，C1-C8芳基烷基，C1-C8卤代烷基，C1 -C 8烷氧基烷基，C 1 -C 8烷基氨基烷基，芳基或杂芳基或R 4和R 5与N一起表示5-或6-元饱和或不饱和环，以提供式（IV）的中间体）其中R 1，R 2，R 3，R 4，R 5和X如前所定义，随后在氨或能产生氨的试剂存在下环化。两种反应都是在相同的非极性溶剂中进行，而不需要分离和纯化中间体。

43. 发明授权

US08547267B2 Idle tone suppression circuit 有权
标题翻译：空闲音抑制电路
公开(公告)号：US08547267B2
公开(公告)日：2013-10-01
申请号：US13481990
申请日：2012-05-29
申请人： Alan Roth , Eric Soenen , Chia Liang Tai
发明人： Alan Roth , Eric Soenen , Chia Liang Tai
IPC分类号： H03M3/00
CPC分类号： G05B11/01 , G01K7/16 , G01K15/005 , G05B15/02 , H03M3/344 , H03M3/458
摘要： A hysteretic digital filter includes a first multi-bit flip-flop having an input for receiving a series of multi-bit sigma-delta ADC codes, a clock input for receiving a clock signal and an output; a second multi-bit flip-flop having an input coupled to the output of the first multi-bit flip-flop, an output for providing an output code of the digital filter, and an input for receiving a latch control signal, the second multi-bit flip-flop latching its input to its output under control of the latch control signal; and a control circuit. The control circuit is configured to selectively provide the latch control signal to trigger latching by the second multi-bit flip-flop dependent on a running comparison of the output code of the digital filter and the value of individual ones of the multi-bit sigma-delta ADC codes from the series of multi-bit sigma-delta ADC codes.
摘要翻译：迟滞数字滤波器包括具有用于接收一系列多比特Σ-ΔADC码的输入的第一多位触发器，用于接收时钟信号和输出的时钟输入; 具有耦合到第一多位触发器的输出的输入的第二多位触发器，用于提供数字滤波器的输出码的输出和用于接收锁存控制信号的输入，第二多位触发器位触发器在锁存控制信号的控制下将其输入锁存到其输出端; 和控制电路。控制电路被配置为根据数字滤波器的输出代码的运行比较和多比特Σ-位触发器的各个值的选择性地提供锁存控制信号以触发第二多位触发器的锁存，来自多位Σ-ΔADC代码的Delta ADC代码。

44. 发明授权

US08519684B2 Integrated circuits for converting a high voltage level to a low voltage level 有权
标题翻译：用于将高电压电平转换为低电压电平的集成电路
公开(公告)号：US08519684B2
公开(公告)日：2013-08-27
申请号：US12877535
申请日：2010-09-08
申请人： Mei-Chen Chuang , Alan Roth
发明人： Mei-Chen Chuang , Alan Roth
IPC分类号： G05F1/40
CPC分类号： H02M3/158 , G05F1/462 , H02M3/157 , H02M3/1588 , H05B33/0815 , Y02B70/1466
摘要： An integrated circuit includes a high side driver and a low side driver. The low side driver is electrically coupled with the high side driver. A circuit is electrically coupled with the high side driver and a first node between the high side driver and the low side driver. The circuit is configured to substantially turn off the high side driver if the high side driver leaves a cutoff region of the high side driver during a tri-state mode.
摘要翻译：集成电路包括高侧驱动器和低侧驱动器。低侧驱动器与高侧驱动器电耦合。电路与高侧驱动器和高侧驱动器和低侧驱动器之间的第一节点电耦合。如果高侧驱动器在三态模式期间离开高侧驱动器的截止区域，则该电路被配置为基本上关闭高侧驱动器。

45. 发明申请

US20130135131A1 IDLE TONE SUPPRESSION CIRCUIT 有权
标题翻译：空闲音抑制电路
公开(公告)号：US20130135131A1
公开(公告)日：2013-05-30
申请号：US13481990
申请日：2012-05-29
申请人： Chia Liang Tai , Alan ROTH , Eric SOENEN
发明人： Chia Liang Tai , Alan ROTH , Eric SOENEN
IPC分类号： H03M3/02
CPC分类号： G05B11/01 , G01K7/16 , G01K15/005 , G05B15/02 , H03M3/344 , H03M3/458
摘要： A hysteretic digital filter includes a first multi-bit flip-flop having an input for receiving a series of multi-bit sigma-delta ADC codes, a clock input for receiving a clock signal and an output; a second multi-bit flip-flop having an input coupled to the output of the first multi-bit flip-flop, an output for providing an output code of the digital filter, and an input for receiving a latch control signal, the second multi-bit flip-flop latching its input to its output under control of the latch control signal; and a control circuit. The control circuit is configured to selectively provide the latch control signal to trigger latching by the second multi-bit flip-flop dependent on a running comparison of the output code of the digital filter and the value of individual ones of the multi-bit sigma-delta ADC codes from the series of multi-bit sigma-delta ADC codes.
摘要翻译：迟滞数字滤波器包括具有用于接收一系列多比特Σ-ΔADC码的输入的第一多位触发器，用于接收时钟信号和输出的时钟输入; 具有耦合到第一多位触发器的输出的输入的第二多位触发器，用于提供数字滤波器的输出码的输出和用于接收锁存控制信号的输入，第二多位触发器位触发器在锁存控制信号的控制下将其输入锁存到其输出端; 和控制电路。控制电路被配置为根据数字滤波器的输出代码的运行比较和多比特Σ-位触发器的各个值的选择性地提供锁存控制信号以触发第二多位触发器的锁存，来自多位Σ-ΔADC代码的Delta ADC代码。

46. 发明申请

US20130009795A1 NOISE SHAPING FOR DIGITAL PULSE-WIDTH MODULATORS 有权
标题翻译：数字脉冲宽度调制器的噪声形状
公开(公告)号：US20130009795A1
公开(公告)日：2013-01-10
申请号：US13619034
申请日：2012-09-14
申请人： Eric SOENEN , Alan ROTH , Martin KINYUA , Justin SHI , Justin GAITHER
发明人： Eric SOENEN , Alan ROTH , Martin KINYUA , Justin SHI , Justin GAITHER
IPC分类号： H03M3/02 , H03M1/12
CPC分类号： H03M3/344 , H03H17/00 , H03M3/00 , H03M3/464
摘要： A circuit including an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a noise shaper. The noise shaper is configured to truncate the digital output and generate a noise shaper output having a lower number of bits than the digital output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC). The PWM DAC configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output.
摘要翻译：包括模数转换器（ADC）的电路。 ADC配置为接收模拟反馈信号和模拟输入信号并产生数字输出。电路还包括噪声整形器。噪声整形器被配置为截断数字输出并产生具有比数字输出低的位数的噪声整形器输出，并且形成在截断期间产生的量化噪声。电路还包括脉宽调制数模转换器（PWM DAC）。 PWM DAC被配置为处理噪声整形器输出的截断数字输出并产生PWM DAC输出。

47. 发明授权

US08338596B2 Process for the preparation of 5-substituted-8-alkoxy[1,2,4]triazolo[1,5-c]pyrimidin-2-amines 有权
公开(公告)号：US08338596B2
公开(公告)日：2012-12-25
申请号：US13325809
申请日：2011-12-14
申请人： Craig Bott , Christopher T. Hamilton , Gary Alan Roth
发明人： Craig Bott , Christopher T. Hamilton , Gary Alan Roth
IPC分类号： C07D487/04
CPC分类号： C07D487/04
摘要： 5-Substituted-8-alkoxy[1,2,4]triazolo[1,5-c]pyrimidin-2-amines are manufactured from 2-substituted-4-amino-5-methoxypyrimidines in a process that avoids hydrazine and cyanogen halide.

48. 发明申请

US20120133345A1 HYSTERETIC POWER CONVERTER WITH CALIBRATION CIRCUIT 有权
标题翻译：带校准电路的恒功率转换器
公开(公告)号：US20120133345A1
公开(公告)日：2012-05-31
申请号：US12956630
申请日：2010-11-30
申请人： Chia-Liang TAI , Alan ROTH , Eric SOENEN
发明人： Chia-Liang TAI , Alan ROTH , Eric SOENEN
IPC分类号： G05F1/10
CPC分类号： G05F1/575 , G01R1/203 , G05F1/00 , G05F1/10 , G05F1/40 , G05F1/56 , H02M3/156
摘要： A hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage. The calibration circuit is configured to supply a calibrated voltage to the comparator. The comparator controls the output voltage based on the calibrated voltage and a feedback voltage representing at least a portion of the output voltage.
摘要翻译：迟滞功率转换器包括比较器，校准电路和具有输出电压的输出节点。校准电路被配置为向比较器提供经校准的电压。比较器基于校准的电压和表示输出电压的至少一部分的反馈电压来控制输出电压。

49. 发明申请

US20120038340A1 DYNAMIC CONTROL LOOP FOR SWITCHING REGULATORS 有权
标题翻译：用于切换调节器的动态控制环
公开(公告)号：US20120038340A1
公开(公告)日：2012-02-16
申请号：US12856918
申请日：2010-08-16
申请人： Justin SHI , Alan ROTH , Justin GAITHER , Eric SOENEN
发明人： Justin SHI , Alan ROTH , Justin GAITHER , Eric SOENEN
IPC分类号： G05F1/10
CPC分类号： H02M3/04 , H02M3/156 , H02M2001/0032 , Y02B70/16
摘要： Some embodiments regard a method of controlling a regulator having an input voltage and an output voltage, comprising: turning on a first driver; determining a duration ratio having a first time period over the first time period and a second time period; the first time period and the second time period indicating a duration when the first driver and a second driver is on, respectively; generating a second voltage level for the reference voltage based on the duration ratio and a ripple voltage that is a difference between a high threshold voltage and a low threshold voltage; turning off the first driver and turning on the second driver based on a relationship between the second voltage level and a voltage level of the output voltage; turning off the second driver when a current flowing through a node of the output voltage reaches a pre-determined level; and generating a change in the first time period based on the duration ratio and a voltage difference between a peak of the output voltage and the high threshold voltage.
摘要翻译：一些实施例涉及一种控制具有输入电压和输出电压的调节器的方法，包括：打开第一驱动器; 确定在所述第一时间段和第二时间段内具有第一时间段的持续时间比; 所述第一时间段和所述第二时间段分别指示所述第一驾驶员和所述第二驾驶员开启时的持续时间; 基于持续时间比产生用于参考电压的第二电压电平，以及纹波电压，其是高阈值电压和低阈值电压之间的差; 基于第二电压电平和输出电压的电压电平之间的关系，关闭第一驱动器并接通第二驱动器; 当流过输出电压的节点的电流达到预定电平时，关闭第二驱动器; 以及基于所述持续时间比和所述输出电压的峰值与所述高阈值电压之间的电压差来产生所述第一时间段的变化。

50. 发明申请

US20100259239A1 REGULATOR CONTROL CIRCUITS, SWITCHING REGULATORS, SYSTEMS, AND METHODS FOR OPERATING SWITCHING REGULATORS 有权
标题翻译：调节器控制电路，开关稳压器，系统和操作开关稳压器的方法
公开(公告)号：US20100259239A1
公开(公告)日：2010-10-14
申请号：US12750149
申请日：2010-03-30
申请人： Justin SHI , Alan ROTH , Eric SOENEN
发明人： Justin SHI , Alan ROTH , Eric SOENEN
IPC分类号： G05F1/10
CPC分类号： H02M1/08 , H02M3/07
摘要： A regulator control circuit includes a high side driver that is configured to receive a supply voltage. A capacitor is configured to store charges. A first transistor is coupled between the capacitor at a first node and a gate of a high side driver at a second node. The first node is capable of being boosted to a voltage to operate the first transistor at a saturation mode for a charge sharing between the first node and the second node so as to substantially turn on the high side driver.
摘要翻译：调节器控制电路包括被配置为接收电源电压的高侧驱动器。配置电容器来存储电荷。第一晶体管耦合在第一节点处的电容器和第二节点处的高侧驱动器的栅极之间。第一节点能够被升压到电压以在饱和模式下操作第一晶体管，用于在第一节点和第二节点之间的电荷共享，以便基本上接通高侧驱动器。

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