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31. 发明申请

US20040201446A1 Conductive substrate with resistance layer, resistance board, and resistance circuit board 失效
标题翻译：具有电阻层，电阻板和电阻电路板的导电基板
公开(公告)号：US20040201446A1
公开(公告)日：2004-10-14
申请号：US10819929
申请日：2004-04-08
发明人： Akira Matsuda , Yuuji Suzuki , Hideo Otsuka , Yuuki Kikuchi , Sadao Matsumoto
IPC分类号： H01C001/012
CPC分类号： H01C17/065 , H05K1/167 , H05K3/384 , H05K2201/0355 , H05K2203/0361 , H05K2203/0723
摘要： A conductive substrate with a resistance layer comprising a substantially flat high conductivity substrate roughening treated on its surface by a resistance component and provided with a resistance layer by the resistance component so as to enable the interface between the high conductivity substrate and resistance component layer to be substantially flattened, enable acquisition of a thin film resistance layer with a stable resistance after dissolving away the high conductivity substrate, and able to maintain the peel strength with the insulating support, and a resistance board using the same.
摘要翻译：一种具有电阻层的导电性基板，其特征在于，具有通过电阻部件在其表面上被电阻成分处理的基本平坦的高导电性基板粗糙化，并且通过所述电阻部件设置有电阻层，使得能够使高导电性基板和电阻成分层之间的界面成为基本平坦化，能够在剥离高导电性基材后能够获得具有稳定电阻的薄膜电阻层，并且能够与绝缘支撑体一起保持剥离强度，以及使用其的电阻板。

32. 发明申请

US20040150507A1 High value split poly p-resistor with low standard deviation 失效
标题翻译：具有低标准偏差的高值分离聚磷酸电阻
公开(公告)号：US20040150507A1
公开(公告)日：2004-08-05
申请号：US10355317
申请日：2003-01-31
发明人： James Michael Olson
IPC分类号： H01C001/012
CPC分类号： H01L28/20 , H01L21/8249 , H01L27/0635 , H01L27/0802
摘要： A resistor structure is disclosed that is constructed out of two layers of polysilicon. The intrinsic device is made using the top layer which is either a dedicated deposition, or formed as part of an existing process step such as a base epi growth in a BiCMOS flow. This poly layer can be made with a relatively high (greater than 2000 ohms per square) sheet resistance by appropriate scaling of the implant dose or by insitu doping methods. In this invention this layer is arranged to be about 1000 A or less thick. Such a resistor form with this thickness has been shown to demonstrate a better standard; deviation of resistance compared to resistors made with a thicker layer. Additionally, practical resistors made in elongated forms demonstrate better standard deviations of resistance when five bends were incorporated into the form. The resistor ends are formed by the addition of a bottom poly layer in a self aligned manner with a deposition that may already be part of the process sequence. The end result is that the intrinsic resistor body is formed of a single poly layer, while the ends are created out of two layers. These ends are thick enough so that standard silicide and contact etch processing may be added to the structure without special care. In addition, dedicated or already available implants may be incorporated into the resistor ends to ensure ohmic contacts from polysilicon to the silicide or the contact metal are achieved. These steps can produce an easily fabricated resistor structure with consistent, low resistance, ohmic end contacts, and intrinsic resistance of greater than 2000 ohms per square.
摘要翻译：公开了由两层多晶硅构成的电阻器结构。本征器件是使用作为专用沉积的顶层制成的，或者形成为现有工艺步骤的一部分，例如BiCMOS流中的底部epi生长。可以通过适当缩放植入剂量或通过本征掺杂方法，以相对较高（大于2000欧姆/平方）的薄层电阻制造该多层。在本发明中，该层被设置为约1000或更小。已经显示出具有该厚度的这种电阻器形式表现出更好的标准; 电阻偏差与用较厚层制成的电阻相比。另外，用细长形式制成的实际电阻器在五个弯头并入表格时表现出更好的电阻标准偏差。电阻器端通过以自对准的方式添加底部多层形成，其中沉积可能已经是处理顺序的一部分。最终结果是固有电阻体由单个多晶层形成，而端部由两层构成。这些端部足够厚，使得可以在没有特别小心的情况下将标准硅化物和接触蚀刻处理添加到结构中。此外，可以将专用或已经可用的植入物结合到电阻器端部中以确保实现从多晶硅到硅化物或接触金属的欧姆接触。这些步骤可以产生容易制造的电阻器结构，具有一致，低电阻，欧姆端触点和大于2000欧姆每平方的固有电阻。

33. 发明申请

US20040130434A1 Method of fabrication of MIMCAP and resistor at same level 有权
标题翻译： MIMCAP和电阻器制造方法相同
公开(公告)号：US20040130434A1
公开(公告)日：2004-07-08
申请号：US10336992
申请日：2003-01-06
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Anil K. Chinthakindi , Shwu-Jen Jeng , Michael F. Lofaro , Christopher M. Schnabel , Kenneth J. Stein
IPC分类号： H01C001/012
CPC分类号： H01L28/20 , H01L23/5223 , H01L27/0802 , H01L27/0805 , H01L28/40 , H01L2924/0002 , Y10S438/97 , Y10T29/49082 , Y10T29/49155 , H01L2924/00
摘要： A method is disclosed of fabricating a MIMCAP (a capacitor (CAP) formed by successive layers of metal, insulator, metal (MIM)) and a thin film resistor at the same level. A method is also disclosed of fabricating a MIMCAP and a thin film resistor at the same level, and a novel integration scheme for BEOL (back-end-of-line processing) thin film resistors which positions them closer to FEOL (front-end-of-line processing) devices.
摘要翻译：公开了制造MIMCAP（由金属，绝缘体，金属（MIM）的连续层形成的电容器（CAP））和同一水平的薄膜电阻器的方法。还公开了制造相同水平的MIMCAP和薄膜电阻器的方法，以及用于BEOL（后端处理）薄膜电阻器的新颖的集成方案，使它们更接近FEOL（前端 - 线上处理）设备。

34. 发明申请

US20040080397A1 Method of protecting a thick film resistor 审中-公开
标题翻译：保护厚膜电阻的方法
公开(公告)号：US20040080397A1
公开(公告)日：2004-04-29
申请号：US10280197
申请日：2002-10-25
发明人： Mike Cubon , Jose A. Martinez , Ksawera Saletnik
IPC分类号： H01C001/012 , H01C010/30
CPC分类号： H01C1/028 , H01C17/06 , H05K1/095 , H05K1/167 , H05K3/28 , H05K2203/1453
摘要： A method of protecting a thick film resistor, including the steps of: providing a substrate having a plurality of conductive elements thereon; applying an electrically resistive material to a surface of the substrate, thereby forming the thick film resistor, the resistive material being electrically connected to at least one corresponding conductive element; curing the resistive material; and applying a coating over at least a substantial portion of the resistive material.
摘要翻译：一种保护厚膜电阻器的方法，包括以下步骤：提供其上具有多个导电元件的基板; 将电阻材料施加到所述基板的表面，由此形成所述厚膜电阻器，所述电阻材料电连接到至少一个对应的导电元件; 固化电阻材料; 以及在所述电阻材料的至少大部分上施加涂层。

35. 发明申请

US20040041688A1 FLIP CHIP RESISTOR AND ITS MANUFACTURING METHOD 有权
标题翻译： FLIP芯片电阻及其制造方法
公开(公告)号：US20040041688A1
公开(公告)日：2004-03-04
申请号：US10233184
申请日：2002-09-03
发明人： Leonid Akhtman , Sakaev Matvey
IPC分类号： H01C001/012
CPC分类号： H01C7/003 , H01C1/142 , H01C17/006 , H01C17/281 , Y10T29/49082 , Y10T29/49098 , Y10T29/49099
摘要： The present invention provides for a flip chip resistor having a substrate having opposite ends, a pair of electrodes formed from a first electrode layer disposed on the opposite ends of the substrate, a resistance layer electrically connecting the pair of electrodes, a protective layer overlaying the resistance layer, and a second electrode layer overlaying the first electrode layer and at least a portion of the protective layer. The present invention provides for higher reliability performance and enlarging the potential soldering area despite small chip size. A method of the present invention provides for manufacturing flip chip resistors by applying a first electrode layer to a substrate to create at least one pair of opposite electrodes, applying a resistance layer between each pair of opposite electrodes; applying a first protective layer at least partially overlaying the resistance layer, applying a second protective layer at least partially overlaying at least a portion of the resistance layer, and applying a second electrode layer overlaying the first electrode layer and at least a portion of the second protective layer.
摘要翻译：本发明提供一种具有相对端的衬底的倒装芯片电阻器，由设置在衬底的相对端上的第一电极层形成的一对电极，电连接该对电极的电阻层，覆盖电阻层和覆盖第一电极层和保护层的至少一部分的第二电极层。尽管芯片尺寸小，本发明提供了更高的可靠性性能和扩大了潜在的焊接区域。本发明的方法提供了制造倒装芯片电阻器，通过向基片施加第一电极层以产生至少一对相对电极，在每对相对电极之间施加电阻层; 施加至少部分地覆盖所述电阻层的第一保护层，施加至少部分覆盖所述电阻层的至少一部分的第二保护层，以及施加覆盖所述第一电极层的第二电极层和所述第二电极层的至少一部分保护层。

36. 发明申请

US20030090361A1 Leadframe resistance device and process for the same 审中-公开
公开(公告)号：US20030090361A1
公开(公告)日：2003-05-15
申请号：US10229494
申请日：2002-08-27
发明人： Steven Liu , Horng-Yih Juang , Yih-Wen Shiao , Cheng-Er Fan
IPC分类号： H01C001/012 , H01C017/00
CPC分类号： H01C17/28 , H01C1/012 , H01C1/14 , Y10T29/49082 , Y10T29/49121
摘要： A leadframe resistance structure comprises: at least a resistance foil; a plurality of leads, each of the plurality of leads respectively having a first lead surface and an opposite second lead surface, wherein the resistance foil is disposed on the first lead surface of the leads and connected to the leads; and an encapsulating material that encapsulates the resistance foil, and a portion of the first surface of the leads.

37. 发明申请

US20030090360A1 Leadframe resistance device and process for the same 审中-公开
标题翻译：引线框电阻器件和工艺相同
公开(公告)号：US20030090360A1
公开(公告)日：2003-05-15
申请号：US09990863
申请日：2001-11-13
发明人： Steven Liu , Horng-Yih Juang , Yih-Wen Shiao , Cheng-Er Fan
IPC分类号： H01C001/012
CPC分类号： H01C17/28 , H01C1/012 , H01C1/14 , Y10T29/49082 , Y10T29/49121
摘要： A leadframe resistance structure comprises: at least a resistance foil; a plurality of leads, each of the plurality of leads respectively having a first lead surface and an opposite second lead surface, wherein the resistance foil is disposed on the first lead surface of the leads and connected to the leads; and an encapsulating material that encapsulates the resistance foil, and a portion of the first surface of the leads.
摘要翻译：引线框电阻结构包括：至少一个电阻箔; 所述多个引线中的每一个分别具有第一引线表面和相对的第二引线表面，其中所述电阻箔布置在所述引线的所述第一引线表面上并连接到所述引线; 以及封装电阻箔的封装材料和引线的第一表面的一部分。

38. 发明申请

US20030016118A1 Resistors 审中-公开
标题翻译：电阻器
公开(公告)号：US20030016118A1
公开(公告)日：2003-01-23
申请号：US10150609
申请日：2002-05-17
申请人： Shipley Company, L.L.C.
发明人： John Schemenaur , David D. Senk
IPC分类号： H01C001/012
CPC分类号： H05K1/167 , H01C7/006 , H01C17/075 , H01C17/08 , H05K2201/0317 , H05K2201/0355 , H05K2201/0391 , H05K2203/0361 , H05K2203/0723
摘要： Resistors having a resistive material portion including multiple layers or resistive materials, wherein each layer of resistive material has a different sheet resistivity, are provided by the present invention. Such resistors are particularly useful as embedded resistors in the manufacture of printed wiring boards. Methods of preparing such resistors are also provided.
摘要翻译：具有电阻材料部分的电阻器包括多层或电阻材料，其中每层电阻材料具有不同的薄层电阻率，由本发明提供。这种电阻器在制造印刷电路板时作为嵌入式电阻器特别有用。还提供了制备这种电阻器的方法。

39. 发明申请

US20020145503A1 Method for tantalum pentoxide moisture barrier in film resistors 失效
标题翻译：薄膜电阻中五氧化二钽水分阻挡层的方法
公开(公告)号：US20020145503A1
公开(公告)日：2002-10-10
申请号：US09829169
申请日：2001-04-09
发明人： Stephen C. Vincent
IPC分类号： H01C001/012 , C23C014/32
CPC分类号： H01C17/12 , H01C7/006
摘要： The present invention discloses a method of manufacturing a thin film resistor with a moisture barrier by depositing a metal film layer on a substrate and depositing a layer of tantalum pentoxide film overlaying the metal film layer. The present invention also includes a thin film resistor having a substrate; a metal film layer attached to the substrate; and a tantalum pentoxide layer overlaying the metal film layer, the tantalum pentoxide layer providing a barrier to moisture, the tantalum pentoxide layer not overlaid by an oxidation process.
摘要翻译：本发明公开了一种通过在衬底上沉积金属膜层并沉积覆盖金属膜层的五氧化二钽膜层来制造具有防潮层的薄膜电阻器的方法。本发明还包括具有基板的薄膜电阻器; 附着在基板上的金属膜层; 和覆盖金属膜层的五氧化二钽层，五氧化二钽层对水分提供屏障，五氧化二钽层未被氧化过程覆盖。

40. 发明申请

US20020130759A1 Surface mounted resistor 有权
标题翻译：表面安装电阻
公开(公告)号：US20020130759A1
公开(公告)日：2002-09-19
申请号：US09810207
申请日：2001-03-16
发明人： Joseph Szwarc , Ilya Aronson
IPC分类号： H01C001/012
CPC分类号： H01C7/06 , H01C1/016
摘要： A precision surface mounted foil resistor has a substrate having top and bottom planar surfaces. A resistance foil is secured to the bottom surface of the substrate and extends over the bottom. A bending protector plate of non-conductive material is superimposed over the resistance foil. A solder material is located at two areas of the foil to provide electrical contact with the PCB. The bending protector element is thicker than the solder contact areas and is provided between the solder material.
摘要翻译：精密表面安装箔电阻器具有具有顶部和底部平坦表面的基板。电阻箔固定到基底的底表面并且在底部上延伸。非导电材料的弯曲保护板叠加在电阻箔上。焊料材料位于箔的两个区域以提供与PCB的电接触。弯曲保护器元件比焊料接触区域厚，并且设置在焊料材料之间。

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