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31. 发明授权

US07875840B2 Imager device with anti-fuse pixels and recessed color filter array 有权
标题翻译：具有反熔丝像素和凹陷式滤色器阵列的成像仪器件
公开(公告)号：US07875840B2
公开(公告)日：2011-01-25
申请号：US11600206
申请日：2006-11-16
申请人： Jutao Jiang , Chen Xu
发明人： Jutao Jiang , Chen Xu
IPC分类号： H01L27/00
CPC分类号： H04N5/335 , H01L27/14621 , H01L27/14627 , H01L27/14685 , H04N9/045
摘要： An imager device having a recessed color filter array formed in a trench of a material layer above a pixel array. Light-sensitive pixels are formed in the center area of the array, while non-light-sensitive pixels are formed in a buffer region adjacent the light-sensitive pixels and beneath an area of the color filter array having a non-uniform thickness. The non-light-sensitive pixels may be anti-fuse pixels functioning as individual, programmable memory cells, thereby providing in-pixel memory for the imager device.
摘要翻译：一种具有形成在像素阵列上方的材料层的沟槽中的凹陷式滤色器阵列的成像器件。感光像素形成在阵列的中心区域中，而非感光像素形成在与感光像素相邻的缓冲区域中并且在具有不均匀厚度的滤色器阵列的区域之下。非感光像素可以是用作单独的可编程存储器单元的反熔丝像素，从而为成像器装置提供像素内存。

32. 发明申请

US20070272828A1 Method and apparatus providing dark current reduction in an active pixel sensor 审中-公开
标题翻译：在有源像素传感器中提供暗电流降低的方法和装置
公开(公告)号：US20070272828A1
公开(公告)日：2007-11-29
申请号：US11439180
申请日：2006-05-24
申请人： Chen Xu
发明人： Chen Xu
IPC分类号： H01L27/00
CPC分类号： H04N5/37452 , H01L27/14609 , H04N5/361
摘要： An imager has one or more pixel circuits arranged to receive negatively biased control signals at one or more gates associated with charge holding regions to reduce dark current generation and flow.
摘要翻译：成像器具有一个或多个像素电路，其布置成在与电荷保持区域相关联的一个或多个栅极处接收负偏置的控制信号，以减少暗电流产生和流动。

33. 发明申请

US20070041612A1 Apparatus, method and system for screening receptacles and persons, having image distortion correction functionality 有权
标题翻译：用于屏蔽插座和人员的装置，方法和系统，具有图像失真校正功能
公开(公告)号：US20070041612A1
公开(公告)日：2007-02-22
申请号：US11431627
申请日：2006-05-11
申请人： Luc Perron , Michel Bouchard , Chen Xu , Sebastien Roy , Alain Bergeron
发明人： Luc Perron , Michel Bouchard , Chen Xu , Sebastien Roy , Alain Bergeron
IPC分类号： G06K9/00 , G06K9/40
CPC分类号： G06K9/746 , G06K9/28 , G06K9/3241 , G06K2209/09
摘要： An apparatus suitable for screening a receptacle. The apparatus comprises an input for receiving an image signal, the image signal conveying an input image related to contents of the receptacle, the image signal having been produced by a device that is characterized by introducing distortion into the input image. The apparatus also comprises a processing unit operative for: applying a distortion correction process to the image signal to remove at least part of the distortion from the input image, thereby to generate a corrected image signal conveying at least one corrected image; processing the corrected image signal in combination with a plurality of data elements associated with a plurality of target objects in an attempt to detect a presence of at least one of said target objects in the receptacle; and generating a detection signal in response to detection of the presence of at least one of said target objects in the receptacle.
摘要翻译：适用于筛选容器的装置。所述装置包括用于接收图像信号的输入，所述图像信号传送与所述插座的内容相关的输入图像，所述图像信号已由特征在于将失真引入所述输入图像的设备产生。该装置还包括处理单元，其操作用于：对图像信号应用失真校正处理，以从输入图像中去除至少一部分失真，从而产生传送至少一个校正图像的校正图像信号; 处理校正图像信号与多个与多个目标对象相关联的数据元素的组合，以试图检测存储器中至少一个所述目标对象的存在; 以及响应于所述容器中至少一个所述目标物体的存在的检测而产生检测信号。

34. 发明申请

US20060180743A1 Ultra low voltage CMOS image sensor architecture 有权
标题翻译：超低电压CMOS图像传感器架构
公开(公告)号：US20060180743A1
公开(公告)日：2006-08-17
申请号：US11340676
申请日：2006-01-27
申请人： Man Sun Chan , Chen Xu , Wing Ki
发明人： Man Sun Chan , Chen Xu , Wing Ki
IPC分类号： H01L27/00
CPC分类号： H01L27/14632 , H01L27/14612 , H01L27/14643
摘要： An optical sensor has at least one pixel that generates an output voltage that changes at a rate dependent on the light intensity incident on the pixel. The time for the pixel output voltage to change from a first predefined level to a second predefined level is measured, so as to produce an output indicative of the incident light intensity.
摘要翻译：光学传感器具有产生以取决于入射在像素上的光强度的速率变化的输出电压的至少一个像素。测量像素输出电压从第一预定电平变为第二预定电平的时间，以产生表示入射光强度的输出。

35. 发明申请

US20050249968A1 Whisker inhibition in tin surfaces of electronic components 审中-公开
标题翻译：电子元件锡表面的晶须抑制
公开(公告)号：US20050249968A1
公开(公告)日：2005-11-10
申请号：US10838571
申请日：2004-05-04
申请人： Chen Xu , Yun Zhang , Chonglun Fan , Oscar Khaselev , Joseph Abys
发明人： Chen Xu , Yun Zhang , Chonglun Fan , Oscar Khaselev , Joseph Abys
IPC分类号： A01N59/00 , A61L2/18 , B23P9/00 , B32B15/01 , C09K3/00 , C25D5/10 , C25D5/12 , G06Q99/00 , H01G4/228 , H01L23/495
CPC分类号： H01G4/228 , A01N59/00 , A61L2/18 , B32B15/01 , C25D5/10 , C25D5/12 , G06Q99/00 , H01L23/49582 , H01L24/48 , H01L24/49 , H01L2224/48247 , H01L2224/49171 , H01L2924/00014 , H01L2924/01078 , H01L2924/01327 , H01L2924/14 , H01L2924/15747 , H01L2924/181 , H01L2924/19041 , Y10T428/12715 , Y10T428/12722 , A01N2300/00 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A method for reducing whisker formation in tin coatings over metal features of electronic components. The tin coating has internal tensile stress and is between about 0.5 μm and about 4.0 μm in thickness.
摘要翻译：一种减少锡涂层中电晶元件金属特征的晶须形成的方法。锡涂层具有内部拉伸应力，厚度在约0.5μm至约4.0μm之间。

36. 发明申请

US20190220843A1 MOBILE DEVICE PAYMENT SYSTEM AND METHOD 审中-公开
公开(公告)号：US20190220843A1
公开(公告)日：2019-07-18
申请号：US15874569
申请日：2018-01-18
申请人： Sanjeev Kaithvas , Karthik Venkataraman , Daya Venkatesan , Ashok Babu Mundru , Chen Xu
发明人： Sanjeev Kaithvas , Karthik Venkataraman , Daya Venkatesan , Ashok Babu Mundru , Chen Xu
IPC分类号： G06Q20/32 , G06Q20/02 , G06Q20/38
CPC分类号： G06Q20/3226 , G06Q20/02 , G06Q20/3821 , G06Q30/0226
摘要： A payment system may intelligently monitor text conversations on other applications or a user's email system. Users and participating merchants may enroll credit cards or other payment devices, bank accounts, etc., with the payment system. Once enrolled, a daemon/plugin of the payment system may monitor text applications, emails, or other communication means of the mobile computing device. Using Artificial Intelligence (AI) and Machine Learning algorithms, the payment system may determine payment information from a text or other communication, and initiate and/or complete a payment transaction between the communicating parties. Upon confirmation, the payment system may complete the funds transfer or payment to registered users or merchants in the text communication. The payment system may also integrate with a merchant's loyalty and reward programs and use these loyalty/reward points as forms of payment.

37. 发明授权

US08543964B2 Constraint optimization of sub-net level routing in asic design 有权
标题翻译：亚网设计中子网路由的约束优化
公开(公告)号：US08543964B2
公开(公告)日：2013-09-24
申请号：US13280146
申请日：2011-10-24
申请人： Liang Ge , Xia Li , Jia Lian Tang , Xiao Feng Tang , Chen Xu
发明人： Liang Ge , Xia Li , Jia Lian Tang , Xiao Feng Tang , Chen Xu
IPC分类号： G06F17/50
CPC分类号： G06F17/5077 , G06F17/5031 , G06F2217/84
摘要： Functionality can be implemented for optimizing connection constraints in an integrated circuit design. A target timing path associated with a first of a plurality of sub-connections of the integrated circuit is determined. A timing probability value and a route probability value associated with the first of the plurality of sub-connections is determined based, at least in part, on the target timing path associated with the first of the plurality of sub-connections. The timing probability value indicates a probability that timing closure is satisfied on the target timing path. The route probability value indicates a probability that a physical routing track on the target timing path associated with the first of the plurality of sub-connections resolves congestion. A current connection constraint associated with the first of the plurality of sub-connections is modified in accordance with a connection constraint model to which the first of the plurality of sub-connections corresponds.
摘要翻译：可以实现功能，以优化集成电路设计中的连接约束。确定与集成电路的多个子连接中的第一个相关联的目标定时路径。至少部分地基于与多个子连接中的第一个相关联的目标定时路径来确定与多个子连接中的第一个子连接相关联的定时概率值和路线概率值。定时概率值表示在目标定时路径上满足定时闭合的概率。路由概率值指示与多个子连接中的第一个相关联的目标定时路径上的物理路由轨迹解决拥塞的概率。与多个子连接中的第一个连接相关联的当前连接约束根据多个子连接中的第一个子连接对应的连接约束模型进行修改。

38. 发明申请

US20120293047A1 Large-scale Fabrication of Vertically Aligned ZnO Nanowire Arrays 有权
标题翻译：垂直对准的ZnO纳米线阵列的大规模制造
公开(公告)号：US20120293047A1
公开(公告)日：2012-11-22
申请号：US13473867
申请日：2012-05-17
申请人： Zhong Lin Wang , Youfan Hu , Yan Zhang , Chen Xu , Guang Zhu
发明人： Zhong Lin Wang , Youfan Hu , Yan Zhang , Chen Xu , Guang Zhu
IPC分类号： H02N2/18 , H01L41/18 , B82Y15/00 , B82Y40/00
CPC分类号： H02N2/18 , B82Y5/00 , B82Y30/00 , B82Y40/00 , H01L27/20 , H01L41/113 , H01L41/317 , H01L41/319 , H02N2/181 , H02N2/186
摘要： A generator includes a substrate, a first electrode layer, a dense plurality of vertically-aligned piezoelectric elongated nanostructures, an insulating layer and a second electrode layer. The substrate has a top surface and the first electrode layer is disposed on the top surface of the substrate. The dense plurality of vertically-aligned piezoelectric elongated nanostructures extends from the first electrode layer. Each of the nanostructures has a top end. The insulating layer is disposed on the top ends of the nanostructures. The second electrode layer is disposed on the non-conductive layer and is spaced apart from the nanostructures.
摘要翻译：发电机包括衬底，第一电极层，密集多个垂直排列的压电细长纳米结构，绝缘层和第二电极层。衬底具有顶表面，并且第一电极层设置在衬底的顶表面上。密集的多个垂直排列的压电细长纳米结构从第一电极层延伸。每个纳米结构具有顶端。绝缘层设置在纳米结构的顶端。第二电极层设置在非导电层上并与纳米结构间隔开。

39. 发明授权

US08274005B2 Keypad assembly 有权
标题翻译：键盘装配
公开(公告)号：US08274005B2
公开(公告)日：2012-09-25
申请号：US12713884
申请日：2010-02-26
申请人： Chao Chen , Chen Xu
发明人： Chao Chen , Chen Xu
IPC分类号： H01H13/06
CPC分类号： H01H13/86 , H01H2209/01 , H01H2219/062 , H01H2223/002 , H01H2229/046 , H01H2233/04
摘要： A keypad assembly is described herein in which the keypad assembly includes a substrate and a plurality of domes positioned on the substrate and configured to translate operator action into a corresponding input for a machine. The keypad assembly also includes a dome overlay positioned over the domes and the substrate in which the dome overlay can create a sealed environment for the substrate and the domes. A light guide that directs light in the keypad assembly and an interlocking component coupled to the light guide can also be part of the keypad assembly. In one arrangement, the interlocking component can selectively compress the dome overlay to assist in the creation of the sealed environment. In another arrangement, the interlocking component can compress the dome overlay by bending the dome overlay at an edge of the substrate.
摘要翻译：本文描述了键盘组件，其中键盘组件包括基板和位于基板上的多个圆顶，并且被配置为将操作者动作转换成机器的相应输入。键盘组件还包括位于圆顶和基底之间的圆顶覆盖物，其中圆顶覆盖物可以为基底和圆顶形成密封环境。引导键盘组件中的光和耦合到光导的互锁部件的光导也可以是键盘组件的一部分。在一种布置中，互锁部件可以选择性地压缩圆顶盖，以有助于创建密封环境。在另一种布置中，互锁部件可以通过在基板的边缘处弯曲圆顶覆盖物来压缩圆顶覆盖物。

40. 发明授权

US08097908B2 Antiblooming imaging apparatus, systems, and methods 有权
标题翻译：抗皱成像设备，系统和方法
公开(公告)号：US08097908B2
公开(公告)日：2012-01-17
申请号：US12719597
申请日：2010-03-08
申请人： Chen Xu , Gennadiy Agranov , Igor Karasev
发明人： Chen Xu , Gennadiy Agranov , Igor Karasev
IPC分类号： H01L31/062
CPC分类号： H04N5/378 , H04N5/3594 , H04N5/3745
摘要： Apparatus, systems, and methods are described to assist in reducing dark current in an active pixel sensor. In various embodiments, a potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In various embodiments, a potential well-potential barrier arrangement is formed to direct charge carriers away from the photosensitive region during an integration time.
摘要翻译：描述了装置，系统和方法以帮助减少有源像素传感器中的暗电流。在各种实施例中，势垒布置被配置为阻挡在感光区域外部产生的电荷载流子的流动。在各种实施例中，形成势阱势垒布置，以在积分时间期间使电荷载流子远离光敏区域。

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