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    • 31. 发明申请
    • NAND flash memory management
    • NAND闪存管理
    • US20060239075A1
    • 2006-10-26
    • US11115004
    • 2005-04-26
    • Gregory WilliamsHarjit SinghMichael LoveStephen Au
    • Gregory WilliamsHarjit SinghMichael LoveStephen Au
    • G11C16/04
    • G11C16/10G06F12/0246G11C29/76G11C2216/14
    • A memory controller is utilized to overcome NAND flash memory's propensity for comprising bad blocks of memory. The memory controller utilizes minimal hardware and is essentially transparent to a device requesting access to the NAND memory. A NAND flash memory device is configured to comprise a set of main blocks of memory and a set of auxiliary blocks of memory. Each block is divided into pages of memory and each page includes metadata. The metadata includes a block status indicator, indicating whether a block is good or bad. When receiving a request to access a page in the NAND flash memory, if the block in which the page resides is good, that block is accessed. If the block is bad, auxiliary memory is searched until a block containing the address of the bad block in its metadata is found. The found block is accessed in lieu of the bad block.
    • 利用存储器控制器来克服NAND闪速存储器包含坏块存储器的倾向。 存储器控制器利用最小的硬件,并且对于请求访问NAND存储器的设备基本上是透明的。 NAND闪存设备被配置为包括一组主存储器块和一组辅助存储器块。 每个块分为内存页面,每个页面都包含元数据。 元数据包括块状态指示符,指示块是好还是坏。 当接收到访问NAND闪存中的页面的请求时,如果页面驻留的块好,则访问该块。 如果块是坏的,则搜索辅助存储器,直到找到包含其元数据中坏块地址的块。 找到的块被访问以代替坏块。
    • 33. 发明申请
    • On-chip bus
    • 片上总线
    • US20050138260A1
    • 2005-06-23
    • US10738313
    • 2003-12-17
    • Michael Love
    • Michael Love
    • G06F13/36G06F13/40
    • G06F13/4081
    • This disclosure involves an on-chip bus architecture involving an on-chip bus that includes a collector node and at least one device node. Each device node is in communication with an on-chip device. The collector node is capable of conducting the multiple outstanding transactions with a plurality of on-chip devices over the on-chip bus wherein each on-chip device transmits all of its data signals across the on-chip bus in the form of packets. The on-chip bus includes at least one bus register, and each of the multiple on-chip devices includes at least one device register. The on-chip bus can provide top level register to register communications between the device register and the bus register. In one version, the on-chip bus is a distributed packet on-chip (DPO) bus.
    • 该公开涉及涉及包括收集器节点和至少一个设备节点的片上总线的片上总线架构。 每个设备节点与片上设备通信。 收集器节点能够通过片上总线进行与多个片上设备的多个未完成的交易,其中每个片上设备以分组的形式通过片上总线传输其全部数据信号。 片上总线包括至少一个总线寄存器,并且多个片上器件中的每一个包括至少一个器件寄存器。 片上总线可以提供顶级寄存器来注册器件寄存器和总线寄存器之间的通信。 在一个版本中,片上总线是分布式片上(DPO)总线总线。
    • 35. 发明授权
    • Transaction system for integrated circuit cards
    • 集成电路卡交易系统
    • US5577121A
    • 1996-11-19
    • US255612
    • 1994-06-09
    • Terry L. DavisJames A. HartVincent A. ImperiaMichael LoveMichael F. O'MalleyJames F. RussellJohn W. SearsPhilip H. Trice
    • Terry L. DavisJames A. HartVincent A. ImperiaMichael LoveMichael F. O'MalleyJames F. RussellJohn W. SearsPhilip H. Trice
    • G07F7/10H04L9/08H04L9/32H04L9/00
    • G07F7/1008G06Q20/341G06Q20/3674G06Q20/3676G06Q20/401G06Q20/4093G06Q20/40975H04L9/3247H04L9/3263H04L9/3271H04L2209/56
    • A transaction system and method of conducting a transaction between in integrated circuit (IC) card and a transaction terminal which includes a security module comprises establishing communication between the terminal and the IC card. Separate session keys are generated in the IC card using data stored in the IC card and a code associated with the particular IC card and the security module using data stored in the security module, and the code associated with the particular IC card. The session key generated by the IC card is used to encrypt data using an encryption algorithm to obtain a first result and the session key generated by the security module is used to encrypt the same data using the same encryption algorithm to obtain a second result. The first and second results are compared to enable the terminal to conduct the transaction only if the comparison establishes that the first result and the second result are identical. In one embodiment, the invention further comprises generating a transaction signature by the IC card using transaction data and data stored in the IC card, generating a transaction signature by the security module using transaction data and data stored in the security module and storing the transaction signatures generated by the IC card and the security module for creating an audit trail for the transaction.
    • 在集成电路(IC)卡和包括安全模块的交易终端之间进行交易的交易系统和方法包括建立终端与IC卡之间的通信。 使用存储在IC卡中的数据和使用存储在安全模块中的数据与特定IC卡和安全模块相关联的代码以及与特定IC卡相关联的代码,在IC卡中生成单独的会话密钥。 由IC卡产生的会话密钥用于使用加密算法加密数据以获得第一结果,并且使用由相同加密算法对安全模块生成的会话密钥进行加密以获得第二结果。 比较第一和第二结果,只有当比较确定第一结果和第二结果相同时,才能使终端进行交易。 在一个实施例中,本发明还包括使用交易数据和存储在IC卡中的数据由IC卡生成交易签名,由安全模块使用交易数据和存储在安全模块中的数据生成交易签名,并存储交易签名 由IC卡和安全模块生成,用于创建交易的审计跟踪。