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    • 31. 发明授权
    • Writing circuit for a phase change memory
    • 写相电路用于相变存储器
    • US07787281B2
    • 2010-08-31
    • US11957044
    • 2007-12-14
    • Shyh-Shyuan SheuLieh-Chiu LinPei-Chia Chiang
    • Shyh-Shyuan SheuLieh-Chiu LinPei-Chia Chiang
    • G11C11/00
    • G11C13/0061G11C11/5678G11C13/0004G11C13/0069G11C2013/0078G11C2013/0092
    • A phase change memory writing circuit is provided. The circuit comprises a writing path and a fast write control unit. The writing path further comprises a current driving unit, a first switch device and a phase change memory cell. The current driving unit is coupled to a high voltage source and outputs a driving current. The first switch device is controlled by a first control signal. The fast write control unit is coupled to the writing path to provide a writing voltage to the writing path. When the first switch device is turned off, the fast write control unit outputs the writing voltage to the writing path. When the first switch device is turned on, the fast write control unit stops outputting the writing voltage to the writing path.
    • 提供了相变存储器写入电路。 该电路包括写入路径和快速写入控制单元。 写入路径还包括电流驱动单元,第一开关器件和相变存储器单元。 电流驱动单元耦合到高电压源并输出驱动电流。 第一开关装置由第一控制信号控制。 快速写入控制单元耦合到写入路径以向写入路径提供写入电压。 当第一开关装置关闭时,快速写入控制单元将写入电压输出到写入路径。 当第一开关装置接通时,快速写入控制单元停止向写入路径输出写入电压。
    • 33. 发明授权
    • Sensing circuit of a phase change memory and sensing method thereof
    • 相变存储器的感测电路及其感测方法
    • US07796454B2
    • 2010-09-14
    • US11967175
    • 2007-12-29
    • Lieh-Chiu LinShyh-Shyuan SheuPei-Chia Chiang
    • Lieh-Chiu LinShyh-Shyuan SheuPei-Chia Chiang
    • G11C7/02
    • G11C16/28G11C13/0004G11C13/004
    • A sensing circuit of a phase change memory. The sensing circuit comprises a storage capacitor and a reference capacitor, a storage memory device and a reference memory device, a storage discharge switch and a reference discharge switch, and an arbitrator. First terminals of the storage capacitor and the reference capacitor are respectively coupled to a pre-charge voltage via first switches. First terminals of the storage memory device and the reference memory device are respectively coupled to the first terminals of the storage capacitor and the reference capacitor. The storage discharge switch and the reference discharge switch are respectively coupled to second terminals of the storage memory device and the reference memory device. The arbitrator is coupled to the first terminals of the storage memory device and the reference memory device and provides an output as a read result of the storage memory device.
    • 相变存储器的感测电路。 感测电路包括存储电容器和参考电容器,存储存储器件和参考存储器件,存储放电开关和参考放电开关以及仲裁器。 存储电容器和参考电容器的第一端子分别通过第一开关耦合到预充电电压。 存储存储器件和参考存储器件的第一端子分别耦合到存储电容器和参考电容器的第一端子。 存储放电开关和参考放电开关分别耦合到存储存储器件和参考存储器件的第二端子。 仲裁器耦合到存储存储器件和参考存储器件的第一端子,并提供输出作为存储存储器件的读取结果。
    • 36. 发明授权
    • Writing circuit for a phase change memory
    • 写相电路用于相变存储器
    • US07672176B2
    • 2010-03-02
    • US11948486
    • 2007-11-30
    • Pei-Chia ChiangShyh-Shyuan SheuLieh-Chiu Lin
    • Pei-Chia ChiangShyh-Shyuan SheuLieh-Chiu Lin
    • G11C7/22
    • G11C5/147G11C13/0004G11C13/0038G11C13/0069G11C2013/0078
    • A writing circuit for a phase change memory is provided. The writing circuit comprises a driving current generating circuit, a first switch device, a first memory cell and a second switch device. The driving current generating circuit provides a writing current to the first memory cell. The first switch device is coupled to the driving current generating circuit. The first memory cell is coupled between the first switch device and the second switch device. The second switch device is coupled between the first memory cell and a ground, wherein when the driving current generating circuit outputs the writing current to the first memory cell, the second switch device is turned on after the first switch device has been turned on for a first predetermined time period.
    • 提供了一种用于相变存储器的写入电路。 写入电路包括驱动电流产生电路,第一开关器件,第一存储器单元和第二开关器件。 驱动电流产生电路向第一存储单元提供写入电流。 第一开关器件耦合到驱动电流产生电路。 第一存储器单元耦合在第一开关器件和第二开关器件之间。 第二开关装置耦合在第一存储单元和地之间,其中当驱动电流产生电路向第一存储单元输出写入电流时,第二开关器件在第一开关器件接通之后导通, 第一预定时间段。
    • 38. 发明申请
    • SENSING CIRCUIT OF A PHASE CHANGE MEMORY AND SENSING METHOD THEREOF
    • 相变记忆传感电路及其感应方法
    • US20080316847A1
    • 2008-12-25
    • US11967175
    • 2007-12-29
    • Lieh-Chiu LinShyh-Shyuan SheuPei-Chia Chiang
    • Lieh-Chiu LinShyh-Shyuan SheuPei-Chia Chiang
    • G11C7/02
    • G11C16/28G11C13/0004G11C13/004
    • A sensing circuit of a phase change memory. The sensing circuit comprises a storage capacitor and a reference capacitor, a storage memory device and a reference memory device, a storage discharge switch and a reference discharge switch, and an arbitrator. First terminals of the storage capacitor and the reference capacitor are respectively coupled to a pre-charge voltage via first switches. First terminals of the storage memory device and the reference memory device are respectively coupled to the first terminals of the storage capacitor and the reference capacitor. The storage discharge switch and the reference discharge switch are respectively coupled to second terminals of the storage memory device and the reference memory device. The arbitrator is coupled to the first terminals of the storage memory device and the reference memory device and provides an output as a read result of the storage memory device.
    • 相变存储器的感测电路。 感测电路包括存储电容器和参考电容器,存储存储器件和参考存储器件,存储放电开关和参考放电开关以及仲裁器。 存储电容器和参考电容器的第一端子分别通过第一开关耦合到预充电电压。 存储存储器件和参考存储器件的第一端子分别耦合到存储电容器和参考电容器的第一端子。 存储放电开关和参考放电开关分别耦合到存储存储器件和参考存储器件的第二端子。 仲裁器耦合到存储存储器件和参考存储器件的第一端子,并提供输出作为存储存储器件的读取结果。