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    • 35. 发明授权
    • Ferroelectric field effect transistors for nonvolatile memory applications having functional gradient material
    • 具有功能梯度材料的非易失性存储器应用的铁电场效应晶体管
    • US06236076B1
    • 2001-05-22
    • US09301867
    • 1999-04-29
    • Koji AritaCarlos A. Paz de Araujo
    • Koji AritaCarlos A. Paz de Araujo
    • H01L2976
    • H01L29/516H01L21/28291H01L28/56H01L29/78391
    • A nonvolatile nondestructible read-out ferroelectric FET memory comprising a semiconductor substrate, a ferroelectric functional gradient material (“FGM”) thin film, and a gate electrode. In one basic embodiment, the ferroelectric FGM thin film contains a ferroelectric compound and a dielectric compound. The dielectric compound has a lower dielectric constant than the ferroelectric compound. There is a concentration gradient of the ferroelectric compound in the thin film. In a second basic embodiment, the FGM thin film is a functional gradient ferroelectric (“FGF”), in which compositional gradients of ferroelectric compounds result in unconventional hysteresis behavior. The unconventional hysteresis behavior of FGF thin films is elated to an enlarged memory window in ferroelectric FET memories. FGM thin films are preferably formed using a liquid source MOD methods, preferably a multisource CVD method.
    • 包括半导体衬底,铁电功能梯度材料(“FGM”)薄膜和栅电极的非易失性非破坏性读出型铁电FET存储器。 在一个基本实施例中,铁电FGM薄膜含有铁电化合物和电介质化合物。 电介质化合物的介电常数比铁电化合物低。 在薄膜中存在铁电化合物的浓度梯度。 在第二基本实施例中,FGM薄膜是功能梯度铁电(“FGF”),其中铁电化合物的组成梯度导致非常规的滞后行为。 FGF薄膜的非常规滞后行为被激发到铁电FET存储器中的扩大的存储窗口。 FGM薄膜优选使用液体源MOD方法,优选多源CVD方法形成。
    • 37. 发明授权
    • Ferroelectric memory with disturb protection
    • 铁电存储器具有干扰保护
    • US6151241A
    • 2000-11-21
    • US314800
    • 1999-05-19
    • Shinichiro HayashiTatsuo OtsukiCarlos A. Paz de Araujo
    • Shinichiro HayashiTatsuo OtsukiCarlos A. Paz de Araujo
    • G11C11/22H01L21/336H01L29/51G11C11/00
    • H01L29/6684G11C11/22H01L29/516
    • A ferroelectric field effect transistor memory cell includes a thin film varistor located between the gate electrode and the ferroelectric layer. The varistor protects the ferroelectric layer from disturb voltage pulses arising from memory read, write and sense operations. A second electrode is located between the thin film varistor and the ferroelectric layer. The thin film ferroelectric is positioned over the channel of a transistor to operate as a ferroelectric gate. For voltages at which disturb voltages are likely to occur, the thin film varistor has a resistance obeying a formula R.sub.d >10.times.1/(2.pi.fC.sub.F), where R.sub.d is resistivity of the thin film varistor, f is an operating frequency of said memory, and C.sub.F is the capacitance of the ferroelectric layer. For voltages at or near the read and write voltage of the memory, the thin film varistor has a resistance obeying a formula R.sub.d
    • 铁电场效应晶体管存储单元包括位于栅电极和铁电层之间的薄膜变阻器。 压敏电阻保护铁电层不受存储器读,写和读操作引起的干扰电压脉冲的影响。 第二电极位于薄膜压敏电阻和铁电层之间。 薄膜铁电体位于晶体管的沟道上方,用作铁电栅极。 对于可能发生干扰电压的电压,薄膜压敏电阻具有遵循公式Rd> 10×1 /(2πfCF)的电阻,其中Rd是薄膜变阻器的电阻率,f是所述存储器的工作频率, CF是铁电层的电容。 对于等于或接近存储器的读和写电压的电压,薄膜压敏电阻具有遵循公式Rd <0.1x1 /(2πfCF)的电阻。