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31. 发明申请

US20050235006A1 Program object read barrier 有权
标题翻译：程序对象读取屏障
公开(公告)号：US20050235006A1
公开(公告)日：2005-10-20
申请号：US10815397
申请日：2004-03-31
申请人： Ali-Reza Adl-Tabatabai , Jayashankar Bharadwaj , Tatiana Shpeisman
发明人： Ali-Reza Adl-Tabatabai , Jayashankar Bharadwaj , Tatiana Shpeisman
IPC分类号： G06F9/45 , G06F12/00
CPC分类号： G06F8/443
摘要： A method and apparatus for a read barrier mechanism are described. According to an embodiment, a method comprises receiving an access request for a program object; performing a combined check for a null reference or for a read barrier for the program object; and if the combined check is affirmative, performing a recovery operation.
摘要翻译：描述了读屏障机制的方法和装置。根据实施例，一种方法包括接收对节目对象的访问请求; 执行对于程序对象的空参考或读障碍的组合检查; 并且如果组合检查是肯定的，则执行恢复操作。

32. 发明申请

US20050149916A1 Data layout mechanism to reduce hardware resource conflicts 审中-公开
标题翻译：数据布局机制，减少硬件资源冲突
公开(公告)号：US20050149916A1
公开(公告)日：2005-07-07
申请号：US10748384
申请日：2003-12-29
申请人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai
发明人： Tatiana Shpeisman , Ali-Reza Adl-Tabatabai
IPC分类号： G06F9/00 , G06F9/45 , G06F12/00
CPC分类号： G06F8/441 , G06F8/4442
摘要： In one embodiment, a method is provided. The method of this embodiment provides scheduling a sequence of machine-executable instructions, and creating a data layout based on the scheduled sequence of machine-executable instructions.
摘要翻译：在一个实施例中，提供了一种方法。该实施例的方法提供调度机器可执行指令的序列，以及基于机器可执行指令的调度序列来创建数据布局。

33. 发明申请

US20120272210A1 METHODS AND SYSTEMS FOR MAPPING A FUNCTION POINTER TO THE DEVICE CODE 有权
标题翻译：将功能指针映射到设备代码的方法和系统
公开(公告)号：US20120272210A1
公开(公告)日：2012-10-25
申请号：US13092500
申请日：2011-04-22
申请人： Yang Ni , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman
发明人： Yang Ni , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman
IPC分类号： G06F9/44 , G06F9/45
CPC分类号： G06F8/52
摘要： Methods for mapping a function pointer to the device code are presented. In one embodiment, a method includes identifying a function which is executable by processing devices. The method includes generating codes including a first code corresponds to a first processing device and a second code corresponds to a second processing device. The second processing device is architecturally different from the first processing device. The method further includes storing the second code in a byte string such that the second code is retrievable if the function will be executed by the second processing device.
摘要翻译：介绍了将功能指针映射到设备代码的方法。在一个实施例中，一种方法包括识别可由处理设备执行的功能。该方法包括生成代码，其包括对应于第一处理设备的第一代码，第二代码对应于第二处理设备。第二处理装置在结构上与第一处理装置不同。该方法还包括将第二代码存储在字节串中，使得如果功能将被第二处理设备执行，则可检索第二代码。

34. 发明申请

US20120174083A1 DYNAMIC OPTIMIZATION FOR REMOVAL OF STRONG ATOMICITY BARRIERS 审中-公开
标题翻译：动态优化去除强大的原子障碍
公开(公告)号：US20120174083A1
公开(公告)日：2012-07-05
申请号：US13420792
申请日：2012-03-15
申请人： Tatiana Shpeisman , Vigay Menon , Ali-Reza Adl-Tabatabai
发明人： Tatiana Shpeisman , Vigay Menon , Ali-Reza Adl-Tabatabai
IPC分类号： G06F9/45
CPC分类号： G06F8/4435 , G06F8/443
摘要： A method and apparatus for dynamic optimization of strong atomicity barriers is herein described. During runtime compilation, code including non-transactional memory accesses that are to conflict with transactional memory accesses is patched to insert transactional barriers at the conflicting non-transactional memory accesses to ensure isolation and strong atomicity. However, barriers are omitted or removed from non-transactional memory accesses that do not conflict with transactional memory accesses to reduce barrier execution overhead.
摘要翻译：这里描述了用于动态优化强原子性障碍的方法和装置。在运行时编译期间，修补包括与事务性存储器访问冲突的非事务性存储器访问的代码，以在冲突的非事务存储器访问中插入事务性障碍，以确保隔离和强原子性。然而，从与事务性存储器访问不冲突的非事务性存储器访问中省略或删除障碍，以减少屏障执行开销。

35. 发明申请

US20090089520A1 Hardware acceleration of strongly atomic software transactional memory 有权
标题翻译：强力原子软件交易内存的硬件加速
公开(公告)号：US20090089520A1
公开(公告)日：2009-04-02
申请号：US11906175
申请日：2007-09-28
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Cheng Wang
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Tatiana Shpeisman , Cheng Wang
IPC分类号： G06F12/00
CPC分类号： G06F9/467 , G06F9/3004 , G06F9/30087 , G06F9/3834
摘要： In accordance with some embodiments, software transactional memory may be used for both managed and unmanaged environments. If a cache line is resident in a cache and this is not the first time that the cache line has been read since the last write, then the data may be read directly from the cache line, improving performance. Otherwise, a normal read may be utilized to read the information. Similarly, write performance can be accelerated in some instances to improve performance.
摘要翻译：根据一些实施例，软件事务存储器可以用于被管理的和非管理的环境。如果高速缓存行驻留在缓存中，并且这不是自上次写入以来第一次读取高速缓存行，则可以直接从高速缓存行读取数据，从而提高性能。否则，可以使用正常读取来读取信息。同样，在某些情况下，写入性能可以加快，以提高性能。

36. 发明授权

US07487336B2 Method for register allocation during instruction scheduling 有权
标题翻译：指令调度期间的寄存器分配方法
公开(公告)号：US07487336B2
公开(公告)日：2009-02-03
申请号：US10734627
申请日：2003-12-12
申请人： Jayashankar Bharadwaj , Tatiana Shpeisman , Ali-Reza Adl-Tabatabai
发明人： Jayashankar Bharadwaj , Tatiana Shpeisman , Ali-Reza Adl-Tabatabai
IPC分类号： G06F9/30 , G06F9/40 , G06F15/00
CPC分类号： G06F8/441 , G06F8/445
摘要： The present disclosure relates to the allocation of registers the scheduling of instructions, and, more specifically, to the classifying of operands and allocation of registers to local operands.
摘要翻译：本公开涉及对指令的调度的寄存器的分配，更具体地，涉及对本地操作数的操作数的分类和寄存器的分配。

37. 发明申请

US20150040111A1 HANDLING PRECOMPILED BINARIES IN A HARDWARE ACCELERATED SOFTWARE TRANSACTIONAL MEMORY SYSTEM 有权
标题翻译：在硬件加速软件交易存储系统中处理预先确定的二进制
公开(公告)号：US20150040111A1
公开(公告)日：2015-02-05
申请号：US14271024
申请日：2014-05-06
申请人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn A. Jacobson
发明人： Bratin Saha , Ali-Reza Adl-Tabatabai , Quinn A. Jacobson
IPC分类号： G06F9/30 , G06F9/38 , G06F9/46 , G06F12/08
CPC分类号： G06F9/30087 , G06F9/3004 , G06F9/30043 , G06F9/30076 , G06F9/3834 , G06F9/3851 , G06F9/3861 , G06F9/467 , G06F12/0837 , G06F2212/62
摘要： A method and apparatus for enabling a Software Transactional Memory (STM) with precompiled binaries is herein described. Upon encountering an access operation in a transaction, an annotation field associated with a memory location referenced by the access is checked. In response to the memory location representing a previous similar access within the transaction, the access is performed without access barriers. However, if the annotation field is in a default state representing no previous access during a pendancy of the transaction, then a mode of the processor is determined. If the processor mode is in implicit mode, an access handler/barrier is asynchronously executed. Conversely, in an explicit mode, a flag is set instead of asynchronously executing the handler. In addition, during compilation convert explicit and convert implicit instructions are inserted to intelligently convert modes for precompiled and newly compiled binaries. Furthermore, new versions of newly compiled functions may be inserted to provide strong atomicity between previously and newly compiled functions.
摘要翻译：这里描述了使用预编译二进制文件实现软件事务存储器（STM）的方法和装置。在事务中遇到访问操作时，检查与由访问引用的存储器位置相关联的注释字段。响应于表示事务内先前类似访问的存储器位置，访问被执行而没有访问障碍。然而，如果注释字段处于表示在事务的挂起期间没有先前访问的默认状态，则确定处理器的模式。如果处理器模式处于隐式模式，则异步执行访问处理程序/障碍。相反，在显式模式下，设置标志而不是异步执行处理程序。此外，在编译期间，转换显式和转换隐式指令将被智能地转换为预编译和新编译的二进制文件的模式。此外，可以插入新版本的新编译的函数，以便在先前和新编译的函数之间提供强大的原子性。

38. 发明授权

US08719514B2 Software filtering in a transactional memory system 有权
标题翻译：事务存储系统中的软件过滤
公开(公告)号：US08719514B2
公开(公告)日：2014-05-06
申请号：US12653471
申请日：2009-12-15
申请人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
发明人： Ali-Reza Adl-Tabatabai , David Callahan , Jan Gray , Vinod Grover , Bratin Saha , Gad Sheaffer
IPC分类号： G06F13/00
CPC分类号： G06F9/522 , G06F8/458 , G06F9/467
摘要： A method and apparatus for utilizing hardware mechanisms of a transactional memory system is herein described. Various embodiments relate to software-based filtering of operations from read and write barriers and read isolation barriers during transactional execution. Other embodiments relate to software-implemented read barrier processing to accelerate strong atomicity. Other embodiments are also described and claimed.
摘要翻译：这里描述了一种利用事务存储器系统的硬件机制的方法和装置。各种实施例涉及在事务执行期间从读写障碍和读隔离屏障的基于软件的操作过滤。其他实施例涉及软件实现的读屏障处理以加速强原子性。还描述和要求保护其他实施例。

39. 发明授权

US08688951B2 Operating system virtual memory management for hardware transactional memory 有权
标题翻译：硬件事务内存的操作系统虚拟内存管理
公开(公告)号：US08688951B2
公开(公告)日：2014-04-01
申请号：US13554558
申请日：2012-07-20
申请人： Koichi Yamada , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Landy Wang , Martin Taillefer , Arun Kishan , David Callahan , Jan Gray , Vadim Bassin
发明人： Koichi Yamada , Gad Sheaffer , Ali-Reza Adl-Tabatabai , Landy Wang , Martin Taillefer , Arun Kishan , David Callahan , Jan Gray , Vadim Bassin
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28 , G06F9/26 , G06F9/34 , G06F9/455 , G06F9/46
CPC分类号： G06F12/1045 , G06F12/0815
摘要： Operating system virtual memory management for hardware transactional memory. A system includes an operating system deciding to unmap a first virtual page. As a result, the operating system removes the mapping of the first virtual page to the first physical page from the virtual memory page table. As a result, the operating system performs an action to discard transactional memory hardware state for at least the first physical page. Embodiments may further suspend hardware transactions in kernel mode. Embodiments may further perform soft page fault handling without aborting a hardware transaction, resuming the hardware transaction upon return to user mode, and even successfully committing the hardware transaction.
摘要翻译：硬件事务内存的操作系统虚拟内存管理。系统包括决定取消映射第一虚拟页面的操作系统。结果，操作系统从虚拟存储器页表移除第一虚拟页面到第一物理页面的映射。结果，操作系统执行至少第一物理页丢弃事务存储器硬件状态的动作。实施例可以进一步挂起内核模式下的硬件事务。实施例可以进一步执行软页错误处理，而不中止硬件事务，在返回到用户模式时恢复硬件事务，甚至成功地提交硬件事务。

40. 发明授权

US08627048B2 Mechanism for irrevocable transactions 有权
标题翻译：不可撤销交易的机制
公开(公告)号：US08627048B2
公开(公告)日：2014-01-07
申请号：US13231575
申请日：2011-09-13
申请人： Adam Welc , Bratin Saha , Ali-Reza Adl-Tabatabai
发明人： Adam Welc , Bratin Saha , Ali-Reza Adl-Tabatabai
IPC分类号： G06F9/00
CPC分类号： G06F9/526 , G06F9/3004 , G06F9/30087 , G06F9/3857 , G06F9/3863
摘要： A method and apparatus for designating and handling irrevocable transactions is herein described. In response to detecting an irrevocable event, such as an I/O operation, a user-defined irrevocable designation, and a dynamic failure profile, a transaction is designated as irrevocable. In response to designating a transaction as irrevocable, Single Owner Read Locks (SORLs) are acquired for previous and subsequent reads in the irrevocably designated transaction to ensure the transaction is able to complete without modification to locations read from, while permitting remote resources to load from those locations to continue execution.
摘要翻译：这里描述用于指定和处理不可撤销交易的方法和装置。响应于检测到诸如I / O操作，用户定义的不可撤销指定和动态故障简档的不可撤销事件，交易被指定为不可撤销。为了将交易指定为不可撤销，单独所有者读取锁（SORL）是为不可撤销地指定的事务中的先前和后续读取而获取的，以确保事务能够完成，而无需修改读取的位置，同时允许远程资源从那些位置继续执行。

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