专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

31. 发明授权

US07047551B2 Information distributing method and information distributing system 失效
公开(公告)号：US07047551B2
公开(公告)日：2006-05-16
申请号：US09840103
申请日：2001-04-24
申请人： Katsuhisa Ogawa , Koichi Kadokura
发明人： Katsuhisa Ogawa , Koichi Kadokura
IPC分类号： H04N7/16
CPC分类号： H04N21/4532 , G06Q30/02 , H04N7/165 , H04N7/17354 , H04N21/2668 , H04N21/44222 , H04N21/6582 , H04N21/812
摘要： In order to allow an advertisement company to register advertisement information using the Internet and conduct publicity activities aimed at specified target users, profile data of a plurality of users is managed using a database, selection conditions for selecting specific users to whom advertisement information should be distributed are received, specific users to whom the advertisement information should be distributed are selected based on the received selection conditions and the managed profile data, and the advertisement information is distributed to the selected specific users utilizing a digital broadcasting system.

32. 发明授权

US06459312B2 Semiconductor integrated circuit, delay-locked loop having the same circuit, self-synchronizing pipeline type system, voltage-controlled oscillator, and phase-locked loop 失效
标题翻译：半导体集成电路，具有相同电路的延迟锁定环路，自同步管线型系统，压控振荡器和锁相环
公开(公告)号：US06459312B2
公开(公告)日：2002-10-01
申请号：US09919926
申请日：2001-08-02
申请人： Katsuhisa Ogawa , Tadahiro Ohmi , Tadashi Shibata
发明人： Katsuhisa Ogawa , Tadahiro Ohmi , Tadashi Shibata
IPC分类号： H03L700
CPC分类号： H03K3/0315 , H03K3/354 , H03K5/133 , H03K2005/00045 , H03L7/0812 , H03L7/0995 , H03L2207/06
摘要： The problem of increase in jitter amounts against increase in delay amounts is solved by a circuit wherein a signal input terminal is connected through a first capacitor to an input terminal of a sense amplifier, a control input terminal is connected through a second capacitor to the input terminal of the sense amplifier, and a common connection point between the input terminal of the sense amplifier and the first and second capacitors is a floating node, and wherein a signal applied through the signal input terminal to the input terminal of the sense amplifier is vertically shifted by a control signal applied to the control input terminal, at least, near a determination threshold of the sense amplifier, thereby controlling a delay amount of an output.
摘要翻译：通过其中信号输入端子通过第一电容器连接到读出放大器的输入端的电路来解决抖动量增加与延迟量增加的问题，控制输入端子通过第二电容器连接到输入端读出放大器的端子和读出放大器的输入端与第一和第二电容器之间的公共连接点是浮动节点，并且其中通过信号输入端施加到读出放大器的输入端的信号是垂直的至少在感测放大器的判定阈值附近，施加到控制输入端子的控制信号移位，从而控制输出的延迟量。

33. 发明授权

US6127852A Semiconductor integrated circuit for parallel signal processing 失效
标题翻译：半导体集成电路并行信号处理
公开(公告)号：US6127852A
公开(公告)日：2000-10-03
申请号：US110014
申请日：1998-07-02
申请人： Katsuhisa Ogawa , Tadahiro Ohmi , Tadashi Shibata
发明人： Katsuhisa Ogawa , Tadahiro Ohmi , Tadashi Shibata
IPC分类号： G01D1/12 , G06G7/12 , G06G7/122 , H01L21/8238 , H01L27/092 , H01L29/78 , H03D1/00
CPC分类号： G06G7/122
摘要： To retrieve analog signals at high precision by a maximum or minimum position detection parallel signal processing circuit, a plurality of circuit units in each of which a gate of a transistor is connected to a signal input terminal through first capacitive means, a common connecting point of the gate and the first capacitive means is connected to one terminal side of second capacitive means, and control means, for fluctuating a voltage on the other terminal side of the second capacitive means so as to further increase or decrease a drain current in correspondence to an increase or decrease in the drain current is connected between the drain and the other terminal side of the second capacitive means are provided, a source of each transistor of the plurality of circuit units is commonly connected and is connected to a constant current source, and the maximum or minimum voltage position detection with respect to a signal voltage which is applied to each signal input terminal is performed by a voltage on the other terminal side of the second capacitive means.
摘要翻译：为了通过最大或最小位置检测并行信号处理电路以高精度检索模拟信号，通过第一电容装置将晶体管的栅极连接到信号输入端的多个电路单元中的多个电路单元，栅极和第一电容装置连接到第二电容装置的一个端子侧，以及控制装置，用于使第二电容装置的另一个端子侧的电压波动，以进一步增加或减少对应于在第二电容装置的漏极和另一个端子侧之间连接漏极电流的增加或减少，多个电路单元中的每个晶体管的源极共同连接并连接到恒定电流源，并且执行相对于施加到每个信号输入端子的信号电压的最大或最小电压位置检测通过第二电容装置的另一个端子侧的电压。

34. 发明授权

US5349595A Drive circuit for semiconductor light-emitting device 失效
标题翻译：半导体发光装置的驱动电路
公开(公告)号：US5349595A
公开(公告)日：1994-09-20
申请号：US23358
申请日：1993-02-26
申请人： Katsuhisa Ogawa , Takamasa Sakuragi
发明人： Katsuhisa Ogawa , Takamasa Sakuragi
IPC分类号： H01L33/00 , H01S5/042 , H03G1/00 , H05B33/08 , H01S3/00
CPC分类号： H05B33/0818 , H01S5/042 , H05B33/0803 , H01S5/0427
摘要： A drive circuit for supplying a constant drive current to the anode terminal of a semiconductor light emitting device, includes a current supply source connected to the anode terminal for supplying a bias current to the semiconductor light emitting device. Since the drive circuit is formed so as to supply the bias current to the anode terminal of the semiconductor light emitting device, a charge current for charging a conjunction capacitance can be reduced independently on the time period of turning off the semiconductor light emitting device. As a result, a spike noise can be removed in the laser current waveform at its rise-up part, and a reduction of its rise-up speed can be restricted, both of which are due to a dependent upon the time period of turning off the semiconductor device.
摘要翻译：用于向半导体发光器件的阳极端子提供恒定驱动电流的驱动电路包括连接到阳极端子的电流源，用于向半导体发光器件提供偏置电流。由于形成驱动电路以将偏置电流提供给半导体发光器件的阳极端子，因此可以在关闭半导体发光器件的时间段上独立地减小用于对连接电容充电的充电电流。结果，可以在其上升部分处的激光电流波形中消除尖峰噪声，并且可以限制其上升速度的降低，这两者都是由于取决于关闭的时间段半导体器件。

35. 发明申请

US20120212645A1 IMAGE PROCESSING APPARATUS AND METHOD 审中-公开
标题翻译：图像处理装置和方法
公开(公告)号：US20120212645A1
公开(公告)日：2012-08-23
申请号：US13450564
申请日：2012-04-19
申请人： Katsuhisa Ogawa
发明人： Katsuhisa Ogawa
IPC分类号： H04N5/235
CPC分类号： H04N5/243 , H04N5/23232 , H04N5/23245
摘要： An image processing apparatus determines a correction gain factor at a high rate of speed to synthesize an image. The apparatus includes a long second middle luminance image detecting unit for detecting a pixel having a pixel value in a first middle luminance pixel value region derived from a long second exposure image; a short second middle luminance image detecting unit for detecting a pixel having a pixel value in second middle luminance pixel value region derived from a shorter second exposure image; a correction gain factor calculating unit for designating, as a common pixel, the pixel detected by the long second middle luminance image detecting unit and the pixel detected by the short second middle luminance image detecting unit, each of the pixels at a common position, and for calculating a correction gain factor based on the pixel values of the common pixels.
摘要翻译：图像处理装置以高速率确定校正增益因子以合成图像。该装置包括长的第二中间亮度图像检测单元，用于检测从长的第二曝光图像导出的第一中间亮度像素值区域中具有像素值的像素; 短的第二中间亮度图像检测单元，用于检测从较短的第二曝光图像导出的具有第二中间亮度像素值区域中的像素值的像素; 校正增益因子计算单元，用于指定由长第二中间亮度图像检测单元检测的像素和由第二中间亮度图像检测单元检测的像素作为公共像素，每个像素在公共位置，以及用于基于公共像素的像素值来计算校正增益因子。

36. 发明授权

US07797424B2 Method and apparatus for judging coincidence of addresses, and service provision method and service provision apparatus 失效
标题翻译：用于判断地址一致的方法和装置，以及服务提供方法和服务提供装置
公开(公告)号：US07797424B2
公开(公告)日：2010-09-14
申请号：US10677968
申请日：2003-10-01
申请人： Katsuhisa Ogawa
发明人： Katsuhisa Ogawa
IPC分类号： G06F15/173 , H04L12/66
CPC分类号： H04L63/08 , H04L29/12216 , H04L61/2007
摘要： A terminal service management server compares a host address of a terminal apparatus received from a terminal manufacturing factory site, a network address acquired from a network address retrieval site and an Internet service provider, and a sender address of a packet sent by a terminal apparatus connected to a LAN, and provides a service to the terminal apparatus connected to the LAN in the case in which the host address, the network address, and the sender address coincide with each other.
摘要翻译：终端服务管理服务器比较从终端制造工厂接收的终端装置的主机地址，从网络地址检索站点获取的网络地址和因特网服务提供商，以及由连接的终端装置发送的分组的发送方地址并且在主机地址，网络地址和发送方地址彼此一致的情况下，向连接到LAN的终端装置提供服务。

37. 发明授权

US07680121B2 Transmission apparatus, method and program 有权
标题翻译：传输装置，方法和程序
公开(公告)号：US07680121B2
公开(公告)日：2010-03-16
申请号：US10892807
申请日：2004-07-16
申请人： Katsuhisa Ogawa , Masahiko Kosaka , Naohiko Suzuki , Hiroaki Nakazawa
发明人： Katsuhisa Ogawa , Masahiko Kosaka , Naohiko Suzuki , Hiroaki Nakazawa
IPC分类号： H04L12/56
CPC分类号： H04L67/104 , H04L29/12113 , H04L61/1541 , H04L61/6059 , H04L67/1063
摘要： A transmission apparatus connected to a first network obtains information on a device connected to a third network, to which a destination of communication with a communication device connected to a second network is connected, and transmits the obtained information to a device connected to the second network via the first network.
摘要翻译：连接到第一网络的发送装置获取与连接到与连接到第二网络的通信设备进行通信的目的地的连接到第三网络的设备的信息，并将获得的信息发送到连接到第二网络的设备通过第一个网络。

38. 发明授权

US07664954B2 Providing apparatus, providing method, communication device, communication method, and program 有权
标题翻译：提供装置，提供方法，通信装置，通信方法和程序
公开(公告)号：US07664954B2
公开(公告)日：2010-02-16
申请号：US11086634
申请日：2005-03-22
申请人： Katsuhisa Ogawa , Naohiko Suzuki , Hiroaki Nakazawa
发明人： Katsuhisa Ogawa , Naohiko Suzuki , Hiroaki Nakazawa
IPC分类号： H04L9/32
CPC分类号： H04L63/061 , G06Q20/382
摘要： A providing apparatus that provides information required for a secure communication to first and second devices includes a receiving unit for receiving candidates for parameters used for the secure communication from the first and second devices; a generating unit for generating the information required for the secure communication based on the candidates for the parameters received from the first and second devices; and a transmitting unit for transmitting the information required for the secure communication, generated by the generating unit, to the first and second devices.
摘要翻译：提供用于向第一和第二设备进行安全通信所需的信息的提供设备包括接收单元，用于从第一和第二设备接收用于安全通信的参数的候选; 生成单元，用于基于从第一和第二设备接收的参数的候选，生成安全通信所需的信息; 以及发送单元，用于将由所述生成单元生成的所述安全通信所需的信息发送到所述第一和第二设备。

39. 发明授权

US07542573B2 Providing apparatus, communication device, method, and program 失效
标题翻译：提供设备，通信设备，方法和程序
公开(公告)号：US07542573B2
公开(公告)日：2009-06-02
申请号：US11135156
申请日：2005-05-23
申请人： Katsuhisa Ogawa , Naohiko Suzuki , Hiroaki Nakazawa
发明人： Katsuhisa Ogawa , Naohiko Suzuki , Hiroaki Nakazawa
IPC分类号： H04L9/08
CPC分类号： H04L63/20 , G06F21/608 , H04L63/0428 , H04L63/08
摘要： A providing apparatus provides information required for secure communication to first and second devices. The providing apparatus includes a receiving unit that receives a first parameter used by the first device for the secure communication and a second parameter used by the second device for the secure communication from a connection apparatus via which the first device is connected to the second device, a generating unit that generates the information required for the secure communication based on the parameters received from the connection apparatus, and a transmitting unit that transmits the information required for the secure communication, generated by the generating unit, to the first and second devices.
摘要翻译：提供设备提供对第一和第二设备的安全通信所需的信息。所述提供装置包括接收单元，其接收由所述第一设备使用的用于所述安全通信的第一参数，以及所述第二设备使用的第二参数用于通过所述第一设备连接到所述第二设备的连接设备进行安全通信，生成单元，其基于从连接装置接收到的参数生成安全通信所需的信息;发送单元，将由生成单元生成的安全通信所需的信息发送到第一和第二设备。

40. 发明授权

US6127857A Output buffer or voltage hold for analog of multilevel processing 失效
标题翻译：用于模拟或多级处理的输出缓冲器或电压保持
公开(公告)号：US6127857A
公开(公告)日：2000-10-03
申请号：US110011
申请日：1998-07-02
申请人： Katsuhisa Ogawa , Tadahiro Ohmi , Tadashi Shibata
发明人： Katsuhisa Ogawa , Tadahiro Ohmi , Tadashi Shibata
IPC分类号： H01L27/092 , H03K19/003 , H03K19/00
CPC分类号： H03K19/00315 , H01L27/092
摘要： In order to prevent an output offset voltage from occurring because of a relative difference of threshold voltage Vth between NMOS and PMOS in transmission of dc voltage, a semiconductor integrated circuit is constructed in a circuit configuration comprising a first depletion-mode N-channel MOS transistor and a first depletion-mode P-channel MOS transistor, a gate of each transistor being connected to an input terminal and a source of each transistor being connected to an output terminal, a second depletion-mode N-channel MOS transistor having W/L equal to that of the first depletion-mode P-channel MOS transistor, a drain of the transistor being connected to the output terminal and a gate and a source of the transistor being connected both to a lower-voltage-side power supply, and a second depletion-mode P-channel MOS transistor having W/L equal to that of the first depletion-mode P-channel MOS transistor, a drain of the transistor being connected to the output terminal and a gate and a source of the transistor being connected both to a higher-voltage-side power supply.
摘要翻译：为了防止由于在直流电压传输期间NMOS和PMOS之间的阈值电压Vth的相对差异而产生输出偏移电压，半导体集成电路被构造成包括第一耗尽型N沟道MOS晶体管和第一耗尽型P沟道MOS晶体管，每个晶体管的栅极连接到输入端子，每个晶体管的源极连接到输出端子，具有W / L的第二耗尽型N沟道MOS晶体管等于第一耗尽型P沟道MOS晶体管的漏极，晶体管的漏极连接到输出端子，并且晶体管的栅极和源极都连接到低压侧电源，以及具有与第一耗尽型P沟道MOS晶体管相等的W / L的第二耗尽型P沟道MOS晶体管，晶体管的漏极连接到输出端子，栅极和晶体管的源极连接到较高电压侧电源。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式