会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 32. 发明申请
    • Device manufacturing method
    • 器件制造方法
    • US20060008747A1
    • 2006-01-12
    • US11175275
    • 2005-07-07
    • Daisuke KawamuraAkiko MimotogiTakashi Sato
    • Daisuke KawamuraAkiko MimotogiTakashi Sato
    • G03F7/00
    • G03F7/70341
    • A device manufacturing method is disclosed, which includes forming a resist film on a substrate, preparing an exposure tool which comprises a projection optical system, preparing a photo mask on which a mask pattern is formed, mounting the substrate and the photo mask on the exposure tool, the substrate having the resist film formed thereon, transferring the mask pattern formed on the photo mask onto the resist film in a state in which a solution including an oxidative agent is filled between the resist film and a final element of a projection optical system to form a latent image of the mask pattern on the resist film, heating the resist film having the latent image formed thereon, and developing the heated resist film.
    • 公开了一种器件制造方法,其包括在衬底上形成抗蚀剂膜,制备曝光工具,其包括投影光学系统,制备其上形成掩模图案的光掩模,将衬底和光掩模安装在曝光 工具,其上形成有抗蚀剂膜的基板,在将包含氧化剂的溶液填充在抗蚀剂膜和投影光学系统的最终元件之间的状态下,将形成在光掩模上的掩模图案转印到抗蚀剂膜上 在抗蚀剂膜上形成掩模图案的潜像,加热其上形成有潜像的抗蚀剂膜,并显影加热的抗蚀剂膜。
    • 33. 发明授权
    • Method for determining optical constant of antireflective layer, and method for forming resist pattern
    • 用于确定抗反射层的光学常数的方法,以及形成抗蚀剂图案的方法
    • US06841404B2
    • 2005-01-11
    • US10237735
    • 2002-09-10
    • Daisuke KawamuraEishi Shiobara
    • Daisuke KawamuraEishi Shiobara
    • G03F7/11G03F7/09G03F7/20G03F7/26H01L21/00H01L21/027H01L21/66
    • G03F7/091
    • A method for determining an optical constant of an bottom antireflective layer formed between a resist film and an underlying substrate in an optical lithography process in a process for fabricating a semiconductor device, the resist film having an absorption coefficient α′ of 1.5 μm−1 to 3.0 μm−1 with respect to an exposure wavelength, a base of the absorption coefficient α′ being 10, the method includes expressing an nominal dose due to a variation in thickness of the resist film by the sum of a monotonic increase term and a damped oscillation term, and selecting an optical constant of the bottom antireflective layer so that a minimum value closing to a maximum point indicative of a maximum value on a curve of a variation in the nominal dose on a side that the thickness is larger than that at the maximum point is substantially equal to the maximum value, or so that no maximum point exist on the curve wherein, expressing an exposure wavelength by λ and an extinction coefficient of the resist film by κ, the absorption coefficient α′ is a value having the following relationship with the λ and the κ. α ′ = 4 ⁢   ⁢ π ⁢   ⁢ κ λ ⁢ log 10 ⁡ ( exp )
    • 在制造半导体器件的方法中,在光刻工艺中确定在抗蚀剂膜和下面的衬底之间形成的底部抗反射层的光学常数的方法,所述抗蚀剂膜的吸收系数α'为1.5μm-1 >3.0μm,相对于曝光波长为3.0μm,吸收系数α'的基数为10,该方法包括由于抗蚀剂膜的厚度变化而产生的标称剂量为单调增加的总和 并选择阻尼振荡项,并且选择底部抗反射层的光学常数,使得接近最大值的最小值表示在厚度较大的一侧的标称剂量的变化的曲线上的最大值 比最大点处的最大值大致等于最大值,或者使曲线上不存在最大点,其中表示曝光波长λ和消光 通过κ而得到的抗蚀膜的系数,吸收系数α'是与λ和κ具有以下关系的值。
    • 39. 发明申请
    • Method of manufacturing semiconductor device and liquid immersion lithography system
    • 制造半导体器件和液浸光刻系统的方法
    • US20070229789A1
    • 2007-10-04
    • US11727498
    • 2007-03-27
    • Daisuke Kawamura
    • Daisuke Kawamura
    • G03B27/42
    • G03F7/70916G03F7/70341G03F7/70866
    • A method of manufacturing a semiconductor device is disclosed. The manufacturing method includes the following steps in a period from a liquid immersion lithography step to a step in which a film structure of at least an edge of a wafer changes from a timing of the liquid immersion lithography step. At least one of a side surface of an edge of the wafer and an upper surface of the edge of the wafer is inspected. On the basis of an inspection result, at least one of the presence/absence of film peeling and the presence/absence of particle adhesion is determined on at least one of the side surface of the edge of the wafer and the upper surface of the edge of the wafer. A predetermined coping process is performed when it is determined that at least one of the film peeling and the particle adhesion has occurred.
    • 公开了制造半导体器件的方法。 该制造方法包括以下步骤:从液浸光刻步骤到至少晶片边缘的膜结构从液浸光刻步骤的定时变化的步骤。 检查晶片的边缘的侧表面和晶片的边缘的上表面中的至少一个。 基于检查结果,在晶片边缘的侧表面和边缘的上表面中的至少一个上确定膜剥离的存在/不存在和颗粒附着的存在/不存在中的至少一个 的晶片。 当确定膜剥离和颗粒粘附中的至少一种已经发生时,执行预定的应对过程。