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    • 36. 发明授权
    • Frequency synthesizer receiver having memory for storing frequency data
    • 具有用于存储频率数据的存储器的频率合成器接收器
    • US4236251A
    • 1980-11-25
    • US837761
    • 1977-09-29
    • Tsutomu OhgishiToru AkiyamaTadashi Sakurai
    • Tsutomu OhgishiToru AkiyamaTadashi Sakurai
    • H03J7/18H03J5/02H03J7/28H04B1/26
    • H03J5/0281
    • A digital frequency synthesizer radio receiver, comprising a scan memory for storing a digital value data concerning a broadcasting frequency; a digital value data entry device for selectively entering a digital value concerning a broadcasting frequency; a preset memory having a plurality of storing locations, each adapted for storing a digital value concerning a specified broadcasting frequency, a channel selector coupled to said preset memory for selecting one of said storing locations thereof, said preset memory being responsive to said channel selector and said digital value data entry device for loading the entered digital value data in the location of the preset memory selected by the channel selector; and a phase locked loop selectively and operatively coupled to either of said scan memory and said preset memory for providing an oscillation frequency signal the frequency of which is associated with the digital value data loaded in the selected one of said scan memory and the preset memory. Preferably, said scan memory comprises a plurality of memories, each allotted for a frequency band, and said preset memory is structured such that each location comprises a plurality of regions, each allotted for a frequency band, whereby a multiband frequency synthesizer radio receiver is provided.
    • 一种数字频率合成器无线电接收机,包括用于存储关于广播频率的数字值数据的扫描存储器; 数字值数据输入装置,用于选择性地输入关于广播频率的数字值; 具有多个存储位置的预设存储器,每个存储位置适于存储关于指定广播频率的数字值;频道选择器,耦合到所述预设存储器,用于选择所述存储位置之一,所述预设存储器响应于所述频道选择器和 所述数字值数据输入装置用于将输入的数字值数据加载到由频道选择器选择的预设存储器的位置中; 以及锁相环,其选择性地和操作地耦合到所述扫描存储器和所述预设存储器中的任一个,以提供其频率与加载在所述扫描存储器和所述预置存储器中所选择的一个中的数字值数据相关联的振荡频率信号。 优选地,所述扫描存储器包括多个存储器,每个存储器被分配用于频带,并且所述预设存储器被构造为使得每个位置包括多个区域,每个区域被分配用于频带,由此提供多频带合成器无线电接收机 。
    • 37. 发明授权
    • Flip-flop having reset preferential function
    • 触发器具有复位优先功能
    • US4179628A
    • 1979-12-18
    • US853584
    • 1977-11-21
    • Tsutomu OhgishiToru AkiyamaTadashi Sakurai
    • Tsutomu OhgishiToru AkiyamaTadashi Sakurai
    • H03K3/037H03K3/356H03K3/286H03D13/00H03K3/353H03K5/20
    • H03K3/037H03K3/356017H03K3/356052
    • A flip-flop having a reset preferential function, comprising a set input terminal, a reset input terminal, a clock signal source operatively coupled through a field effect transistor to the set input terminal, a capacitance formed at the gate electrode of the field effect transistor, a charge control transistor controllable responsive to the clock signal for precharging the capacitance prior to the clock signal, a discharge control transistor controllable responsive to the reset signal for discharging the capacitance, whereby the capacitance is precharged prior to the clock signal and is discharged responsive to the reset signal, the field effect transistor being rendered conductive as a function of the electric charge of the capacitance, the clock signal source being operatively coupled to the set input terminal as a function of the conduction state of the field effect transistor, whereby the flip-flop is set responsive to the leading edge of the clock signal and is reset responsive to the reset signal in preference to the clock signal.
    • 具有复位优先功能的触发器,包括设置输入端子,复位输入端子,通过场效应晶体管可操作地耦合到设定输入端子的时钟信号源,形成在场效应晶体管的栅电极处的电容 ,电荷控制晶体管,其可响应于时钟信号控制,用于在时钟信号之前对电容进行预充电,放电控制晶体管可响应于用于放电电容的复位信号而受控制,由此在时钟信号之前预先充电电容并且响应于放电 对于复位信号,场效应晶体管作为电容的电荷的函数而导通,时钟信号源作为场效应晶体管的导通状态的函数被可操作地耦合到设置的输入端,由此, 触发器设置为响应于时钟信号的前沿,并且响应于t而被复位 o优先于时钟信号的复位信号。