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31. 发明授权

US08145835B2 Disk controller configured to perform out of order execution of write operations 有权
标题翻译：磁盘控制器配置为执行写入操作的无序执行
公开(公告)号：US08145835B2
公开(公告)日：2012-03-27
申请号：US12902364
申请日：2010-10-12
申请人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
发明人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
IPC分类号： G06F12/00
CPC分类号： G06F12/0607 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0676 , G06F12/0868 , G11B5/012
摘要： A controller for a disk drive including a buffer memory controller and a processor. The buffer memory controller is configured to receive a first write operation and a second write operation in a first order, store the first write operation and the second write operation in a buffer memory, and transfer write data corresponding to the first write operation and the second write operation in a second order that is different than the first order in response to a single command. The processor is configured to arrange the first write operation and the second write operation in the second order and issue the single command according to the second order.
摘要翻译：一种用于包括缓冲存储器控制器和处理器的磁盘驱动器的控制器。缓冲存储器控制器被配置为以第一顺序接收第一写入操作和第二写入操作，将第一写入操作和第二写入操作存储在缓冲存储器中，并且将与第一写入操作相对应的写入数据和第二写入操作以与响应于单个命令的第一顺序不同的第二顺序的写入操作。处理器被配置为按照第二顺序排列第一写入操作和第二写入操作，并根据第二顺序发出单个命令。

32. 发明授权

US07984252B2 Storage controllers with dynamic WWN storage modules and methods for managing data and connections between a host and a storage device 有权
标题翻译：具有动态WWN存储模块的存储控制器和用于管理主机和存储设备之间的数据和连接的方法
公开(公告)号：US07984252B2
公开(公告)日：2011-07-19
申请号：US12833026
申请日：2010-07-09
申请人： Leon A. Krantz , Kha Nguyen , Michael J. North
发明人： Leon A. Krantz , Kha Nguyen , Michael J. North
IPC分类号： G06F13/00 , G06F13/28 , G06F3/00
CPC分类号： G06F3/0659 , G06F3/0605 , G06F3/0676 , H04L29/12839 , H04L61/6022 , H04L69/22
摘要： A controller including an interface module and an index module. The interface module is configured to connect devices. The index module is configured to include, in a table stored in memory, an entry for each of the devices. Each entry includes an address field. The index module is configured to: receive a frame of data including an address of one of the devices; compare the address to the address fields associated with the entries in the table; in response to the address matching one of the address fields, access an index value identifying an entry of the table when the address matches one of the address fields; and in response to the address not matching one of the address fields, generate the index value. The index value is used to connect the device associated with the matching one of the address fields with the one of the devices.
摘要翻译：控制器，包括接口模块和索引模块。接口模块配置为连接设备。索引模块被配置为在存储在存储器中的表中包括用于每个设备的条目。每个条目都包含一个地址字段。索引模块被配置为：接收包括设备之一的地址的数据帧; 将地址与表中与条目相关联的地址字段进行比较; 响应于匹配一个地址字段的地址，当地址与其中一个地址字段匹配时，访问标识表的条目的索引值; 并且响应于不匹配其中一个地址字段的地址，生成索引值。索引值用于将与匹配的一个地址字段相关联的设备与其中一个设备连接。

33. 发明授权

US07949838B1 System and method for managing a memory storage device 有权
标题翻译：用于管理存储器件的系统和方法
公开(公告)号：US07949838B1
公开(公告)日：2011-05-24
申请号：US12611131
申请日：2009-11-03
申请人： William C. Wong , Kha Nguyen , Huy Tu Nguyen
发明人： William C. Wong , Kha Nguyen , Huy Tu Nguyen
IPC分类号： G06F12/00
CPC分类号： G11B20/10527 , G11B20/18 , G11B2020/10638 , G11B2020/1843 , G11B2220/2516 , G11B2220/2562
摘要： A memory management system includes a memory controller module configured to receive a frame of data. The frame of data includes a plurality of data words that generate boundary indicators based on at least one of a start of the frame and an end of the frame. The plurality of data words inserts the boundary indicators into the frame of data. The memory is configured to store the frame of data, including the data words and the boundary indicators, during transmission of the frame of data between a host and a storage device.
摘要翻译：存储器管理系统包括被配置为接收数据帧的存储器控制器模块。数据帧包括基于帧的开始和帧的结束中的至少一个生成边界指示符的多个数据字。多个数据字将边界指示符插入到数据帧中。存储器被配置为在主机和存储设备之间的数据帧传输期间存储数据帧，包括数据字和边界指示符。

34. 发明申请

US20090047280A1 Antibody inhibiting infection of papillomavirus 审中-公开
标题翻译：抗体抑制乳头瘤病毒感染
公开(公告)号：US20090047280A1
公开(公告)日：2009-02-19
申请号：US12006928
申请日：2008-01-07
申请人： Patricio I. Meneses , Erle S. Robertson , Kha Nguyen , Valerie Laniosz
发明人： Patricio I. Meneses , Erle S. Robertson , Kha Nguyen , Valerie Laniosz
IPC分类号： A61K39/395 , C07K16/18 , C12N5/06 , A61P31/00
CPC分类号： C07K16/084 , A61K39/00 , A61K39/12 , C07K14/005 , C07K2317/76 , C07K2317/77 , C12N2710/20022 , C12N2710/20034
摘要： The present invention relates generally to an antibody that binds specifically to a neutralization epitope at the surface of papillomavirus (residues 36-49 of the minor capsid L2) that does not interfere with virus entry into endosomes and lysosomes. This antibody neutralizes infection of the virus in a dose dependent manner.
摘要翻译：本发明一般涉及特异性结合乳头瘤病毒（次要衣壳L2的残基36-49）表面的中和表位的抗体，所述中和表位不干扰病毒进入内体和溶酶体。该抗体以剂量依赖的方式中和病毒的感染。

35. 发明授权

US07103715B2 Disk controller configured to perform out of order execution of write operations 有权
标题翻译：磁盘控制器配置为执行写入操作的无序执行
公开(公告)号：US07103715B2
公开(公告)日：2006-09-05
申请号：US10920881
申请日：2004-08-18
申请人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
发明人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
IPC分类号： G06F12/02 , G06F13/14 , G11B5/02 , G11B21/08
CPC分类号： G06F12/0607 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0676 , G06F12/0868 , G11B5/012
摘要： A buffer memory controller comprises a first memory configured to buffer write operation data between a write head and a second memory that stores write operation data corresponding to first and second write operations. A first memory location identifies a location of write operation data that corresponds to the first write operation stored within the second memory. A second memory location identifies a location of write operation data that corresponds to the second write operation stored within the second memory. Controller logic determines whether the first write operation and the second write operation write data to the same track. The controller logic transfers the data of the first write operation and the second write operation in an order other than the order in which the second memory received the first and second write operations when the first write operation and the second write operation write data to the same track.
摘要翻译：缓冲存储器控制器包括：第一存储器，被配置为缓冲写头和存储对应于第一和第二写操作的写操作数据的第二存储器之间的写操作数据。第一存储器位置识别对应于存储在第二存储器中的第一写操作的写操作数据的位置。第二存储器位置识别对应于存储在第二存储器中的第二写入操作的写入操作数据的位置。控制器逻辑确定第一次写入操作和第二次写入操作是否将数据写入同一个轨道。控制器逻辑以第一写入操作和第二写入操作将数据写入到第一写入操作和第二写入操作之外的顺序以除第二存储器接收到第一和第二写入操作的顺序之外的顺序传送第一写入操作和第二写入操作的数据跟踪。

36. 发明授权

US06826650B1 Disk controller configured to perform out of order execution of write operations 有权
标题翻译：磁盘控制器配置为执行写入操作的无序执行
公开(公告)号：US06826650B1
公开(公告)日：2004-11-30
申请号：US09643636
申请日：2000-08-22
申请人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
发明人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
IPC分类号： G06F1314
CPC分类号： G06F12/0607 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0676 , G06F12/0868 , G11B5/012
摘要： A hard disk unit includes a disk, controller microprocessor, host bus interface, buffer memory, buffer memory controller and disk formatter. The bus interface receives write operations, and the corresponding write operation data is stored in the buffer memory. The buffer memory controller also includes a set of address registers and a set of block count registers. The microprocessor loads the address registers with the buffer memory addresses of data of multiple write operations and loads the block count registers with the size of the corresponding data. The microprocessor then issues a single command to the buffer memory controller to transfer the data from the buffer memory to the disk formatter. The address registers and block count registers enable the data of multiple write operations to be transferred and written to a disk in an order other than the order in which the write operations were received at the bus interface.
摘要翻译：硬盘单元包括磁盘，控制器微处理器，主机总线接口，缓冲存储器，缓冲存储器控制器和磁盘格式器。总线接口接收写操作，相应的写操作数据存储在缓冲存储器中。缓冲存储器控制器还包括一组地址寄存器和一组块计数寄存器。微处理器使用多个写入操作的数据的缓冲存储器地址加载地址寄存器，并使用相应数据的大小加载块计数寄存器。然后微处理器向缓冲存储器控制器发出单个命令，以将数据从缓冲存储器传送到磁盘格式器。地址寄存器和块计数寄存器使得多个写入操作的数据能够以除总线接口上的写入操作顺序之外的顺序被传送和写入到磁盘。

37. 发明授权

US5386517A Dual bus communication system connecting multiple processors to multiple I/O subsystems having a plurality of I/O devices with varying transfer speeds 失效
标题翻译：将多个处理器连接到具有变化的传送速度的多个I / O设备的多个I / O子系统的双总线通信系统
公开(公告)号：US5386517A
公开(公告)日：1995-01-31
申请号：US8962
申请日：1993-01-26
申请人： Jayesh V. Sheth , Craig W. Harris , Theodore C. White , Kha Nguyen , Chung W. Wong , Richard A. Cowgill
发明人： Jayesh V. Sheth , Craig W. Harris , Theodore C. White , Kha Nguyen , Chung W. Wong , Richard A. Cowgill
IPC分类号： G06F13/38 , G06F15/17 , G06F15/173 , G06F5/06
CPC分类号： G06F15/173 , G06F13/385 , G06F15/17
摘要： An Input/Output Module (IOM) interfacing multiple computers attached to a dual system bus. The IOM provides an interbus module which interfaces the dual system bus to a sub-requestor bus connecting multiple sub-requestor modules. The sub-requestor modules control a plurality of interface adaptors permitting data transfers to/from a variety of peripherals using different data protocols and clock rates. The requirements for the main host processors and memories in a computer system would be unduly burdensome were it not for the relief from these overhead operations by the input/output module which provides the tailoring of data transfer capability to and from a multiplicity of peripherals having many different types of protocols and clock rates.
摘要翻译：输入/输出模块（IOM）连接到连接到双系统总线的多台计算机。 IOM提供了一个Interbus模块，其将双系统总线连接到连接多个子请求者模块的子请求者总线。子请求者模块控制多个接口适配器，允许使用不同的数据协议和时钟速率向各种外设进行数据传输。对于计算机系统中的主要主处理器和存储器的要求将是过度繁重的，这不是为了通过输入/输出模块缓解这些开销操作，其提供数据传输能力与多个具有许多外围设备的外围设备不同类型的协议和时钟速率。

38. 发明授权

US08769219B2 Disk controller configured to perform out of order execution of write operations 有权
标题翻译：磁盘控制器配置为执行写入操作的无序执行
公开(公告)号：US08769219B2
公开(公告)日：2014-07-01
申请号：US13430063
申请日：2012-03-26
申请人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
发明人： Arie L. Krantz , Kha Nguyen , Gregory T. Elkins
IPC分类号： G06F12/06 , G06F12/08 , G06F3/06
CPC分类号： G06F12/0607 , G06F3/0613 , G06F3/0656 , G06F3/0659 , G06F3/0676 , G06F12/0868 , G11B5/012
摘要： A storage controller including a processor and a memory controller. The processor is configured to generate a command corresponding to a first write operation and a second write operation, in which the first write operation is contiguous to the second write operation, and the first write operation is received prior to the second write operation. The command arranges the second write operation prior to the first write operation. The memory controller is configured to, in response to the command, execute each of the first write operation and the second write operation. The second write operation is executed by the memory controller prior to the first write operation.
摘要翻译：一种包括处理器和存储器控制器的存储控制器。处理器被配置为生成与第一写入操作和第二写入操作相对应的命令，其中第一写入操作与第二写入操作相邻，并且在第二写入操作之前接收到第一写入操作。该命令在第一次写入操作之前排列第二次写入操作。存储器控制器被配置为响应于该命令执行第一写入操作和第二写入操作中的每一个。在第一次写入操作之前，由存储器控制器执行第二次写入操作。

39. 发明授权

US08566652B1 Command queuing in disk drives 有权
标题翻译：命令在磁盘驱动器中排队
公开(公告)号：US08566652B1
公开(公告)日：2013-10-22
申请号：US13441492
申请日：2012-04-06
申请人： Huy Tu Nguyen , William C Wong , Kha Nguyen , Yehua Yang
发明人： Huy Tu Nguyen , William C Wong , Kha Nguyen , Yehua Yang
IPC分类号： G06F3/00
CPC分类号： G06F3/0659 , G06F3/061 , G06F3/0671 , G06F11/1004 , G06F2213/0038
摘要： A method and system for command queuing in disk drives may improve performance by queuing multiple commands and sequentially executing them automatically without firmware intervention. The method may use a number of queues, e.g., a staging queue for commands to be executed, an execution queue for commands currently being executed, or a holding queue for commands which may have been executed but have not received a status report from a host.
摘要翻译：用于在磁盘驱动器中进行命令排队的方法和系统可以通过排队多个命令并在没有固件干预的情况下自动执行它们来提高性能。该方法可以使用多个队列，例如用于执行命令的分段队列，用于当前正在执行的命令的执行队列，或者可能已被执行但尚未从主机接收到状态报告的命令的保持队列。

40. 发明授权

US08412998B1 Restart operation with logical blocks in queued commands 有权
标题翻译：使用排队命令中的逻辑块重新启动操作
公开(公告)号：US08412998B1
公开(公告)日：2013-04-02
申请号：US12415207
申请日：2009-03-31
申请人： William C. Wong , Huy Tu Nguyen , Kha Nguyen
发明人： William C. Wong , Huy Tu Nguyen , Kha Nguyen
IPC分类号： G08C25/02
CPC分类号： G06F11/141 , G06F3/0611 , G06F3/0659 , G06F3/0674
摘要： Methods and systems for performing a restart operation in a storage device include in response to receiving an unsuccessful status from the host indicating a transmission error occurred for the first command, determining in which one of the logical blocks the transmission error occurred and from which data needs to be resent, thereby identifying a restart logical block. The number of blocks in the restart logical block that were sent successfully are calculated, and it is determined that the block immediately following the blocks sent successfully is the block in which the transmission error occurred and from which the data needs to be resent, thereby identifying a restart block. An amount of data successfully sent in the restart block is determined; and an indication is provided to resend at least a portion of the data in the restart block to the host.
摘要翻译：用于在存储设备中执行重新启动操作的方法和系统包括响应于从主机接收到指示发生第一命令的传输错误的不成功状态，确定在哪个逻辑块发生传输错误并从哪个数据需要重新发送，从而识别重新开始的逻辑块。计算出成功发送的重启逻辑块中的块的数量，并且确定紧接在块发送的块之后的块是发生传输错误的块，并且需要重新发送数据，从而识别一个重启块。确定在重启块中成功发送的数据量; 并且提供指示以将重新启动块中的数据的至少一部分重新发送到主机。

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